AD-DAC-FMC-ADP

AD-DAC-FMC-ADP Quick Start Guide One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Getting Started with the AD-DAC-FMC-ADP Adapter Board INTRODUCTION The ADC-DAC-FMC-ADP adapter board allows any of Analog Devices’ DPG2-compatiable High-Speed DAC Evaluation Boards to be used on a Xilinx® evaluation board with a FMC connector. The adapter board uses the Low Pin Count (LPC) version of the FMC connector, so it can be used on either LPC or HPC hosts (such as the ML605 or SP605). A list of DPG2-compatiable evaluation boards can be found at http://www.analog.com/dpg The schematic and layout are included in the following pages of this document. In addition, example UCF files for both the ML605 and SP605 are included as a starting point. CLOCKING Every DPG2-compatiable evaluation board provides two LVDS clocks to the host. These two clocks are always identical in both frequency and phase. On DACs using an LVDS interface, the host is then expected to output two LVDS clocks that are phase aligned to the data. It is very important that these clocks be generated the same way as the data, so that any delays inside the FPGA are matched. Therefore, this clock should be considered another data bit with a fixed “10101” pattern. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. 8 7 6 2 3 4 5 DESCRIPTION B FIRST REVISION (PREVIOUS BOARD WAS HPC VERSION, WHICH THIS REPLACES) DPG2 CONNECTOR D CLK_DCOA_N CLK_TXI_O_N TXI_DATA_N15 TXI_DATA_N14 TXI_DATA_N13 TXI_DATA_N12 TXI_DATA_N11 TXI_DATA_N10 TXI_DATA_N9 TXI_DATA_N8 CLK_DCOA_P CLK_DCOA_N BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10 J17 H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30 H31 H32 H33 H34 H35 H36 H37 H38 H39 H40 PRSNT_M2C_L TXI_DATA_P13 TXI_DATA_N13 J17 PLUG HEADER 6469169-1 PLUG HEADER 6469169-1 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 TXI_DATA_P9 TXI_DATA_N9 TXI_DATA_P5 TXI_DATA_N5 TXQ_DATA_N15 TXQ_DATA_N14 TXQ_DATA_N13 TXQ_DATA_N12 TXQ_DATA_N11 TXQ_DATA_N10 TXQ_DATA_N9 TXQ_DATA_N8 TXI_DATA_P0 TXI_DATA_N0 TXQ_DATA_P14 TXQ_DATA_N14 J17 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DG8 DG9 DG10 TXQ_DATA_P11 TXQ_DATA_N11 TXQ_DATA_P8 TXQ_DATA_N8 TXQ_DATA_P6 TXQ_DATA_N6 J18 PLUG HEADER 6469169-1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TXQ_DATA_P4 TXQ_DATA_N4 TXI_DATA_N7 TXI_DATA_N6 TXI_DATA_N5 TXI_DATA_N4 TXI_DATA_N3 TXI_DATA_N2 TXI_DATA_N1 TXI_DATA_N0 TXQ_DATA_P2 TXQ_DATA_N2 VADJ TXI_DATA_P15 TXI_DATA_N15 CLK_TXI_O_P CLK_TXI_O_N TXI_DATA_P12 TXI_DATA_N12 TXI_DATA_P10 TXI_DATA_N10 TXI_DATA_P6 TXI_DATA_N6 TXI_DATA_P2 TXI_DATA_N2 TXQ_DATA_P15 TXQ_DATA_N15 TXQ_DATA_P12 TXQ_DATA_N12 TXQ_DATA_P9 TXQ_DATA_N9 TXQ_DATA_P7 TXQ_DATA_N7 TXQ_DATA_P5 TXQ_DATA_N5 TXQ_DATA_P3 TXQ_DATA_N3 VADJ ASP-134604-01 P1 G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 G31 G32 G33 G34 G35 G36 G37 G38 G39 G40 CLK_TXQ_O_P CLK_TXQ_O_N TXI_DATA_P7 TXI_DATA_N7 TXI_DATA_P3 TXI_DATA_N3 TXI_DATA_P4 TXI_DATA_N4 CLK_DCOB_P CLK_DCOB_N TXQ_DATA_P13 TXQ_DATA_N13 TXQ_DATA_P10 TXQ_DATA_N10 TCK TDI TDO 3P3VAUX TMS TRST_L GA1 3P3V ASP-134604-01 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 P1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 TXI_DATA_P11 TXI_DATA_N11 TXI_DATA_P8 TXI_DATA_N8 TXI_DATA_P1 TXI_DATA_N1 TXQ_DATA_P1 TXQ_DATA_N1 TXQ_DATA_P0 TXQ_DATA_N0 SCL SDA GA0 12P0V 3P3V ASP-134604-01 C ASP-134604-01 B BG1 BG2 BG3 BG4 BG5 BG6 BG7 BG8 BG9 BG10 J18 PLUG HEADER 6469169-1 B PLUG HEADER 6469169-1 J18 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 TXI_DATA_P7 TXI_DATA_P6 TXI_DATA_P5 TXI_DATA_P4 TXI_DATA_P3 TXI_DATA_P2 TXI_DATA_P1 TXI_DATA_P0 P1 P1 VREF_A_M2C PLUG HEADER 6469169-1 C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 TXQ_DATA_P15 TXQ_DATA_P14 TXQ_DATA_P13 TXQ_DATA_P12 TXQ_DATA_P11 TXQ_DATA_P10 TXQ_DATA_P9 TXQ_DATA_P8 APPROVED 7/2010 "C" ROW CLOSESTTO BOARD EDGE B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TXI_DATA_P14 TXI_DATA_N14 J17 DATE J17 PLUG HEADER 6469169-1 PLUG HEADER 6469169-1 J17 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 CLK_DCOA_P CLK_TXI_O_P TXI_DATA_P15 TXI_DATA_P14 TXI_DATA_P13 TXI_DATA_P12 TXI_DATA_P11 TXI_DATA_P10 TXI_DATA_P9 TXI_DATA_P8 PLUG HEADER 6469169-1 D 1 REVISIONS REV D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 SILKSCREEN TXQ_DATA_N7 TXQ_DATA_N6 TXQ_DATA_N5 TXQ_DATA_N4 TXQ_DATA_N3 TXQ_DATA_N2 TXQ_DATA_N1 TXQ_DATA_N0 CLK_TXQ_O_N CLK_DCOB_N PCB NOTES: PCB DIMENSIONS AS FOLLOWS, PER VITA-57 SPEC: LAYOUT NOTES: ALL LINES MATCHED LENGTH (MATCHING MORE CRITICAL THAN LINE LENGTH) PAIRS WITHIN TXI____, TXQ____, CAN BE MOVED TO EASE ROUTING A DG1 DG2 DG3 DG4 DG5 DG6 DG7 DG8 DG9 DG10 J18 NOTES: SAP PART NUMBER: HSC-DAC-FMC-ADP PART NUMBER AND PCB REVISION (BELOW) TO BE ON TOP SILKSCREEN PLUG HEADER 6469169-1 A J18 PLUG HEADER 6469169-1 PLUG HEADER 6469169-1 J18 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 TXQ_DATA_P7 TXQ_DATA_P6 TXQ_DATA_P5 TXQ_DATA_P4 TXQ_DATA_P3 TXQ_DATA_P2 TXQ_DATA_P1 TXQ_DATA_P0 CLK_TXQ_O_P CLK_DCOB_P A N A LO G DE V C ES DPG2 LPC ADAPTER BRD AD-DAC-FMC-ADP DESIGN VIEW DRAWING PTD ENGINEER SIZE - 7 6 5 4 3 REV NO. A HSC 10033 J COUTERMARSH 8 SCHEMATIC 2 D SCALE - SHEET 1 2 OF 2