AD2S93

a FEATURES Full Function Monolithic LVDT-to-Digital Converter Absolute Serial Data Output Uncommitted Differential Input Repeatability Remote Diagnostics 14-Bit Resolution Industrial Temperature Range 28-Pin PLCC Low Power APPLICATIONS Industrial Gauging Industrial Process Control Linear Positioning Systems Linear Actuator Control Automotive Motion Sensing and Control Torque Sensing Conditioner AC Strain Gages Conditioning Avionics REFERENCE (PRIMARY EXCITATION) Low Cost LVDT-to-Digital Converter AD2S93 FUNCTIONAL BLOCK DIAGRAM C3 ACERROR ERROR AMP AC RATIO BRIDGE R6 C4 R5 DEMODIN REF DIFFERENTIAL (SECONDARY A VOLTAGE) B R4 GAIN DIFF R3 VDD LOS OVR UNR NULL CS LATCHES LOS DECODE LOGIC UP-DOWN COUNTER PHASE SENSITIVE DEMODULATOR DEMOD OUT R1 R7 INTIN C1 R2 C2 VEL VCO GAIN DIR CLKOUT FREQUENCY SHAPING VCO DATA SCLK SERIAL INTERFACE AD2S93 GENERAL DESCRIPTION The AD2S93 is a complete 14-bit resolution tracking LVDT-todigital converter. A Type II tracking loop is employed to track the A–B input and produce a digital output equal to (A–B)/ (REF/2), where REF is a fixed amplitude ac reference phase coherent with the A–B input. This allows the measurement of any 2-, 3-, 4- and 5-wire LVDT or linear amplitude modulated input. The operating frequency range is from 360 Hz to 10 kHz with user definable bandwidth set externally within a range of 45 Hz to 1250 Hz. The AD2S93 has a 16-bit serial output. The MSB (LOS), read first, indicates a loss of the signal A, B, or reference inputs to the converter or transducer. The second and third MSBs are flags indicating whether [–REF/2 (UNR) ≤ A–B ≤ +REF/2 (OVR]) is outside the linear operating range of the converter. The displacement data is presented as 13-bit offset binary giving a ± 12bit operating range. LOS, OVR and UNR are pinned out on the device, in addition a NULL flag is available which is set when (A–B) = 0. Absolute displacement information is accessed when CS is taken LO followed by the application of an external clock (SCLK) with a maximum rate of 2 MHz. Data is read MSB first. When CS is high the DATA output is high impedance; this allows daisy chaining of more than one converter onto a common bus. The A, B differential input allows the user to scale the A, B inputs between 1 and 10. This enables the user to accurately set up the inputs matching the REF input to the DIFF output. The REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. DIFF output is the resultant A–B. The AD2S93 operates using ± 5 V ± 5% power supplies and is fabricated on Analog Devices’ linear compatible CMOS process (LC2MOS). The (LC2MOS) is a mixed technology process that combines precision bipolar circuits with low power logic. PRODUCT HIGHLIGHTS Complete LVDT-to-Digital Interface. The AD2S93 provides the complete solution for digitizing LVDT signals to 14bit resolution. Serial 16-Bit Output Data. One 16-bit read from the AD2S93 determines input signal continuity (LOS), over and underrange detection and 13 bits of offset binary displacement information. High Accuracy Grade in Low Cost Package. 0.05% and 0.1% integral linearity over the full –40°C to +85°C operating temperature range. Uncommitted Differential Input. Allows configuration of 2-, 3-, 4- and 5-wire LVDTs. Multiple Converter Interfacing. High impedance data output and a simple three-wire interface reduces cabling and eliminates bus contention. Low Power. 70 mW power consumption (typ). One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 V= unless otherwise AD2S93–SPECIFICATIONS (V = +5 V ± 5%;noted) –5 V ± 5%, AGND = DGND = 0 V, T = –40°C to +85°C DD SS A Parameter Test Conditions Min Typ Max Units SIGNAL INPUTS Frequency Max Voltage Level1 Nominal Full Scale2 Input Bias Current Input Impedance CMRR Maximum Sensitivity3 REFERENCE INPUT Frequency Voltage Level Input Bias Current Input Impedance Permissible Phase Shift4 CONVERTER DYNAMICS Bandwidth VCO Mode = 1 VCO Mode = 2 Maximum Slew Rate Mode = 1 Mode = 2 ACCURACY Integral Linearity Differential Linearity Repeatability Zero Position Offset 0.36 0.8 @ +25°C VA–B = 1 V rms, G = 1 0.36 1.8 1.0 1.0 1.0 1.0 57 342 10 1.2 1.1 kHz V rms V rms µA MΩ dB µV pk/LSB kHz V rms µA MΩ Degrees @ 0 V +25°C Signal to Reference Set by User VCO Gain Connected to VCO I/P VCO Gain No Connect 2.0 1.0 10 2.2 1 +10 –10 500 45 2400 800 1250 500 3000 1000 0.1 0.05