AD362SD

N ANALOG - W DEVICES FEA TURES Precision Sample-and-Hold with 16-Channel Multiplexer III . 16 Single-Endedor 8 Differential Mode Control True 12-Bit Precision: Nonlinearity Channels with Switchable QO.005% OBS ~ High Speed: 1OilS Acquisition Time to 0.01% Complete and Calibrated: No Additional Parts Required Small, Reliable: 32 Pin Hermetic Metal DIP Versatile: Simple Interface to Popular Analog to Digital Converters High Differential Input Impedance (101°0) and Common Mode Rejection (8OdB) Fully Protected Multiplexer Inputs PRODUCT DESCRIPTION The AD362 is a complete, precision 16-channel data acquisition system analog input section in hybrid integrated circuit form. Large-scale linear integrated circuitry, thick- and thinfilm technology and active laser trimming gives the AD362 extensive applications versatility along with full 12-bit accuracy. The AD362 contains two 9-channel multiplexers, a differential amplifier, a sample-and-hold with high-speed output amplifier, a channel address latch and control logic. The multiplexers may be connected to the differential amplifier in either an 8-channel differential or 16-channel single-ended configuration. A unique featUre of the AD362 is an internal user-controllable analog switch that connects the multiplexers in either a singleended or differential mode. This allows a single device to perform in either mode without hard-wire programming and permits a mixtUre of single-ended and differential sources to be interfaced by dynamically switching the input mode control. The sample-and-hold mode control is designed to connect direcdy to the "StatUs" output of an analog to digital converter so that a convert command to the ADC will automatically put the sample-and-hold into the "Hold" mode. A precision hold capacitor is included with each AD362. The AD362 output amplifier is capable of driving the unbuffered analog input of most high-speed, 12-bit successive-approximation ADCs. Interface is thereby reduced to two simple connections with no additional components required. When used with a 12-bit, 2S-microsecond ADC such as the ADS72, ADS74 or AD ADC80, system throughput rate is as high as 30kHz at full rated accuracy. The AD362KD is specified for operation over a 0 to +70°C temperatUre range while the OLE AD362SD operates to specification from -55°C to + 125°C. Processing to MIL-STD-883 , Class B is available for the AD362SD. Both grades are packaged in a hermetic, electrostatically shielded 32-pin metal dual-in-line package. PRODUCT HIGHLIGHTS 1. The AD362, when used with a precision analog to digital converter, forms a complete, accurate, high-speed data acquisition system. 2. The 16-input channels may be configured in single-ended, differential or a mixtUre of both modes. Mode switching is provided by a user-controllable internal analog switch. 3. Multiplexers, differential amplifier, sample-and-hold and high-speed output buffer provide complete analog interfacing capabilities. 4. Internal channel address latches are provided to facilitate interfacing the AD362 to data, address or control buses. 5. All grades of the AD362 are hermetically sealed in rugged metal DIP packages. 6. A precision hold capacitor is provided with each AD362. 7. The AD362SD is specified over the entire military temperatUre range, -55°C to +12SoC. Processing to MIL-STD883, Class B is available. TE ~ Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringements of parents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Route 1 Industrial Park; P.O. Box 280; Norwood, Mass. 02062 Tel: 617/329-4700 TWX: 710/394-6577 West Coast Mid-West Texas 714/842-1717 312/894-3300 214/231.5094 --- - (typical@+25°C,:t15Vand+5V with 2000pF hold capacitorasprovided SPECIFICATIONS otherwisenoted) unless MODEL ANALOG INPUTS Number of Inputs Input Voltage Range, Linear Tmin to Tmax AD362KD 16 Single-Ended or 8 Differential (Electronically Selectable) :tIOV min :tSOnA max AD362SD/AD362SD-883BI * * * .t Input (Bias) Current, Per Channel Input Impedance On Channel. Off Channel Input Fault Current (Power Off or On) Common Mode Rejection Differential Mode Mux Crosstalk (Interchannel, Any Off Channel to Any On Channel) IOl0n, IOOpF 1010 n, IOpF 20mA, max, Internally Limited 70dB min (80dB typ) @ 1kHz, 20V pop -80dB max (-90dB typ) @ 1kHz, 20V p-p :t2.SmV mIX * * * * * * * * * * * * ACCURACY Gain Error, Tmin to Tmax Offset Error, Tmin to Tmax Linearity Error Tmin to Tmax TEMPERATURE COEFFICIENTS Gain, Tmill to Tmax Offset, :tlOV Range, Tmin to Tmax SAMPLE AND HOLD DYNAMICS ApertUre Delay Aperture Uncertainty Acquisition Time, for 20V Step to :to.01 % of Final Value Feedthrough Droop Rate DIGIT AL INPUT SIGNALS2 Input Channel Select (Pins 28-31) Channel Select Latch (Pin 32) OBS Noise Error Tmin to Tmax Offset, Channel to Channel :to.02% FSR, max :t4mV :to.005% max :to.Ol% max ImV pop, 0.1 to IMHz, mIX 2m V p-p, 0.1 to 1MHz, mIX :t4ppm/C max :t2ppm/ C max lOOns max (SOns typ) SOOpsmIX (lOOps typ) 18J.LSmax (lO~s typ) -70dB max (-80dB typ) @ 1kHz 2mV/ms max (lmV/ms typ) OLE * * * * * * * * * * * * * * * * * * * * :t2ppm/ C max :t1.Sppm/oC mIX TE 8~ 4-Bit Binary, Channel Address lLS TTL Load "I ": Latch Transparent "0": Latched 8LS TTL Loads "0": Single-Ended Mode "I ": Differential Mode 3TTL Loads "0": Sample Mode "I ": Hold Mode 1TTL Load +ISV, :!:S% @ 30mA mix -ISV, :!:S% @ 30mA mix +SV, :tS% @ 40mA mix 1.1 Watts mix Single Ended/Differential Mode Select (Pin 1) Sample and Hold Command (Pin 13) POWER REQUIREMENTS Supply Voltages/Currents Total Power Dissipation TEMPERATURE RANGE Specification Storage NOTES: 1 0 to +700C -SSoC to +8S0C3 -SSoC to +12SoC -SSoC to +IS0°C The AD362 is available full;' processed and screened to the requirements of MIL-STD-883, Class B. A complete list of tests is given on page 3. When ordering, specify "AD362SD/883B". 8 ~ 2 One TTL Load is defmed as IlL =-1.6mA mIX @ VIL =O.4V, IB-I=40I1A mIX @ VB-I =2.4V. One LSTTL Load is defined as IIL=~.36rnA max@ VIL=O.4V,lrn=20I1A max@ Vrn=2.7V. 3 AD362KD External Hold Capacitor is limited to +8SoC; AD362 device itself may be stored at up to +lS0°C. subject to change without notice. Specifications -2- ~" t ; I ABSOLUTE MAXIMUM RATINGS (ALL MODELS) +V,DigitaISupply +V, Analog Supply -V, Analog Supply +5.5V +16V -16V :tV, Analog Supply 0 to +V, Digital Supply :t1V , Pin Number 1 ---Function Single-End/Differential Mode Select "0": Single-Ended Mode "1": Differential Mode Digital Ground Positive Digital Power Supply, +5V "High" Analog Input, Channel 7 "High" Analog Input, Channel 6 "High" Analog Input, Channel 5 "High" Analog Input, Channel 4 "High" Analog Input, Channel 3 "High" Analog Input, Channel 2 "High" Analog Input, Channell "High" Analog Input, Channel 0 Hold Capacitor (Provided) Sample-Hold Command "0": Sample Mode "1": Hold Mode ! VIN, Signal i VlN, Digital , AcND to DGND 2 , I I i 1 3 4 5 6 7 8 9 PROCESSING FOR HIGH RELIABILITY I OBS PROCESS CONDITIONS 1) 100% pre-cap Visual Inspection Bake In-house Criteria 2) Stabilization 24 hours @ +lS0°C 3) Seal Test, Gross Leak 4) Operating Bum-In 24 hours@+12SoC PROCESSING TO MIL-STD-883 STANDARD PROCESSING As part of the standard manufacturing procedure, all models of rhe AD362 receive the following processing: ~ I 110 Method 1014 Test Condition C t All models of AD362 ordered to the requirements of MIL-STD-883. Method 5008 are identified with a /883B suffix and receive the following processing: PROCESS 1) 100% pre-cap Visual Inspection 2) Stabilization 3) Temperature Bake Cycle CONDITIONS 2017.1 1008, 24 hours @ +lS0°C OLE 1 11 12 13 I I i 14 15 16 1010, Test Condition C, 10 cycles, -65°C to +lS0°C 2001, VI Plane, 1000G Visable Damage 1015, Test Condition B 160 hours @ +12SoC 1014, Test Condition A, 5 x 10-7 std cc/sec 1014, Condition C Per Data Sheet 2009 4) Constant Acceleration 5) Visual Inspection 6) Operating Burn-In 7) Seal Test: Fine Leak Gross Leak 17 18 19 20 21 22 23 24 25 26 27 28 29 30 8) Final Electrical Test 9) External Visual Inspection l -3-- Normally Connected to ADC StatUs Offset Adjust (See Figure 5) Offset Adjust (See Figure 5) Analog Output Normally Connected to ADC "Analog In': Analog Ground "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel Negative Analog Power Supply, -15V Positive Analog Power Supply, +15V "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel "High" ("Low") Analog Input, Channel Input Channel Select, Address Bit AE Input Channel Select, Address Bit AO Input Channel Select, Address Bit Al Input Channel Select, Address Bit A2 Input Channel Select Latch "0": Latched "1": Latch Transparent TE 15 (7) 14 (6) 13 12 11 10 9 8 (5) (4) (3) (2) (1) (0) (100+) $119.50 $230.00 $280.00 AD362 ORDERING GUIDE Specification Temp Range 0 to +70°C -55°C to +125°C -55°C to +125°C Max Gain TC :t4ppm/C :t2ppm/ C :t2ppm/C Prices (25-99) $139.50 $270.00 $330.00 Model (1-24) $160.00 $295.00 $365.00 8 AD362KD AD362SD AD362SD/ 883B NOTE: D Suffix --= Dual-In-Line package designator. -- ----\.0362 DESIGN rhe AD362 consists of two 8-channel multiplexers, a differen:ial amplifier, a sample-and-hold with high-speed output buf:er, channel address latches and control logic as shown in ~igure 1. The multiplexers can be connected to the differential lmplifier in either an 8-channel differential or 16-channel ;ingle-ended configuration. A unique fearure of the AD362 is In internal analog switch controlled by a digital input that Jerforms switching between single-ended and differential nodes. This fearure allows a single AD362 to perform in ~ither mode without external hard-wire interconnections. Of more significance is the ability to serve a mixtUre of both ;ingle-ended and differential sources with a single AD362 by :Iynamically switching the input mode control. '"'GW' A.ACOG '.PUTS smaller capacitor will allow faster sample-and-hold response but will decrease accuracy while a larger capacitor will increase accuracy at slower conversion rates. The output buffer is a high speed amplifier whose output impedance remains low and constant at high frequencies. Therefore, the AD362 may drive a fast, unbuffered, precision ADC without loss of accuracy. The AD362 is constructed on a substrate that includes thickfilm resistors for non-critical applications such as input protection and biasing. A separately-mounted laser-trimmed thinfilm resistor network is used to establish accurate gain and high common-mode rejection. The metal package affords electromagnetic and electrostatic shielding and is hermetically welded at low temperatures. Welding eliminates the possibility of contamination from solder particles or flux while low temperatUre sealing maintains the accuracy of the laser-trimmed thin-film resistors. THEORY OF OPERATION Concept The AD362 is intended to be used in conjunction with a highspeed precision analog-to-digital converter to form a complete data acquisition system (DAS) in microcircuit form. Figure 2 shows a general AD362-with-ADC DAS application. AO362 I- OBS 1 r ..'OW.. ANACOG 'NPUTS ONPU' '"ANNEL "LEO' '"ANNEL "LEO' ",," Figure 1. A0362 Analog Input Section Functional Block Diagram and Pinout Multiplexer channel address inputs are interfaced through a level-triggered ("transparent") input register. With a Logic "1" at the Channel Select Latch input, the address signals feed through the register to directly select the appropriate input channel. This address information can be held in the register by placing a Logic "0" on the Channel Select Latch input. Inrernallogic monitors the status of the Single-Ended/Differential lode inp