AD5061YRJZ-1REEL7

Data Sheet 16-Bit VOUT, nanoDAC, SPI Interface, 2.7 V to 5.5 V in an SOT-23 AD5061 FEATURES FUNCTIONAL BLOCK DIAGRAM Single 16-bit digital-to-analog converter (DAC), 4 LSB INL Power-on reset to midscale or zero-scale Guaranteed monotonic by design 3 power-down functions Low power serial interface with Schmitt triggered inputs Small 8-lead SOT-23 package, low power Fast settling time of 4 µs typically 2.7 V to 5.5 V power supply Low glitch on power-up SYNC interrupt facility VREF POWER-ON RESET AD5061 BUF OUTPUT BUFFER DAC REGISTER REF(+) VOUT DAC AGND INPUT CONTROL LOGIC POWER-DOWN CONTROL LOGIC RESISTOR NETWORK 04762-001 APPLICATIONS Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators SYNC SCLK DACGND DIN Figure 1. GENERAL DESCRIPTION The AD5061, a member of the Analog Devices, Inc., nanoDAC™ family, is a low power, single 16-bit buffered voltage-out DAC that operates from a single 2.7 V to 5.5 V supply. The device offers a relative accuracy specification of ±4 LSB and operation is guaranteed monotonic with a ±1 LSB DNL specification. The device uses a versatile 3-wire serial interface that operates at clock rates up to 30 MHz, and is compatible with standard SPI, QSPI™, MICROWIRE, and DSP interface standards. The reference for the AD5061 is supplied from an external VREF pin. A reference buffer is also provided on-chip. The device incorporates a power-on reset circuit that ensures the DAC output powers up to mid-scale or zero scale and remains there until a valid write takes place to the device. The device contains a power-down feature that reduces the current consumption of the device to typically 330 nA at 5 V and provides software-selectable output loads while in power-down mode. The device is put into powerdown mode over the serial interface. Total unadjusted error for the device is