AD5065BRUZ-1

Fully Accurate 12-/14-/16-Bit VOUT DAC SPI Interface 2.7 V to 5.5 V in a TSSOP Preliminary Technical Data FEATURES Low power Dual 12-/14-/16 bit DAC, ± 1LSB INL Individual Voltage reference pins Rail-to-rail operation 2.7 V to 5.5 V power supply Power-on reset to zero scale or midscale Power down to 400 nA @ 5 V, 200 nA @ 3 V 3 power-down functions Per channel power-down Low glitch upon power up Hardware Power Down lock Out Capability Hardware LDAC with LDAC override function CLR Function to programmable code SDO daisy-chaining option 14 lead TSSOP Functional Block Diagrams VDD LDAC INPUT REGISTER INTERFACE LOGIC INPUT REGISTER DAC REGISTER DAC B BUFFER VOUTB DAC REGISTER VREFA VREFB AD5025/45/65 SCLK DAC A BUFFER VOUTA SYNC DIN PDL AD5025/AD5045R/AD5065 POWER-ON RESET POWER-DOWN LOGIC 0000-001 SDO LDAC CLR GND POR Figure 1.AD5025/45/65 Table 1. Related Devices Part No. AD5666 AD5066 AD5064/44/24 AD5063/62 AD5061 AD5060/40 Description Quad,16-bit buffered D/A,16 LSB INL, TSSOP Quad,16-bit unbuffered D/A,1 LSB INL, TSSOP Quad 16-bit nanoDAC, 1 LSB INL, TSSOP 16-bit nanoDAC, 1 LSB INL, MSOP 16-/14bit nanoDAC, 4 LSB INL, SOT-23 16-/14bit nanoDAC, 1 LSB INL, SOT-23 APPLICATIONS Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION The AD5025/45/65 are low power, dual 12-/14-/16-bit buffered voltage-out DACs offering relative accuracy specs of 1 LSB INL with individual reference pins and can operate from a single 2.7 V to 5.5 V supply. The AD5025/45/65 64 parts also offer a differential accuracy specification of ±1 LSB. The parts use a versatile 3-wire, low power Schmitt trigger serial interface that operates at clock rates up to 50 MHz and is compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The reference for the AD5025/45 and AD5065 are supplied from an external pin. A reference buffer is also provided on-chip. The AD5025/45/64 incorporates a power-on reset circuit that ensures the DAC output powers up zero scale or midscale and remains there until a valid write takes place to the device. The AD5025/45/65 contain a power-down feature that reduces the current consumption of the device to typically 330 nA at 5 V and provides software selectable output loads while in power-down mode. The parts are put into power-down mode over the serial interface. Total unadjusted error for the parts is