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AD536AJDZ

AD536AJDZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    CDIP14

  • 描述:

    RMS to DC Converter 14-CDIP

  • 数据手册
  • 价格&库存
AD536AJDZ 数据手册
Integrated Circuit True RMS-to-DC Converter AD536A Data Sheet FUNCTIONAL BLOCK DIAGRAM FEATURES AD536A True rms-to-dc conversion Laser trimmed to high accuracy ±0.2% maximum error (AD536AK) ±0.5% maximum error (AD536AJ) Wide response capability Computes rms of ac and dc signals 450 kHz bandwidth: V rms > 100 mV 2 MHz bandwidth: V rms > 1 V Signal crest factor of 7 for 1% error dB output with 60 dB range Low power: 1.2 mA quiescent current Single- or dual-supply operation Monolithic integrated circuit −55°C to +125°C operation (AD536AS) +VS ABSOLUTE VALUE COM SQUARER/ DIVIDER dB + CAV CURRENT MIRROR 25kΩ RL IOUT +VS BUFFER IN 25kΩ The AD536A is a complete monolithic integrated circuit that performs true rms-to-dc conversion. It offers performance comparable or superior to that of hybrid or modular units costing much more. The AD536A directly computes the true rms value of any complex input waveform containing ac and dc components. A crest factor compensation scheme allows measurements with 1% error at crest factors up to 7. The wide bandwidth of the device extends the measurement capability to 300 kHz with less than 3 dB errors for signal levels greater than 100 mV. An important feature of the AD536A, not previously available in rms converters, is an auxiliary dB output pin. The logarithm of the rms output signal is brought out to a separate pin to allow the dB conversion, with a useful dynamic range of 60 dB. Using an externally supplied reference current, the 0 dB level can be conveniently set to correspond to any input level from 0.1 V to 2 V rms. The AD536A is laser trimmed to minimize input and output offset voltage, to optimize positive and negative waveform symmetry (dc reversal error), and to provide full-scale accuracy at 7 V rms. As a result, no external trims are required to achieve the rated unit accuracy. The input and output pins are fully protected. The input circuitry can take overload voltages well beyond the supply levels. Loss of supply voltage with the input connected to external circuitry does not cause the device to fail. The output is short-circuit protected. BUFFER OUT 80kΩ –VS 00504-001 BUF GENERAL DESCRIPTION Rev. G VIN Figure 1. The AD536A is available in two accuracy grades (J and K) for commercial temperature range (0°C to 70°C) applications, and one grade (S) rated for the −55°C to +125°C extended range. The AD536AK offers a maximum total error of ±2 mV ± 0.2% of reading, while the AD536AJ and AD536AS have maximum errors of ±5 mV ± 0.5% of reading. All three versions are available in a hermetically sealed 14-lead DIP or a 10-pin TO-100 metal header package. The AD536AS is also available in a 20-terminal leadless hermetically sealed ceramic chip carrier. The AD536A computes the true root-mean-square level of a complex ac (or ac plus dc) input signal and provides an equivalent dc output level. The true rms value of a waveform is a more useful quantity than the average rectified value because it relates directly to the power of the signal. The rms value of a statistical signal also relates to its standard deviation. An external capacitor is required to perform measurements to the fully specified accuracy. The value of this capacitor determines the low frequency ac accuracy, ripple amplitude, and settling time. The AD536A operates equally well from split supplies or a single supply with total supply levels from 5 V to 36 V. With 1 mA quiescent supply current, the device is well suited for a wide variety of remote controllers and battery-powered instruments. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©1976–2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD536A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Frequency Response .....................................................................9 General Description ......................................................................... 1 AC Measurement Accuracy and Crest Factor ...........................9 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 11 Revision History ............................................................................... 2 Typical Connections .................................................................. 11 Specifications..................................................................................... 3 Optional External Trims For High Accuracy ......................... 11 Absolute Maximum Ratings............................................................ 5 Single-Supply Operation ........................................................... 12 ESD Caution .................................................................................. 5 Choosing the Averaging Time Constant ................................. 12 Pin Configurations and Function Descriptions ........................... 6 Outline Dimensions ....................................................................... 14 Theory of Operation ........................................................................ 8 Ordering Guide .......................................................................... 15 Connections for dB Operation ................................................... 8 REVISION HISTORY 3/2019—Rev. F to Rev. G Changes to Figure 5 and Table 5 ..................................................... 7 Change to Figure 16 ....................................................................... 12 Changes to Ordering Guide .......................................................... 15 11/2014—Rev. E to Rev. F Change to Figure 1 ........................................................................... 1 Changes to Table 1 ............................................................................ 3 Change to Figure 16 ....................................................................... 12 Changes to Ordering Guide .......................................................... 15 7/2012—Rev. D to Rev. E Reorganized Layout ............................................................ Universal Changes to Figure 1 .......................................................................... 1 Changes to Figure 6 .......................................................................... 8 Changes to Figure 7 .......................................................................... 9 Changes to Figure 13, Figure 14, and Figure 15 ......................... 11 Changes to Figure 16, Figure 17, and Single-Supply Operation Section .............................................................................................. 12 Changes to Figure 21 ...................................................................... 13 Updated Outline Dimensions ....................................................... 14 8/2008—Rev. C to Rev. D Changes to Features Section............................................................ 1 Changes to General Description Section ...................................... 1 Changes to Figure 1 .......................................................................... 1 Changes to Table 2 ............................................................................ 5 Change to Figure 2 ............................................................................5 Changes to Figure 15...................................................................... 10 Changes to Connections for dB Operation Section .................. 11 Changes to Figure 17...................................................................... 12 Changes to Frequency Response Section .................................... 12 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 3/2006—Rev. B to Rev. C Updated Format .................................................................. Universal Changed Product Description to General Description ................1 Changes to General Description .....................................................1 Changes to Table 1.............................................................................3 Changes to Table 2.............................................................................5 Added Pin Configurations and Function Descriptions ...............6 Changed Standard Connection to Typical Connections .............8 Changed Single Supply Connection to Single Supply Operation............................................................................................9 Changes to Connections for dB Operation................................. 11 Changes to Figure 17...................................................................... 12 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 6/1999—Rev. A to Rev. B 1/1976—Revision 0: Initial Version Rev. G | Page 2 of 15 Data Sheet AD536A SPECIFICATIONS TA = +25°C and ±15 V dc, unless otherwise noted. Table 1. AD536AJ Parameter TRANSFER FUNCTION CONVERSION ACCURACY Total Error, Internal Trim1 (See Figure 13) vs. Temperature TMIN to +70°C Min AD536AK Typ Max VOUT = √Avg(VIN)2 Min AD536AS Typ Max VOUT = √Avg(VIN)2 Min Typ Max VOUT = √Avg(VIN)2 ±5 ± 0.5 ±2 ± 0.2 ±5 ± 0.5 mV ± % of rdg ±0.1 ± 0.01 ±0.05 ± 0.005 ±0.1 ± 0.005 ±0.3 ± 0.005 mV ± % of rdg/°C +70°C to +125°C vs. Supply Voltage DC Reversal Error Total Error, External Trim1 (See Figure 16) ERROR VS. CREST FACTOR2 Crest Factor 1 to Crest Factor 2 Crest Factor = 3 Crest Factor = 7 FREQUENCY RESPONSE3 Bandwidth for 1% Additional Error (0.09 dB) VIN = 10 mV VIN = 100 mV VIN = 1 V ±3 dB Bandwidth VIN = 10 mV VIN = 100 mV VIN = 1 V AVERAGING TIME CONSTANT (See Figure 19) INPUT CHARACTERISTICS Signal Range, ±15 V Supplies Continuous RMS Level Peak Transient Input Continuous RMS Level, VS = ±5 V Peak Transient Input, VS = ±5 V Maximum Continuous Nondestructive Input Level (All Supply Voltages) Input Resistance Input Offset Voltage OUTPUT CHARACTERISTICS Offset Voltage, VIN = COM (See Figure 13) vs. Temperature vs. Supply Voltage Voltage Swing, ±15 V Supplies ± 5 V Supply dB OUTPUT, 0 dB = 1 V rms (See Figure 7) Error, 7 mV < VIN < 7 V rms Scale Factor Scale Factor Temperature Coefficient Uncompensated IREF for 0 dB = 1 V rms IREF Range ±0.1 ± 0.01 ±0.2 ±3 ± 0.3 ±0.1 ± 0.01 ±0.1 ±2 ± 0.1 Specified accuracy −0.1 −1.0 mV ± % of rdg/V mV ± % of rdg mV ± % of rdg Specified accuracy −0.1 −1.0 % of rdg % of rdg 5 45 120 5 45 120 kHz kHz kHz 90 450 2.3 25 90 450 2.3 25 90 450 2.3 25 kHz kHz MHz ms/μF 0 to 7 0 to 2 V rms V peak V rms 0 to 2 ±7 ±7 V peak ±25 ±25 ±25 V peak 20 ±2 kΩ mV ±2 mV ±0.2 mV/°C mV/V V V ±0.6 dB mV/dB dB/°C 20 ±2 ±1 ±2 ±0.1 ±0.1 +12.5 +0.33 20 ±20 ±7 16.67 0.8 ±0.4 −3 −0.033 0 to 7 ±20 0 to 2 5 1 mV ± % of rdg/°C 5 45 120 ±20 0 to +11 0 to +2 ±0.1 ± 0.01 ±0.2 ±3 ± 0.3 Specified accuracy −0.1 −1.0 0 to 7 13.33 Unit 13.33 0 to +11 0 to +2 ±0.6 80 100 16.67 0.5 20 ±1 ±0.5 ±1 ±0.1 ±0.1 +12.5 ±0.2 −3 −0.033 5 1 +0.33 20 Rev. G | Page 3 of 15 13.33 0 to +11 0 to +2 ±0.3 80 100 16.67 0.8 ±0.2 +12.5 ±0.5 −3 −0.033 5 1 +0.33 20 80 100 % of rdg/°C μA μA AD536A Data Sheet AD536AJ Parameter IOUT TERMINAL IOUT Scale Factor IOUT Scale Factor Tolerance Output Resistance Voltage Compliance BUFFER AMPLIFIER Input and Output Voltage Range Input Offset Voltage, RS = 25 kΩ Input Bias Current Input Resistance Output Current Short-Circuit Current Output Resistance Small-Signal Bandwidth Slew Rate4 POWER SUPPLY Voltage Rated Performance Dual Supply Single Supply Quiescent Current Total VS, 5 V to 36 V, TMIN to TMAX TEMPERATURE RANGE Rated Performance Storage NUMBER OF TRANSISTORS Min Typ 20 40 ±10 25 −VS to (+VS − 2.5 V) AD536AK Max ±20 30 −VS to (+VS − 2.5V) Min Typ 20 40 ±10 25 −VS to (+VS − 2.5 V) AD536AS Max ±20 30 −VS to (+VS − 2.5V) ±0.5 20 108 ±4 60 (+5 mA, −130 μA) 0 −55 1 5 ±15 ±3.0 +5 2 +70 +150 65 0.5 1 5 ±18 +36 ±4 60 20 0.5 ±15 ±20 30 Unit μA/V rms % kΩ V V ±0.5 20 108 20 1 5 Max mV nA Ω (+5 mA, −130 μA) 0.5 1.2 20 40 ±10 25 −VS to (+VS − 2.5 V) ±4 60 (+5 mA, −130 μA) ±3.0 +5 Typ −VS to (+VS − 2.5V) ±0.5 20 108 20 Min ±15 ±18 +36 1.2 0 −55 2 +70 +150 65 1 ±3.0 +5 1.2 −55 −55 65 Accuracy is specified for 0 V to 7 V rms, dc or 1 kHz sine wave input with the AD536A connected as in the figure referenced. Error vs. crest factor is specified as an additional error for 1 V rms rectangular pulse input, pulse width = 200 μs. 3 Input voltages are expressed in volts rms, and error is expressed as a percentage of the reading. 4 With 2 kΩ external pull-down resistor. 2 Rev. G | Page 4 of 15 mA Ω MHz V/μs ±18 +36 V V V 2 mA +125 +150 °C °C Data Sheet AD536A ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Dual Supply Single Supply Internal Power Dissipation Maximum Input Voltage Buffer Maximum Input Voltage Maximum Input Voltage Storage Temperature Range Operating Temperature Range AD536AJ/AD536AK AD536AS Lead Temperature (Soldering, 60 sec) ESD Rating Thermal Resistance θJA1 10-Pin Header (H-10 Package) 20-Terminal LCC (E-20 Package) 14-Lead SBDIP (D-14 Package) 14-Lead CERDIP (Q-14 Package) ±18 V +36 V 500 mW ±25 V peak ±VS ±25 V peak −55°C to +150°C ESD CAUTION 0°C to +70°C −55°C to +125°C 300°C 1000 V 150°C/W 95°C/W 95°C/W 95°C/W θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. +VS 14 0.1315 (3.340) COM 10 RL 9 IOUT 8 0.0807 (2.050) VIN 1A1 VIN 1B1 BUF IN 7 CAV dB BUF OUT –VS 6 3 4 5 PAD NUMBERS CORRESPOND TO PIN NUMBERS FOR THE TO-100 14-LEAD CERAMIC DIP PACKAGE. 1BOTH PADS SHOWN MUST BE CONNECTED TO VIN. THE AD536A IS AVAILABLE IN LASER-TRIMMED CHIP FORM. SUBSTRATE CONNECTED TO –VS. Figure 2. Die Dimensions and Pad Layout Dimensions shown in inches and (millimeters) Rev. G | Page 5 of 15 00504-002 1 Rating Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. AD536A Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VIN 1 14 +VS NC 2 13 NC 12 NC –VS 3 AD536A TOP VIEW 11 NC (Not to Scale) dB 5 10 COM BUF OUT 6 9 RL BUF IN 7 8 IOUT NC = NO CONNECT 00504-003 CAV 4 Figure 3. D-14 and Q-14 Packages Pin Configuration Table 3. D-14 and Q-14 Packages Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic VIN NC −VS CAV dB BUF OUT BUF IN IOUT RL COM NC NC NC +VS Description Input Voltage No Connection Negative Supply Voltage Averaging Capacitor Log (dB) Value of the RMS Output Voltage Buffer Output Buffer Input RMS Output Current Load Resistor Common No Connection No Connection No Connection Positive Supply Voltage IOUT BUF IN 10 1 COM 2 9 AD536A TOP VIEW (Not to Scale) +VS 3 4 VIN 8 BUF OUT 7 dB 6 5 CAV –VS 00504-004 RL Figure 4. H-10 Package Pin Configuration Table 4. H-10 Package Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic RL COM +VS VIN −VS CAV dB BUF OUT BUF IN IOUT Description Load Resistor Common Positive Supply Voltage Input Voltage Negative Supply Voltage Averaging Capacitor Log (dB) Value of the RMS Output Voltage Buffer Output Buffer Input RMS Output Current Rev. G | Page 6 of 15 VIN NC +VS NC AD536A NC Data Sheet 3 2 1 20 19 –VS 4 18 NC NC 5 AD536A 17 NC CAV 6 TOP VIEW (Not to Scale) 16 NC 15 NC dB 8 9 10 11 12 13 BUF OUT BUF IN NC IOUT RL 14 COM NC = NO CONNECT 00504-005 NC 7 Figure 5. E-20-1 Package Pin Configuration Table 5. E-20-1 Package Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Mnemonic NC VIN NC −VS NC CAV NC dB BUF OUT BUF IN NC IOUT RL COM NC NC NC NC NC +VS Description No Connection Input Voltage No Connection Negative Supply Voltage No Connection Averaging Capacitor No Connection Log (dB) Value of the RMS Output Voltage Buffer Output Buffer Input No Connection RMS Output Current Load Resistor Common No Connection No Connection No Connection No Connection No Connection Positive Supply Voltage Rev. G | Page 7 of 15 AD536A Data Sheet THEORY OF OPERATION The AD536A embodies an implicit solution of the rms equation that overcomes the dynamic range as well as other limitations inherent in a straightforward computation of rms. The actual computation performed by the AD536A follows the equation V 2  V rms  Avg  IN   V rms  VOUT = 2R2 × I rms = VIN rms Figure 6 is a simplified schematic of the AD536A. Note that it is subdivided into four major sections: absolute value circuit (active rectifier), squarer/divider, current mirror, and buffer amplifier. The input voltage (VIN), which can be ac or dc, is converted to a unipolar current (I1) by the active rectifiers (A1, A2). I1 drives one input of the squarer/divider, which has the transfer function 2 I I4 = I /I3 The output current, I4, of the squarer/divider drives the current mirror through a low-pass filter formed by R1 and the externally connected capacitor, CAV. If the R1 CAV time constant is much greater than the longest period of the input signal, then I4 is effectively averaged. The current mirror returns a current I3, which equals Avg[I4], back to the squarer/divider to complete the implicit rms computation. Thus, CURRENT MIRROR 14 +VS 10 4 A3 I2 I1 VIN Q1 |VIN|R–1 Q3 1 Q2 A1 12kΩ R3 25kΩ R1 0.4mA 25kΩ FS I3 Q4 Q5 A2 R2 25kΩ NOTES 1. PINOUTS ARE FOR 14-LEAD DIP. Figure 6. Simplified Schematic 9 RL 80kΩ CONNECTIONS FOR dB OPERATION The logarithmic (or decibel) output of the AD536A is one of its most powerful features. The internal circuit computing dB works accurately over a 60 dB range. The connections for dB measurements are shown in Figure 7. Select the 0 dB level by adjusting R1 for the proper 0 dB reference current (which is set to cancel the log output current from the squarer/divider at the desired 0 dB point). The external op amp provides a more convenient scale and allows compensation of the +0.33%/°C scale factor drift of the dB output pin. 5 For dB calibration, 6 1. 2. 3. 4. BUF IN BUFFER dB OUT 7 A4 25kΩ ONE-QUADRANT SQUARER/DIVIDER 12kΩ 8 IOUT COM BUF OUT 3 –VS 00504-106 0.2mA FS ABSOLUTE VALUE; VOLTAGE-CURRENT CONVERTER The dB output is derived from the emitter of Q3 because the voltage at this point is proportional to –log VIN. The emitter follower, Q5, buffers and level shifts this voltage so that the dB output voltage is zero when the externally supplied emitter current (IREF) to Q5 approximates I3. The temperature-compensating resistor, R2, is available online in several styles from Precision Resistor Company, Inc., (Part Number AT35 and Part Number ST35). The average temperature coefficients of R2 and R3 result in the +3300 ppm required to compensate for the dB output. The linear rms output is available at Pin 8 on the DIP or Pin 10 on the header device with an output impedance of 25 kΩ. Some applications require an additional buffer amplifier if this output is desired. I4 = Avg[II2/I4] = II rms R4 50kΩ The current mirror also produces the output current, IOUT, which equals 2I4. IOUT can be used directly or can be converted to a voltage with R2 and buffered by A4 to provide a low impedance voltage output. The transfer function of the AD536A results in the following: Set VIN = 1.00 V dc or 1.00 V rms. Adjust R1 for dB output = 0.00 V. Set VIN = +0.1 V dc or 0.10 V rms. Adjust R5 for dB output = −2.00 V. Any other desired 0 dB reference level can be used by setting VIN and adjusting R1 accordingly. Note that adjusting R5 for the proper gain automatically provides the correct temperature compensation. Rev. G | Page 8 of 15 Data Sheet AD536A VIN NC 2 –VS –VS + C1, CAV +VS C2 CAV dB 0.1µF BUF OUT dB OUT 3mV/dB BUF IN ABSOLUTE VALUE 1 14 AD536A 12 NC 11 NC 4 CURRENT MIRROR 5 10 6 9 COM RL 25kΩ 8 BUF 7 +VS 4.6V TO 18V +E 13 NC SQUARER/ DIVIDER 3 +VS IOUT EOUT AD580J 2.5V –E R1 500kΩ 0dB REF ADJUST R4 33.2kΩ dB SCALE FACTOR ADJUST +VS R6 24.9kΩ LINEAR rms OUTPUT R5 5kΩ 7 2 R3 60.4Ω OP77 3 6 TEMPERATURE COMPENSATED dB OUTPUT +100mV/dB 4 R21 1kΩ 00504-107 –VS 1SPECIAL TC COMPENSATION RESISTOR, +3300ppm/°C, PRECISION RESISTOR COMPANY PART NUMBER AT 35 OR PART NUMBER ST35. Figure 7. dB Connection FREQUENCY RESPONSE The AD536A utilizes a logarithmic circuit in performing the implicit rms computation. As with any log circuit, bandwidth is proportional to signal level. The solid lines in the graph of Figure 8 represent the frequency response of the AD536A at input levels from 10 mV rms to 7 V rms. The dashed lines indicate the upper frequency limits for 1%, 10%, and ±3 dB of reading additional error. For example, note that a 1 V rms signal produces less than 1% of reading additional error up to 120 kHz. A 10 mV signal can be measured with 1% of reading additional error (100 μV) up to only 5 kHz. Figure 9 illustrates a curve of reading error for the AD536A for a 1 V rms input signal with crest factors from 1 to 11. A rectangular pulse train (pulse width = 100 μs) was used for this test because it is the worst-case waveform for rms measurement (all of the energy is contained in the peaks). The duty cycle and peak amplitude were varied to produce crest factors from 1 to 11 while maintaining a constant 1 V rms input amplitude. T өO 0 η = DUTY CYCLE = CF = 1/√η өIN (rms) = 1 V rms VP 100µs T 100µs 1 VOUT (V) 10% 1 ±3dB 1V rms INPUT 0.1 100mV rms INPUT 0.01 1k 10k 100k FREQUENCY (Hz) 1M 10M 00504-016 10mV rms INPUT 0 –1 –2 –3 –4 1 2 3 4 Figure 8. High Frequency Response 5 6 7 CREST FACTOR 8 9 10 Figure 9. Error vs. Crest Factor Crest factor is often overlooked when determining the accuracy of an ac measurement. The definition of crest factor is the ratio of the peak signal amplitude to the rms value of the signal (CF = VP/V rms). Most common waveforms, such as sine and triangle waves, have relatively low crest factors (
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