AD5535ABC

32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V AD5535 FEATURES GENERAL DESCRIPTION High integration 32-channel, 14-bit DAC with integrated high voltage output amplifier Guaranteed monotonic Housed in 15 mm × 15 mm CSP_BGA package Full-scale output voltage Programmable from 50 V to 200 V via reference input 700 μA drive capability Integrated silicon diode for temperature monitoring DSP-/microcontroller-compatible serial interface 1.2 MHz channel update rate Asynchronous RESET facility –10°C to +85°C temperature range The AD5535 is a 32-channel, 14-bit DAC with an on-chip high voltage output amplifier. This device is targeted for optical micro-electromechanical systems. The output voltage range is programmable via the REF_IN pin. The output range is 0 V to 50 V when REF_IN = 1 V, and 0 V to 200 V when REF_IN = 4 V. Each amplifier can source 700 μA, which is ideal for the deflection and control of optical MEMS mirrors. The selected DAC register is written to via the 3-wire interface. The serial interface operates at clock rates of up to 30 MHz and is compatible with DSP and microcontroller interface standards. The device is operated with AVCC = 4.75 V to 5.25 V, DVCC = 2.7 V to 5.25 V, V− = −4.75 V to −5.25 V, V+ = 4.75 V to 5.25 V, and VPP = 210 V. REF_IN is buffered internally on the AD5535 and should be driven from a stable reference source. APPLICATIONS Optical micro-electromechanical systems (MEMS) Optical crosspoint switches Micropositioning applications using piezoelectric actuators Level setting in automotive test and measurement FUNCTIONAL BLOCK DIAGRAM DVCC RESET AVCC REF_IN VPP PGND V– V+ ANODE AD5535 CATHODE DAC R1 VOUT0 RF 14-BIT BUS DAC R1 DAC_GND DAC R1 AGND VOUT30 RF DAC R1 INTERFACE CONTROL LOGIC SCLK DIN VOUT31 RF 05068-001 DGND VOUT1 RF SYNC Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. AD5535 TABLE OF CONTENTS Features .............................................................................................. 1 Reset Function ............................................................................ 12 Applications....................................................................................... 1 Serial Interface ............................................................................ 12 General Description ......................................................................... 1 Microprocessor Interfacing....................................................... 12 Functional Block Diagram .............................................................. 1 Applications..................................................................................... 14 Specifications..................................................................................... 3 MEMS Mirror Control Application......................................... 14 Timing Characteristics ................................................................ 5 IPC-221-Compliant Board Layout........................................... 14 Absolute Maximum Ratings............................................................ 6 Power Supply Sequencing and Decoupling Recommendations...................................................................... 15 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 9 Terminology .................................................................................... 11 Guidelines for Printed Circuit Board Layout ......................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16 Functional Description .................................................................. 12 DAC Section................................................................................ 12 REVISION HISTORY 8/05—Rev. 0 to Rev. A Changes to Table 3............................................................................ 6 Changes to Ordering Guide .......................................................... 16 5/05—Revision 0: Initial Version Rev. A | Page 2 of 16 AD5535 SPECIFICATIONS VPP = 210 V, V− = −5 V, V+ = +5 V; AVCC = 5.25 V; DVCC = 2.7 V to 5.25 V; PGND = AGND = DGND = DAC_GND = 0 V; REF_IN = 4.096 V; all outputs unloaded. All specifications TMIN to TMAX, unless otherwise noted. Table 1. 1 Parameter DC PERFORMANCE 3 Resolution Integral Nonlinearity (INL) Differential Nonlinearity (DNL) Zero-Code Voltage Output Offset Error Offset Drift Voltage Gain Gain Temperature Coefficient Channel-to-Channel Gain Match 4 Full-Scale Voltage Drift OUTPUT CHARACTERISTICS Output Voltage Range3 Output Impedance Resistive Load4, 5 Capacitive Load4 Short-Circuit Current DC Crosstalk4 DC Power Supply Rejection (PSRR), VPP AC CHARACTERISTICS4 Settling Time ¼ to ¾ Scale Step Min –1 14 ±0.1 ±0.5 1 –2 47.5 0.02 50 5 –5 Max +1 2.5 +2 52.5 +5 3 2.5 VPP − 10 50 1 200 0.7 3 70 30 65 10 10 10 3 1 LSB Step Slew Rate –3 dB Bandwidth Output Noise Spectral Density 0.1 Hz to 10 Hz Output Noise Voltage Digital-to-Analog Glitch Impulse Analog Crosstalk Digital Feedthrough VOLTAGE REFERENCE, REF_IN 6 Input Voltage Range4 Input Current TEMPERATURE MEASUREMENT DIODE4 Peak Inverse Voltage, PIV Forward Diode Drop, VF Forward Diode Current, IF VF Temperature Coefficient, TC A Grade 2 Typ Unit Bits % of FSR LSB V V mV/°C V/V ppm/°C % ppm/°C 4.5 1 10 13 1 Guaranteed monotonic V Ω MΩ pF mA LSB dB μs μs μs μs V/μs V/μs kHz μV/√Hz mV p-p nV-s μV-s nV-s 5 Conditions/Comments No load 200 pF load No load 200 pF load No load 200 pF load Measured at 10 kHz 1 LSB change around major carry AVCC must exceed REF_IN by 1.15 V min 1 0.65 4.096 1.25 V μA 5 0.8 100 V V μA mV/°C −2.20 Rev. A | Page 3 of 16 Cathode to anode IF = 100 μA, anode to cathode Anode to cathode Anode to cathode AD5535 1 Parameter DIGITAL INPUTS4 Input Current Input Low Voltage Input High Voltage Input Hysteresis (SCLK and SYNC Only) Input Capacitance POWER SUPPLY VOLTAGES7 VPP V– V+ AVCC DVCC POWER SUPPLY CURRENTS 7 IPP I− I+ AICC DICC POWER DISSIPATION7 Min A Grade 2 Typ ±5 Max Unit ±10 0.8 10 μA V V mV pF 225 –4.75 5.25 5.25 5.25 V V V V V 100 3.5 1 18 0.5 μA/channel mA mA mA mA mW 2.0 200 (50 × REF_IN) + 10 –5.25 4.75 4.75 2.7 75 2.3 0.5 15 0.25 594 1 Conditions/Comments See the Terminology section. A Grade temperature range: −10°C to +85°C; typical = +25°C. 3 Linear output voltage range: +7 V to VPP − 10 V. 4 Guaranteed by design and characterization, not production tested. 5 Ensure that TJ max is not exceeded. See the Absolute Maximum Ratings section. 6 Reference input determines output voltage range. Using a 4.096 V reference (REF198) gives an output voltage range of 2.50 V to 200 V. The output range is programmable via the reference input. The full-scale output range is programmable from 50 V to 200 V. The linear output voltage range is restricted from 7 V to VPP − 10 V. 7 Outputs unloaded. 2 Rev. A | Page 4 of 16 AD5535 TIMING CHARACTERISTICS VPP = 210 V, V− = –5 V, V+ = +5 V; AVCC = 5.25 V; DVCC = 2.7 V to 5.25 V; AGND = DGND = DAC_GND = 0 V; REF_IN = 4.096 V. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter 1, 2 , 3 fUPDATE fCLKIN t1 t2 t3 t4 t5 t6 t7 t8 t9 A Grade 1.2 30 13 13 15 50 10 10 5 200 20 Unit MHz max MHz max ns min ns min ns min ns min ns min ns min ns min ns min ns min Conditions/Comments Channel Update Rate SCLK Frequency SCLK High Pulse Width SCLK Low Pulse Width SYNC Falling Edge to SCLK Falling Edge Setup Time SYNC Low Time SYNC High Time DIN Setup Time DIN Hold Time 19th SCLK Falling Edge to SYNC Falling Edge for Next Write RESET Pulse Width 1 See Figure 2. Guaranteed by design and characterization, not production tested. 3 All input signals are specified with tr = tf = 5 ns (10% to 90% of DVCC) and timed from a voltage level of (VIL + VIH)/2. 2 t1 SCLK 1 2 t3 5 4 16 17 18 1 19 t2 t5 SYNC 3 t4 t6 t8 t7 DIN MSB LSB 05068-002 RESET t9 Figure 2. Serial Interface Timing Diagram Rev. A | Page 5 of 16 AD5535 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VPP to AGND V− to AGND V+ to AGND AVCC to AGND, DAC_GND DVCC to DGND Digital Inputs to DGND REF_IN to AGND, DAC_GND VOUT (0 to 31) to AGND Anode/Cathode to AGND, DAC_GND AGND to DGND Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (TJ max) 124-Lead CSP_BGA Package, θJA Thermal Impedance Lead Temperature Soldering Vapor Phase (60 sec) Infrared (15 sec) Reflow Soldering (Pb-free) Peak Temperature Time at Peak Temperature ESD (Human Body Model) Rating 0.3 V to 250 V +0.3 V to −6 V −0.3 V to +7 V −0.3 V to +7 V −0.3 V to +7 V −0.3 V to DVCC + 0.3 V −0.3 V to AVCC + 0.3 V V– to VPP −0.3 V to +7 V −0.3 V to +0.3 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Transient currents up to 100 mA do not cause SCR latch-up. This device is an integrated high voltage circuit with an ESD rating of