AD587

High Precision 10 V Reference AD587 FEATURES Laser Trimmed to High Accuracy: 10.000 V 5 mV (L and U Grades) Trimmed Temperature Coefficient: 5 ppm/ C Max (L and U Grades) Noise Reduction Capability Low Quiescent Current: 4 mA Max Output Trim Capability MIL-STD-883 Compliant Versions Available FUNCTIONAL BLOCK DIAGRAM +VIN 2 RS A1 RF RT 5 TRIM RI 6 VOUT NOISE REDUCTION 8 AD587 4 GND NOTE PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS. NO CONNECTIONS TO THESE POINTS. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD587 represents a major advance in state-of-the-art monolithic voltage references. Using a proprietary ion-implanted buried Zener diode and laser wafer trimming of high stability thin-film resistors, the AD587 provides outstanding performance at low cost. The AD587 offers much higher performance than most other 10 V references. Because the AD587 uses an industry-standard pinout, many systems can be upgraded instantly with the AD587. The buried Zener approach to reference design provides lower noise and drift than band gap voltage references. The AD587 offers a noise reduction pin that can be used to further reduce the noise level generated by the buried Zener. The AD587 is recommended for use as a reference for 8-, 10-, 12-, 14-, or 16-bit DACs that require an external precision reference. The device is also ideal for successive approximation or integrating ADCs with up to 14 bits of accuracy and, in general, can offer better performance than the standard on-chip references. The AD587J, AD587K, and AD587L are specified for operation from 0°C to 70°C, and the AD587U is specified for –55°C to +125°C operation. All grades are available in 8-lead CERDIP. The J and K versions are also available in an 8-lead SOIC package for surface-mount applications, while the J, K, and L grades also come in an 8-lead PDIP. 1. Laser trimming of both initial accuracy and temperature coefficients results in very low errors over temperature without the use of external components. The AD587L has a maximum deviation from 10.000 V of ± 8.5 mV between 0°C and 70°C, and the AD587U guarantees ± 14 mV maximum total error between –55°C and +125°C. 2. For applications requiring higher precision, an optional fine trim connection is provided. 3. Any system using an industry-standard pinout 10 V reference can be upgraded instantly with the AD587. 4. Output noise of the AD587 is very low, typically 4 µV p-p. A noise reduction pin is provided for additional noise filtering using an external capacitor. 5. The AD587 is available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Products Databook or the current AD587/883B Data Sheet for detailed specifications. R EV. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved. AD587–SPECIFICATIONS (T = 25 C, V A IN = 15 V, unless otherwise noted.) AD587K Typ AD587L/AD587U Min Typ Max 10.005 5 5 +3 –1 Parameter OUTPUT VOLTAGE OUTPUT VOLTAGE DRIFT 0°C to 70°C –55°C to +125°C GAIN ADJUSTMENT LINE REGULATION1 13.5 V ≤ +VIN ≤ 36 V TMIN to TMAX LOAD REGULATION Sourcing 0 mA < I OUT < 10 mA TMIN to TMAX Sourcing –10 mA < IOUT < 0 mA2 TMIN to TMAX QUIESCENT CURRENT POWER DISSIPATION OUTPUT NOISE 0.1 Hz to 10 Hz Spectral Density, 100 Hz LONG-TERM STABILITY SHORT-CIRCUIT CURRENT-TO-GROUND SHORT-CIRCUIT CURRENT-TO-V IN TEMPERATURE RANGE Specified Performance (J, K, L) Operating Performance (J, K, L) 3 Specified Performance (U) Operating Performance (U) 3 1 1 Min 9.990 AD587J Typ Max 10.010 20 20 Min 9.995 Max Unit V ppm/°C % 10.005 9.995 10 10 +3 –1 +3 –1 ± 100 ± 100 ± 100 µV/V ± 100 ± 100 2 30 4 100 ± 15 30 30 0 –40 –55 –55 70 70 +70 +85 +125 +125 0 –40 –55 –55 4 2 30 4 100 ± 15 30 30 ± 100 ± 100 4 2 30 4 100 ± 15 70 70 +70 +85 +125 +125 0 –40 –55 –55 30 30 ± 100 ± 100 4 µV/mA mA mW µV p-p nV/√Hz ppm/1000 hr. 70 70 +70 +85 +125 +125 mA mA °C NOTES 1 Specification is guaranteed for all packages and grades. CERDIP packaged parts are 100% production tested. 2 Load regulation (sinking) specification for SOIC (R) package is ± 200 µV/mA. 3 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range. Specifications subject to change without notice. –2– R EV. F AD587 ABSOLUTE MAXIMUM RATINGS * PIN CONFIGURATION TP* 1 +VIN 2 TP* 3 NOISE REDUCTION 7 TP* 8 +VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Power Dissipation (25°C) . . . . . . . . . . . . . . . . . . . . . 500 mW Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C Package Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22°C/W JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W JA Output Protection: Output safe for indefinite short to ground and momentary short to +VIN. *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AD587 TOP VIEW 6 VOUT (Not to Scale) 5 TRIM GND 4 *TP DENOTES FACTORY TEST POINT. NO CONNECTIONS SHOULD BE MADE TO THESE PINS. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD587 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model AD587JQ AD587JR AD587JR-REEL AD587JR-REEL7 AD587JRZ2 AD587JRZ-REEL2 AD587JRZ-REEL72 AD587JN AD587JNZ2 AD587KQ AD587KR AD587KR-REEL AD587KR-REEL7 AD587KRZ2 AD587KRZ-REEL2 AD587KRZ-REEL72 AD587KN AD587LQ AD587LN AD587UQ Initial Error 10 mV 10 mV 10 mV 10 mV 10 mV 10 mV 10 mV 10 mV 10 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV 5 mV Temperature Coefficient 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 20 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 10 ppm/°C 5 ppm/°C 5 ppm/°C 5 ppm/°C Temperature Range 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –55°C to +125°C Package Option1 Q-8 R-8 R-8 R-8 R-8 R-8 R-8 N-8 N-8 Q-8 R-8 R-8 R-8 R-8 R-8 R-8 N-8 Q-8 N-8 Q-8 NOTES 1 N = PDIP; Q = CERDIP; R = SOIC. 2 Z = Pb-free part. R EV. F –3– AD587 THEORY OF OPERATION NOISE PERFORMANCE AND REDUCTION The AD587 consists of a proprietary buried Zener diode reference, an amplifier to buffer the output, and several high stability thin-film resistors as shown in the block diagram in Figure 1. This design results in a high precision monolithic 10 V output reference with initial offset of 5 mV or less. The temperature compensation circuitry provides the device with a temperature coefficient of under 5 ppm/°C. +VIN 2 RS A1 RF RT 5 TRIM RI 6 VOUT NOISE REDUCTION 8 The noise generated by the AD587 is typically less than 4 µV p-p over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is approximately 200 µV p-p. The dominant source of this noise is the buried Zener, which contributes approximately 100 nV/√Hz. In comparison, the op amp’s contribution is negligible. Figure 3 shows the 0.1 Hz to 10 Hz noise of a typical AD587. The noise measurement is made with a band-pass filter made of a 1-pole high-pass filter with a corner frequency at 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 12.6 Hz to create a filter with a 9.922 Hz bandwidth. AD587 4 GND NOTE PINS 1, 3 AND 7 ARE INTERNAL TEST POINTS. NO CONNECTIONS TO THESE POINTS. Figure 1. Functional Block Diagram A capacitor can be added at the NOISE REDUCTION pin (Pin 8) to form a low-pass filter with RS to reduce the noise contribution of the Zener to the circuit. APPLYING THE AD587 Figure 3. 0.1 Hz to 10 Hz Noise The AD587 is simple to use in virtually all precision reference applications. When power is applied to Pin 2, and Pin 4 is grounded, Pin 6 provides a 10 V output. No external components are required; the degree of desired absolute accuracy is achieved simply by selecting the required device grade. The AD587 requires less than 4 mA quiescent current from an operating supply of 15 V. Fine trimming may be desired to set the output level to exactly 10.000 V (calibrated to a main system reference). System calibration may also require a reference voltage that is slightly different from 10.000 V, for example, 10.24 V for binary applications. In either case, the optional trim circuit shown in Figure 2 can offset the output by as much as 300 mV with minimal effect on other device characteristics. +VIN 2 OPTIONAL NOISE REDUCTION CAPACITOR CN 1F VIN 8 NOISE VO 6 REDUCTION OUTPUT If further noise reduction is desired, an external capacitor may be added between the NOISE REDUCTION pin and ground, as shown in Figure 2. This capacitor, combined with the 4 kΩ RS and the Zener resistances, forms a low-pass filter on the output of the Zener cell. A 1 µF capacitor will have a 3 dB point at 40 Hz, and will reduce the high frequency (to 1 MHz) noise to about 160 µV p-p. Figure 4 shows the 1 MHz noise of a typical AD587 both with and without a 1 µF capacitor. Figure 4. Effect of 1 µ F Noise Reduction Capacitor on Broadband Noise TURN-ON TIME AD587 TRIM GND 4 5 10k Figure 2. Optional Fine Trim Configuration Upon application of power (cold start), the time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active circuits to settle, and the time for the thermal gradients on the chip to stabilize. Figure 5 shows the turn-on characteristics of the AD587. It shows the settling to be about 60 µs to 0.01%. Note the absence of any thermal tails when the horizontal scale is expanded to 1 ms/cm in Figure 5b. –4– R EV. F AD587 Output turn-on time is modified when an external noise reduction capacitor is used. When present, this capacitor acts as an additional load to the internal Zener diode’s current source, resulting in a somewhat longer turn-on time. In the case of a 1 µF capacitor, the initial turn-on time is approximately 400 ms to 0.01% (see Figure 5c). DYNAMIC PERFORMANCE The output buffer amplifier is designed to provide the AD587 with static and dynamic load regulation superior to less complete references. Many ADCs and DACs present transient current loads to the reference, and poor reference response can degrade the converter’s performance. Figures 6b and 6c display the characteristics of the AD587 output amplifier driving a 0 mA to 10 mA load. VOUT 7.0V 1kΩ AD587 VL 10V 0V a. Electrical Turn-On Figure 6a. Transient Load Test Circuit b. Extended Time Scale Figure 6b. Large-Scale Transient Response c. Turn-On with 1 µ F CN Figure 5. Turn-On Characteristics Figure 6c. Fine Scale Setting for Transient Load R EV. F –5– AD587 In some applications, a varying load may be both resistive and capacitive in nature, or the load may be connected to the AD587 by a long capacitive cable. Figure 7b displays the output amplifier characteristics driving a 1000 pF, 0 mA to 10 mA load. TEMPERATURE PERFORMANCE The AD587 is designed for precision reference applications where temperature performance is critical. Extensive temperature testing ensures that the device’s high level of performance is maintained over the operating temperature range. Some confusion exists in the area of defining and specifying reference voltage error over temperature. Historically, references have been characterized using a maximum deviation per degree Celsius; i.e., ppm/°C. However, because of nonlinearities in temperature characteristics that originated in standard Zener references (such as “S” type characteristics), most manufacturers have begun to use a maximum limit error band approach to specify devices. This technique involves the measurement of the output at three or more different temperatures to specify an output voltage error band. Figure 9 shows the typical output voltage drift for the AD587L and illustrates the test methodology. The box in Figure 9 is bounded on the sides by the operating temperature extremes and on the top and the bottom by the maximum and minimum output voltages measured over the operating temperature range. The slope of the diagonal drawn from the lower left to the upper right corner of the box determines the performance grade of the device. TMIN 10.100 TMAX SLOPE = T.C. = VMAX – VMIN (TMAX – TMIN) VMAX 10 106 VOUT 7.0V CL 1000pF 1kΩ AD587 VL 10V 0V Figure 7a. Capacitive Load Transient /Response Test Circuit VMIN Figure 7b. Output Response with Capacitive Load LOAD REGULATION 10.000 –20 0 The AD587 has excellent load regulation characteristics. Figure 8 shows that varying the load several mA changes the output by only a few µV. VOUT ( V) 20 40 60 TEMPERATURE – C 80 Figure 9. Typical AD587L Temperature Drift 1000 500 2 –6 –4 –2 0 –500 –1000 4 6 8 10 LOAD (mA) Figure 8. Typical Load Regulation Characteristics Each AD587J, AD587K, and AD587L grade unit is tested at 0°C, 25°C, and 70°C. Each AD587U grade unit is tested at –55°C, +25°C, and +125°C. This approach ensures that the variations of output voltage that occur as the temperature changes within the specified range will be contained within a box whose diagonal has a slope equal to the maximum specified drift. The position of the box on the vertical scale will change from device to device as initial error and the shape of the curve vary. The maximum height of the box for the appropriate temperature range and device grade is shown in Figure 10. Duplication of these results requires a combination of high accuracy and stable temperature control in a test system. Evaluation of the AD587 will produce a curve similar to that in Figure 9, but output readings may vary depending on the test methods and equipment utilized. Figure 10. Maximum Output Change in mV –6– R EV. F AD587 NEGATIVE REFERENCE VOLTAGE FROM AN AD587 The AD587 can be used to provide a precision –10.000 V output as shown in Figure 11. The +VIN pin is tied to at least a +3.5 V supply, the output pin is grounded, and the AD587 ground pin is connected through a resistor, RS, to a –15 V supply. The –10 V output is now taken from the ground pin (Pin 4) instead of VOUT. It is essential to arrange the output load and the supply resistor RS so that the net current through the AD587 is between 2.5 mA and 10.0 mA. The temperature characteristics and longterm stability of the device will be essentially the same as that of a unit used in the standard +10 V output configuration. 3.5V → 26V 2 VIN VOUT 6 The AD587 can also be used as a precision reference for multiple DACs. Figure 13 shows the AD587, the AD7628 dual DAC, and the AD712 dual op amp hooked up for single-supply operation to produce 0 V to –10 V outputs. Because both DACs are on the same die and share a common reference and output op amps, the DAC outputs will exhibit similar gain TCs. +15V +15V 0.1 F VIN VOUT VREFA RFB A OUT A DAC A DATA INPUTS 18 AD587 GND DB0 DB7 DAC B DGND AGND VOUT A = 0 TO – 10V AD7628 RFB B OUT B AD712 VREFB AD587 GND 4 1nF ←IL RS 2.5mA < –15V VOUT B = 0 TO – 10V –10V Figure 13. AD587 as a 10 V Reference for a CMOS Dual DAC Precision Current Source 5V – I L < 10mA RS Figure 11. AD587 as a Negative 10 V Reference USING THE AD587 WITH CONVERTERS The design of the AD587 allows it to be easily configured as a current source. By choosing the control resistor RC in Figure 14, the user can vary the load current from the quiescent current (2 mA typically) to approximately 10 mA. +VIN 2 VIN VOUT 6 RC 500 MIN IL = 10V + I BIAS RC The AD587 is an ideal reference for a wide variety of 8-, 12-, 14-, and 16-bit ADCs and DACs. Several representative examples follow. 10 V Reference with Multiplying CMOS DACs or ADCs The AD587 is ideal for applications with 10-bit and 12-bit multiplying CMOS DACs. In the standard hookup, as shown in Figure 12, the AD587 is paired with the AD7545 12-bit multiplying DAC and the AD711 high speed BiFET op amp. The amplifier DAC configuration produces a unipolar 0 V to –10 V output range. Bipolar output applications and other operating details can be found in the individual product data sheets. +15V +15V 0.1 F VIN C1 33pF VDD VREF 10k RFB OUT1 R2 +15V 0.1 F AD587 GND 4 Figure 14. Precision Current Source AD587 VOUT TRIM GND AD711K AGND DGND 0.1 F VOUT 0 TO – 10V AD7545K DB11–DB0 –15V Figure 12. Low Power 12-Bit CMOS DAC Application R EV. F –7– AD587 Precision High Current Supply +VIN For higher currents, the AD587 can easily be connected to a power PNP or power Darlington PNP device. The circuits in Figure 15a and 15b can deliver up to 4 A to the load. The 0.1 µF capacitor is required only if the load has a significant capacitive component. If the load is purely resistive, improved high frequency supply rejection results can be obtained by removing the capacitor. +VIN 220 2N6285 0.1 F 220 2N6285 2 +VS AD587 VOUT 6 VOUT +10V @ 4 AMPS 0.1 F 4 2 +VS Figure 15b. Precision High Current Voltage Source VOUT 6 RC IL = 10V + IBIAS RC AD587 4 Figure 15a. Precision High Current Current Source –8– R EV. F AD587 OUTLINE DIMENSIONS 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 8 5 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 8 0.055 (1.40) MAX 5 1 4 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) PIN 1 1 4 0.310 (7.87) 0.220 (5.59) 0.100 (2.54) BSC 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.100 (2.54) BSC 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.015 (0.38) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 8 5 4 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE 1.75 (0.0688) 1.35 (0.0532) 8 0.25 (0.0098) 0 0.17 (0.0067) 0.50 (0.0196) 0.25 (0.0099) 45 0.51 (0.0201) 0.31 (0.0122) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN R EV. F –9– AD587 Revision History Location 7/04—Data Sheet Changed from REV. E to REV. F. Page Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7/03—Data Sheet Changed from REV. D to REV. E. Deletion of S and T grades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Deletion of DIE SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to Figure 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 –10– R EV. F – 11– –12– C00530–0–7/04(F)