0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
AD6402ARS

AD6402ARS

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD6402ARS - IF Transceiver Subsystem - Analog Devices

  • 数据手册
  • 价格&库存
AD6402ARS 数据手册
a FEATURES On-Chip Regulator PLL Demodulator On-Chip VCO No Trims Excellent Sensitivity 28-Lead SSOP Package APPLICATIONS DECT/PWT/WLAN TDMA FM/FSK Systems IFIN IF Transceiver Subsystem AD6402 FUNCTIONAL BLOCK DIAGRAM RSSI LIMITER/FILTER PLL DEMOD TXOUT TXOUTB 2 CFILT DOUT DFILP AD6402 VCO IF VCO DC OFFSET COMP MODE CONTROL 1 PLLOUT REFSEL COFF REFIN VOLTAGE REGULATOR FMMOD2 VREF FMMOD1 GENERAL DESCRIPTION The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation. It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS. The AD6402 integrates key functions, including VCOs and a low drop-out voltage regulator. The AD6402 operates directly from an unregulated battery supply of 3.1 V to 4.5 V and provides a regulated voltage output which can be used for VCO supply regulation on a companion RF chip such as the AD6401. The AD6402 transceiver consists of a mixer, integrated IF bandpass filter, IF limiter with RSSI detection, VCO, PLL demodulator and a low dropout voltage regulator. On receive, it downconverts an IF signal in the 110 MHz range to a second IF frequency, this frequency being determined by the demodulator reference divide ratios. It then filters, amplifies, and demodulates this signal. The AD6402 provides a filtered baseband VREG VBATT SLREF CTL1...3 MODOUT data output. On transmit, it accepts a Gaussian Frequency Shift Keying (GFSK) baseband signal, low-pass filters the signal if required using the on-chip op amp and modulates the IF VCO by varying the bias voltage on an off-chip varactor diode used in the tank circuit. The AD6402 has multiple power-down modes to maximize battery life. It operates over a temperature range of –25°C to +85°C and is packaged in a JEDEC standard 28-lead smallshrink outline (SSOP) surface-mount package. R EV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 AD6402–SPECIFICATIONS AD6402ARS Parameter IF BANDPASS FILTER Center Frequency Rejection Conditions REFIN = 13.824 MHz, REFSEL
AD6402ARS 价格&库存

很抱歉,暂时无法提供与“AD6402ARS”相匹配的价格&库存,您可以联系我们找货

免费人工找货