AD652SW

a FEATURES Full-Scale Frequency (Up to 2 MHz) Set by External System Clock Extremely Low Linearity Error (0.005% max at 1 MHz FS, 0.02% max at 2 MHz FS) No Critical External Components Required Accurate 5 V Reference Voltage Low Drift (25 ppm/ C max) Dual or Single Supply Operation Voltage or Current Input MIL-STD-883 Compliant Versions Available Monolithic Synchronous Voltage-to-Frequency Converter AD652 FUNCTIONAL BLOCK DIAGRAM PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD652 Synchronous Voltage-to-Frequency Converter (SVFC) is a powerful building block for precision analog-todigital conversion, offering typical nonlinearity of 0.002% (0.005% maximum) at a 100 kHz output frequency. The inherent monotonicity of the transfer function and wide range of clock frequencies allows the conversion time and resolution to be optimized for specific applications. The AD652 uses a variation of the popular charge-balancing technique to perform the conversion function. The AD652 uses an external clock to define the full-scale output frequency, rather than relying on the stability of an external capacitor. The result is a more stable, more linear transfer function, with significant application benefits in both single- and multichannel systems. Gain drift is minimized using a precision low drift reference and low TC on-chip thin-film scaling resistors. Furthermore, the initial gain error is reduced to less than 0.5% by the use of laser-wafer-trimming. The analog and digital sections of the AD652 have been designed to allow operation from a single-ended power source, simplifying its use with isolated power supplies. The AD652 is available in five performance grades. The 20-lead PLCC packaged JP and KP grades are specified for operation over the 0°C to +70° C commercial temperature range. The 16-lead cerdip-packaged AQ and BQ grades are specified for operation over the –40°C to +85°C industrial temperature range, and the AD652SQ is available for operation over the full –55°C to +125°C extended temperature range. 1. The use of an external clock to set the full-scale frequency allows the AD652 to achieve linearity and stability far superior to other monolithic VFCs. By using the same clock to drive the AD652 and (through a suitable divider) also set the counting period, conversion accuracy is maintained independent of variations in clock frequency. 2. The AD652 Synchronous VFC requires only a single external component (a noncritical integrator capacitor) for operation. 3. The AD652 includes a buffered, accurate 5 V reference which is available to the user. 4. The clock input of the AD652 is TTL and CMOS compatible and can also be driven by sources referred to the negative power supply. The flexible open-collector output stage provides sufficient current sinking capability for TTL and CMOS logic, as well as for optical couplers and pulse transformers. A capacitor-programmable one-shot is provided for selection of optimum output pulse width for power reduction. 5. The AD652 can also be configured for use as a synchronous F/V converter for isolated analog signal transmission. 6. The AD652 is available in versions compliant with MILSTD-883. Refer to the Analog Devices Military Products Databook or current AD652/883B data sheet for detailed specifications. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 AD652–SPECIFICATIONS (typical @ T = +25 C, V = A S 15 V, unless otherwise noted) Min AD652KP/BQ Typ Max Units Parameter VOLTAGE-TO-FREQUENCY MODE Gain Error fCLOCK = 200 kHz fCLOCK = 1 MHz fCLOCK = 4 MHz Gain Temperature Coefficient fCLOCK = 200 kHz fCLOCK = 1 MHz fCLOCK = 4 MHz Power Supply Rejection Ratio Linearity Error fCLOCK = 200 kHz fCLOCK = 1 MHz fCLOCK = 2 MHz fCLOCK = 4 MHz Offset (Transfer Function, RTI) Offset Temperature Coefficient Response Time FREQUENCY-TO-VOLTAGE MODE Gain Error fIN = 100 kHz FS Linearity Error fIN = 100 kHz FS INPUT RESISTORS Cerdip (Figure 1a)(0 to +10 V FS Range) PLCC (Figure lb) Pin 8 to Pin 7 Pin 7 to Pin 5 (0 V to +5 V FS Range) Pin 8 to Pin 5 (0 V to +10 V FS Range) Pin 9 to Pin 5 (0 V to +8 V FS Range) Pin 10 to Pin 5 (Auxiliary Input) Temperature Coefficient (All) INTEGRATOR OP AMP Input Bias Current Inverting Input (Pin 5) Noninverting Input (Pin 6) Input Offset Current Input Offset Current Drift Input Offset Voltage Input Offset Voltage Drift Open Loop Gain Common-Mode Input Range CMRR Bandwidth Output Voltage Range (Referred to Pin 6, R1 > = 5k) COMPARATOR Input Bias Current Common-Mode Voltage CLOCK INPUT Maximum Frequency Threshold Voltage (Referred to Pin 12) TMIN to TMAX Input Current (–VS