AD706AN

a FEATURE HIGH DC PRECISION 50 V max Offset Voltage 0.6 V/ C max Offset Drift 110 pA max Input Bias Current LOW NOISE 0.5 V p-p Voltage Noise, 0.1 Hz to 10 Hz LOW POWER 750 A Supply Current Available in 8-Lead Plastic Mini-DlP, Hermetic Cerdip and Surface Mount (SOIC) Packages Available in Tape and Reel in Accordance with EIA-481A Standard Single Version: AD705, Quad Version: AD704 PRIMARY APPLICATIONS Low Frequency Active Filters Precision Instrumentation Precision Integrators Dual Picoampere Input Current Bipolar Op Amp AD706 CONNECTION DIAGRAM Plastic Mini-DIP (N) Cerdip (Q) and Plastic SOIC (R) Packages AMPLIFIER 1 OUTPUT 1 –IN 2 IN 3 V– 4 AMPLIFIER 2 AD706 8 7 6 5 V OUTPUT –IN IN TOP VIEW The AD706 is offered in three varieties of an 8-lead package: plastic mini-DIP, hermetic cerdip and surface mount (SOIC). “J” grade chips are also available. PRODUCT HIGHLIGHTS PRODUCT DESCRIPTION The AD706 is a dual, low power, bipolar op amp that has the low input bias current of a BiFET amplifier, but which offers a significantly lower IB drift over temperature. It utilizes superbeta bipolar input transistors to achieve picoampere input bias current levels (similar to FET input amplifiers at room temperature), while its IB typically only increases by 5× at 125°C (unlike a BiFET amp, for which IB doubles every 10°C for a 1000× increase at 125°C). The AD706 also achieves the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier. Since it has only 1/20 the input bias current of an OP07, the AD706 does not require the commonly used “balancing” resistor. Furthermore, the current noise is 1/5 that of the OP07, which makes this amplifier usable with much higher source impedances. At 1/6 the supply current (per amplifier) of the OP07, the AD706 is better suited for today’s higher density boards. The AD706 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in precision instrumentation and as a high quality integrator. The AD706 is internally compensated for unity gain and is available in five performance grades. The AD706J and AD706K are rated over the commercial temperature range of 0°C to +70°C. The AD706A and AD706B are rated over the industrial temperature range of –40°C to +85°C. 1. The AD706 is a dual low drift op amp that offers BiFET level input bias currents, yet has the low IB drift of a bipolar amplifier. It may be used in circuits using dual op amps such as the LT1024. 2. The AD706 provides both low drift and high dc precision. 3. The AD706 can be used in applications where a chopper amplifier would normally be required but without the chopper’s inherent noise. 100 10 TYPICAL IB – nA TYPICAL JFET AMP 1 0.1 AD706 0.01 –55 +25 +110 TEMPERATURE – C +125 Figure 1. Input Bias Current vs. Temperature REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1997 AD706–SPECIFICATIONS (@ T = +25 C, V A CM = 0 V and Min 15 V dc, unless otherwise noted) Min AD706K/B Typ Max 10 25 0.2 132 126 0.3 30 0.2 300 400 200 300 30 0.4 80 80 100 200 200 300 75 150 150 250 110 108 110 106 50 100 0.6 Units µV µV µV/°C dB dB µV/Month pA pA pA/°C pA pA pA pA pA/°C pA pA µV µV pA pA dB dB dB dB dB Parameter INPUT OFFSET VOLTAGE Initial Offset Offset vs. Temp, Average TC vs. Supply (PSRR) TMIN to TMAX Long Term Stability INPUT BIAS CURRENT1 Conditions AD706J/A Typ Max 30 40 0.2 132 126 0.3 50 0.3 100 150 1.5 TMIN to TMAX VS = ± 2 V to ± 18 V VS = ± 2.5 V to ± 18 V 110 106 112 108 VCM = 0 V VCM = ± 13.5 V vs. Temp, Average TC TMIN to TMAX TMIN to TMAX INPUT OFFSET CURRENT vs. Temp, Average TC TMIN to TMAX TMIN to TMAX MATCHING CHARACTERISTICS Offset Voltage TMIN to TMAX Input Bias Current2 TMIN to TMAX Common-Mode Rejection TMIN to TMAX Power Supply Rejection Crosstalk (Figure 19a) FREQUENCY RESPONSE Unity Gain Crossover Frequency Slew Rate INPUT IMPEDANCE Differential Common Mode INPUT VOLTAGE RANGE Common-Mode Voltage Common-Mode Rejection Ratio INPUT CURRENT NOISE INPUT VOLTAGE NOISE ± 13.5 VCM = ± 13.5 V TMIN to TMAX 0.1 Hz to 10 Hz f = 10 Hz 0.1 Hz to 10 Hz f = 10 Hz f = 1 kHz VO = ± 12 V RLOAD = 10 kΩ TMIN to TMAX VO = ± 10 V RLOAD = 2 kΩ TMIN to TMAX RLOAD = 10 kΩ TMIN to TMAX Short Circuit Gain = +1 200 150 200 150 ± 13 ± 13 110 108 TMIN to TMAX @ f = 10 Hz RL = 2 k Ω 106 106 106 104 VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V 200 250 110 160 30 0.6 80 80 150 250 250 350 150 250 300 500 150 150 G = –1 TMIN to TMAX 0.8 0.15 0.15 40 2 300 2 ± 14 132 128 3 50 0.5 17 15 2000 1500 1000 1000 ± 14 ± 14 ± 15 10,000 ± 13.5 114 108 0.8 0.15 0.15 40 2 300 2 ± 14 132 128 3 50 0.5 17 15 400 300 300 200 ± 13 ± 13 2000 1500 1000 1000 ± 14 ± 14 ± 15 10,000 1.0 22 MHz V/µs V/µs MΩ p F GΩ p F V dB dB pA p-p fA/√Hz µV p-p nV/√Hz nV/√Hz V/mV V/mV V/mV V/mV V V mA pF 22 OPEN-LOOP GAIN OUTPUT CHARACTERISTICS Voltage Swing Current Capacitive Load Drive Capability –2– REV. C AD706 Parameter POWER SUPPLY Rated Performance Operating Range Quiescent Current, Total TMIN to TMAX TRANSISTOR COUNT # of Transistors Conditions Min AD706J/A Typ Max ± 15 0.75 0.8 90 Min AD706K/B Typ Max ± 15 0.75 0.8 90 Units V V mA mA ± 2.0 ± 18 1.2 1.4 ± 2.0 ± 18 1.2 1.4 NOTES l Bias current specifications are guaranteed maximum at either input. 2 Input bias current match is the difference between corresponding inputs (I B of –IN of Amplifier #1 minus I B of –IN of Amplifier #2). ∆VOS # 1 ∆VOS # 2 CMRR match is the difference between ∆VCM ∆VOS # 1 for amplifier #1 and ∆VCM ∆VOS # 2 for amplifier #2 expressed in dB. PSRR match is the difference between ∆VSUPPLY for amplifier #l and ∆VSUPPLY for amplifier #2 expressed in dB. All min and max specifications are guaranteed. Specifications subject to change without notice. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation (Total: Both Amplifiers)2 . . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . +0.7 Volts Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C Operating Temperature Range AD706J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C AD706A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . +300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic Package: θJA = 100°C/Watt 8-Lead Cerdip Package: θJA = 110°C/Watt 8-Lead Small Outline Package: θJA = 155°C/Watt 3 The input pins of this amplifier are protected by back-to-back diodes. If the differential voltage exceeds ± 0.7 volts, external series protection resistors should be added to limit the input current to less than 25 mA. ABSOLUTE MAXIMUM RATINGS l ORDERING GUIDE Model AD706AN AD706JN AD706KN AD706JR AD706JR-REEL AD706AQ AD706BQ AD706AR AD706AR-REEL Temperature Range –40°C to +85°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Description Plastic DIP Plastic DIP Plastic DIP SOIC Tape and Reel Cerdip Cerdip SOIC Tape and Reel Package Option* N-8 N-8 N-8 R-8 Q-8 Q-8 R-8 *N = Plastic DIP; Q = Cerdip, R = Small Outline Package. METALIZATION PHOTOGRAPH Dimensions shown in inches and (mm). Contact factory for latest dimensions. OUTPUT A 1 8 +VS –INPUT A 2 7 0.118 (3.00) OUTPUT B 6 +INPUT A 3 –INPUT B +INPUT B –VS 4 5 0.074 (1.88) CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD706 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. C –3– AD706–Typical Characteristics (@ +25 C, V = S 1000 SAMPLE SIZE: 3000 800 NUMBER OF UNITS 15 V, unless otherwise noted) 1000 SAMPLE SIZE: 2400 800 1000 SAMPLE SIZE: 5100 800 NUMBER OF UNITS 600 600 NUMBER OF UNITS –160 –80 0 80 160 INPUT BIAS CURRENT – pA 600 400 400 400 200 200 200 0 –80 –40 0 40 80 INPUT OFFSET VOLTAGE – V 0 0 –120 –60 0 60 120 INPUT OFFSET CURRENT – pA Figure 2. Typical Distribution of Input Offset Voltage Figure 3. Typical Distribution of Input Bias Current Figure 4. Typical Distribution of Input Offset Current INPUT COMMON-MODE VOLTAGE LIMIT – Volts (REFERRED TO SUPPLY VOLTAGES) VS –0.5 OUTPUT VOLTAGE – Volts p-p –1.0 –1.5 35 30 25 20 15 10 5 0 1k 100 OFFSET VOLTAGE DRIFT – V/ C SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED 10 FOR INDUSTRIAL TEMPERATURE RANGE 1.5 1.0 0.5 –VS 0 5 10 15 SUPPLY VOLTAGE – Volts 20 1.0 100k 10k FREQUENCY – Hz 1M 0.1 1k 100k 1M 10M 10k SOURCE RESISTANCE – 100M Figure 5. Input Common-Mode Voltage Range vs. Supply Voltage Figure 6. Large Signal Frequency Response Figure 7. Offset Voltage Drift vs. Source Resistance 200 4 60 40 20 0 POSITIVE IB CHANGE IN OFFSET VOLTAGE – V SAMPLE SIZE: 375 –55 C TO 125 C 160 NUMBER OF UNITS 3 120 2 80 INPUT BIAS CURRENT – pA –20 –40 –60 –15 NEGATIVE IB 1 40 0 –0.8 –0.4 0 0.4 0.8 OFFSET VOLTAGE DRIFT – V/ C 0 0 1 2 3 4 WARM-UP TIME – Minutes 5 –10 –5 0 5 10 15 COMMON-MODE VOLTAGE – Volts Figure 8. Typical Distribution of Offset Voltage Drift Figure 9. Change in Input Offset Voltage vs. Warm-Up Time Figure 10. Input Bias Current vs. Common-Mode Voltage –4– REV. C AD706 1000 1000 VOLTAGE NOISE – nV/ Hz CURRENT NOISE – fA/ Hz 100 100 0.5 V 100 10k 10 10 20M VOUT 1 1 10 100 FREQUENCY – Hz 1000 1 1 10 100 FREQUENCY – Hz 1000 0 5 TIME – Seconds 10 Figure 11. Input Noise Voltage Spectral Density Figure 12. Input Noise Current Spectral Density Figure 13. 0.1 Hz to 10 Hz Noise Voltage 1000 +160 +140 180 160 140 QUIESCENT CURRENT – A 900 +120 CMRR – dB 800 +125 C +25 C +80 +60 +40 PSRR – dB +100 120 100 80 + PSRR – PSRR 700 –55 C 60 40 20 0.1 +20 0 0.1 600 0 5 10 15 SUPPLY VOLTAGE – Volts 20 1 10 100 1k 10k 100k 1M FREQUENCY – Hz 1 10 100 1k 10k 100k 1M FREQUENCY – Hz Figure 14. Quiescent Supply Current vs. Supply Voltage Figure 15. Common-Mode Rejection Ratio vs. Frequency Figure 16. Power Supply Rejection Ratio vs. Frequency 10M 140 0 OUTPUT VOLTAGE SWING – Volts 30 60 PHASE +VS (REFERRED TO SUPPLY VOLTAGES) OPEN-LOOP VOLTAGE GAIN – dB 120 100 80 60 40 GAIN –0.5 –1.0 –1.5 OPEN-LOOP VOLTAGE GAIN +25 C +125 C 90 120 150 180 210 240 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz 1M PHASE SHIFT – Degrees –55 C +1.5 +1.0 +0.5 –VS 0 5 10 15 SUPPLY VOLTAGE – Volts 20 20 0 –20 0.01 0.1 100k 1 2 4 6 8 10 LOAD RESISTANCE – k 100 1 Figure 17. Open-Loop Gain vs. Load Resistance vs. Load Resistance Figure 18. Open-Loop Gain and Phase Shift vs. Frequency Figure 19. Output Voltage Swing vs. Supply Voltage REV. C –5– AD706 –80 1000 CLOSED-LOOP OUTPUT IMPEDANCE – 100 –100 CROSSTALK – dB 10 AV = –1000 –120 1 AV = + 1 0.1 –140 0.01 IOUT = +1mA –160 10 0.001 100 1k FREQUENCY – Hz 10k 100k 1 10 100 1k FREQUENCY – Hz 10k 100k Figure 20a. Crosstalk vs. Frequency +VS 0.1 F Figure 21. Magnitude of Closed-Loop Output Impedance vs. Frequency RF +VS 2 1/2 AD706 3 4 VOUT #1 1 20V p-p 0.1 F RL 2k 8 0.1 F VOUT SINE WAVE GENERATOR –VS 1/2 AD706 VIN 4 RL 2k CL 20k +VS 1F 2.21k 6 8 0.1 F VOUT #2 7 0.1 F SQUARE WAVE INPUT –VS 1/2 AD706 5 Figure 22a. Unity Gain Follower (For Large Signal Applications, Resistor RF Limits the Current Through the Input Protection Diodes) V #2 CROSSTALK = 20 LOG10 OUT –20dB VOUT #1 Figure 20b. Crosstalk Test Circuit Figure 22b. Unity Gain Follower Large Signal Pulse Response, RF = 10 kΩ, CL = 1,000 pF Figure 22c. Unity Gain Follower Small Signal Pulse Response, RF = 0 Ω, CL = 100 pF Figure 22d. Unity Gain Follower Small Signal Pulse Response, RF = 0 Ω, CL = 1000 pF –6– REV. C AD706 10k +VS + 10k VIN 0.1 F VOUT RL 2.5k – 8 1/2 AD706 + SQUARE WAVE INPUT 4 CL 0.1µF –VS Figure 23a. Unity Gain Inverter Connection Figure 23b. Unity Gain Inverter Large Signal Pulse Response, CL = 1,000 pF Figure 23c. Unity Gain Inverter Small Signal Pulse Response, CL = 100 pF Figure 23d. Unity Gain Inverter Small Signal Pulse Response, CL = 1000 pF Figure 24 shows an in-amp circuit that has the obvious advantage of requiring only one AD706, rather than three op amps, with subsequent savings in cost and power consumption. The transfer function of this circuit (without RG) is: increases with gain, once initial trimming is accomplished—but CMR is still dependent upon the ratio matching of Resistors R1 through R4. Resistor values for this circuit, using the optional gain resistor, RG, can be calculated using:  R 4 VOUT = (VIN #1 − VIN #2 ) 1 +   R3 for R1 = R4 and R2 = R3 Input resistance is high, thus permitting the signal source to have an unbalanced output impedance. RG (OPTIONAL) R1 49.9k +VS 0.1 F 2 R1 = R 4 = 49.9 kΩ 49.9 kΩ R2 = R3 = 0.9 G − 1 99.8 kΩ RG = 0.06 G where G = Desired Circuit Gain R2 R3 R4 49.9k Table I provides practical 1% resistance values. (Note that without resistor RG, R2 and R3 = 49.9 kΩ/G–1.) Table I. Operating Gains of Amplifiers A1 and A2 and Practical 1% Resistor Values for the Circuit of Figure 24 – + 8 1/2 AD706 1 5 RP* 3 A1 1/2 – A2 7 Circuit Gain OUTPUT 0.1 F Gain of A1 Gain of A2 11.00 4.01 3.00 2.00 1.11 1.01 1.001 1.10 1.33 1.50 2.00 10.10 101.0 1001 R2, R3 499 kΩ 150 kΩ 100 kΩ 49.9 kΩ 5.49 kΩ 499 Ω 49.9 Ω R1, R4 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ VIN#1 1k RP* AD706 6 + –VS 4 VIN#2 1k VOUT = (VIN#1 – VIN#2) (1+ R4 ) + ( 2R4 ) R3 RG FOR R1 = R4, R2 = R3 *OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE. 1.10 1.33 1.50 2.00 10.1 101.0 1001 Figure 24. A Two Op-Amp Instrumentation Amplifier Furthermore, the circuit gain may be fine trimmed using an optional trim resistor, RG. Like the three op-amp circuit, CMR REV. C –7– For a much more comprehensive discussion of in-amp applications, refer to the Instrumentation Amplifier Applications Guide— available free from Analog Devices, Inc. AD706 R1 1M INPUT R2 1M C2 C1 3+ C3 R3 1M R4 1M C4 0.1 F +VS 0.1 F 5+ 8 1/2 AD706 2– 4 1 1/2 *WITHOUT THE NETWORK, PINS 1 & 2, AND 6 & 7 OF THE AD706 ARE TIED TOGETHER. CAPACITORS C1 & C2 ARE SOUTHERN ELECTRONICS MPCC, POLYCARB 5%, 50 VOLT AD706 6– 7 OUTPUT R5 2M C5 0.01 F OPTIONAL BALANCE RESISTOR NETWORKS* R6 2M C6 0.01 F Figure 25. A 1 Hz, 4-Pole Active Filter Figure 25 shows the AD706 in an active filter application. An important characteristic of the AD706 is that both the input bias current, input offset current and their drift remain low over most of the op amp’s rated temperature range. Therefore, for most applications, there is no need to use the normal balancing resistor. Adding the balancing resistor enhances performance at high temperatures, as shown by Figure 26. OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) – V A 1 Hz, 4-Pole, Active Filter 180 120 WITHOUT OPTIONAL BALANCE RESISTOR, R3 60 0 WITH OPTIONAL BALANCE RESISTOR, R3 –60 –120 –180 –40 0 +40 +80 TEMPERATURE – C +120 Figure 26. VOS vs. Temperature Performance of the 1 Hz Filter Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values Desired Low Pass Response Bessel Butterworth 0.1 dB Chebychev 0.2 dB Chebychev 0.5 dB Chebychev 1.0 dB Chebychev Section 1 Frequency (Hz) 1.43 1.00 0.648 0.603 0.540 0.492 Q 0.522 0.541 0.619 0.646 0.705 0.785 Section 2 Frequency (Hz) 1.60 1.00 0.948 0.941 0.932 0.925 Q 0.806 1.31 2.18 2.44 2.94 3.56 C1 ( F) 0.116 0.172 0.304 0.341 0.416 0.508 C2 ( F) 0.107 0.147 0.198 0.204 0.209 0.206 C3 ( F) 0.160 0.416 0.733 0.823 1.00 1.23 C4 ( F) 0.0616 0.0609 0.0385 0.0347 0.0290 0.0242 PRINTED IN U.S.A. 0.0196 (0.50) x 45° 0.0099 (0.25) 8° 0° 0.0500 (1.27) 0.0160 (0.41) NOTE Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Cerdip (Q-8) 0.005 (0.13) MIN 8 Plastic Mini-DIP (N-8) 0.430 (10.92) 0.348 (8.84) 8 5 SOIC (R-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 0.055 (1.4) MAX 5 0.310 (7.87) 0.220 (5.59) 1 4 0.280 (7.11) 0.240 (6.10) 1 4 0.2440 (6.20) 0.2284 (5.80) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 1 4 0.1574 (4.00) 0.1497 (3.80) PIN 1 0.405 (10.29) MAX 0.200 (5.08) MAX 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.320 (8.13) 0.290 (7.37) PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN SEATING PLANE PIN 1 0.102 (2.59) 0.094 (2.39) 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.100 0.070 (1.78) SEATING PLANE 0.014 (0.36) (2.54) 0.030 (0.76) BSC 15° 0° 0.015 (0.38) 0.008 (0.20) 0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC 0.015 (0.381) 0.008 (0.204) 0.0098 (0.25) 0.0040 (0.10) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0138 (0.35) 0.0098 (0.25) PLANE BSC 0.0075 (0.19) –8– REV. C C1429b–2–12/97 –VS