AD7291TCPZ-EP

8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor AD7291-EP FEATURES FUNCTIONAL BLOCK DIAGRAM 12-bit SAR ADC 8 single-ended analog input channels Analog input range: 0 V to 2.5 V 12-bit temperature to digital converter Temperature sensor accuracy of ±1°C typical Channel sequencer operation Specified for VDD of 2.8 V to 3.6 V Logic voltage VDRIVE = 1.65 V to 3.6 V Internal 2.5 V reference I2C-compatible serial interface supports standard and fast speed modes Out of range indicator/alert function Autocycle mode Power-down current: 13 µA maximum 20-lead LFCSP package VDD ENHANCED PRODUCT FEATURES GND VREF REF 12-BIT SUCCESSIVE APPROXIMATION ADC VIN0 T/H VIN7 INPUT MUX AD7291-EP SEQUENCER CONTROL LOGIC I2C INTERFACE TEMP SENSOR SCL SDA AS1 AS0 VDRIVE PD/RST Supports defense and aerospace applications (AQEC standard) Extended industrial temperature range: −55°C to +125°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available upon request BUF ALERT 15915-001 Enhanced Product Figure 1. GENERAL DESCRIPTION The AD7291-EP is a 12-bit, low power, 8-channel, successive approximation analog-to-digital converter (ADC) with an internal temperature sensor. The AD7291-EP includes a high accuracy band gap temperature sensor, which is monitored and digitized by the 12-bit ADC to give a resolution of 0.25°C. The device operates from a single 3.3 V power supply and features an I2C-compatible interface. The device contains a 9-channel multiplexer and a track-and-hold amplifier with an input bandwidth of 30 MHz. The device has an on-chip 2.5 V reference that can be disabled to allow the use of an external reference. The AD7291-EP offers a programmable sequencer, which enables the selection of a preprogrammable sequence of channels for conversion. The AD7291-EP provides a 2-wire serial interface compatible with I2C interfaces. The I2C interface supports standard and fast I2C interface modes. The AD7291-EP normally remains in a partial power-down state while not converting and powers up for conversions. The conversion process can be controlled by a command mode where conversions occur across I2C write operations or an autocycle mode selected through software control. Rev. 0 On-chip limit registers can be programmed with high and low limits for the conversion results; an out-of-range indicator output (ALERT) becomes active when the programmed high or low limits are violated by the conversion result. This output can be used as an interrupt. Additional application and technical information can be found in the AD7291 data sheet. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD7291-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .......................................................................5 Enhanced Product Features ............................................................ 1 ESD Caution...................................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................6 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7 Revision History ............................................................................... 2 Outline Dimensions ..........................................................................8 Specifications..................................................................................... 3 Ordering Guide .............................................................................8 Absolute Maximum Ratings ............................................................ 5 REVISION HISTORY 7/2017—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Enhanced Product AD7291-EP SPECIFICATIONS VDD = 2.8 V to 3.6 V; VDRIVE = 1.65 V to 3.6 V; fSCL = 400 kHz, fast SCLK mode; VREF = 2.5 V internal/external; TA = −55°C to +125°C, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE Signal-to-Noise Ratio (SNR) Signal-to-Noise + Distortion Ratio (SINAD) Total Harmonic Distortion (THD) Spurious-Free Dynamic Range (SFDR) Intermodulation Distortion (IMD) Second-Order Terms Third-Order Terms Channel-to-Channel Isolation Full Power Bandwidth 2 DC ACCURACY Resolution Integral Nonlinearity (INL) Differential Nonlinearity (DNL) Offset Error Offset Error Matching Offset Temperature Drift Gain Error Gain Error Matching Gain Temperature Drift ANALOG INPUT Input Voltage Ranges DC Leakage Current Input Capacitance2 REFERENCE INPUT/OUTPUT Reference Output Voltage 3 Long-Term Stability Output Voltage Hysteresis Reference Input Voltage Range 4 DC Leakage Current VREF Output Impedance Reference Temperature Coefficient VREF Noise2 LOGIC INPUTS (SDA, SCL) Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN2 Input Hysteresis, VHYST Min Typ 70 70 71 71 −84 −85 Max Unit 1 −78 −80 dB dB dB dB Test Conditions/Comments fIN = 1 kHz sine wave fA = 5.4 kHz, fB = 4.6 kHz −88 −88 −100 30 10 dB dB dB MHz MHz 12 ±0.5 ±0.5 ±2 ±2.5 4 ±1 ±1 0.5 0 ±0.01 34 8 2.4925 2.5 150 50 1 ±0.01 1 12 60 ±1 ±0.99 ±4.5 ±4.5 ±4 ±2.5 VREF ±1 2.5075 2.5 ±1 35 0.7 × VDRIVE ±0.01 6 0.3 × VDRIVE ±1 0.1 × VDRIVE Rev. 0 | Page 3 of 8 Bits LSB LSB LSB LSB ppm/°C LSB LSB ppm/°C V µA pF pF V ppm ppm V µA Ω ppm/°C µV rms V V µA pF V fIN = 10 kHz At 3 dB At 0.1 dB Guaranteed no missing codes to 12 bits When in track When in hold ±0.3% maximum at 25°C For 1000 hours External reference applied to Pin VREF Bandwidth = 10 MHz VIN = 0 V or VDRIVE AD7291-EP Parameter LOGIC OUTPUTS Output High Voltage, VOH Enhanced Product Min Typ VDRIVE − 0.3 VDRIVE − 0.2 Output Low Voltage, VOL Floating State Leakage Current Floating State Output Capacitance2 INTERNAL TEMPERATURE SENSOR Operating Range Accuracy Resolution CONVERSION RATE Conversion Time Autocycle Update Rate 5 Throughput Rate POWER REQUIREMENTS VDD VDRIVE ITOTAL 6, 7 Normal Mode (Operational) Normal Mode (Static) Full Power-Down Mode Power Dissipation 7 Normal Mode (Operational) Normal Mode (Static) Full Power-Down Mode Max ±0.01 8 −55 ±1 ±1 0.25 0.4 0.6 ±1 +125 ±2 ±3 3.2 50 2.8 1.65 Unit 1 Test Conditions/Comments V V V V µA pF VDRIVE < 1.8 VDRIVE ≥ 1.8 ISINK = 3 mA ISINK = 6 mA °C °C °C °C 22.22 μs μs kSPS 3 3 3.6 3.6 V V 2.9 2.9 0.3 1.6 4.9 3.5 3.4 1.6 4.5 13 mA mA μA μA μA 8.7 10.4 10.4 1.1 5.8 17.6 10.5 12.6 12.2 5.8 16.2 46.8 mW mW mW µW µW µW TA = −55°C to +85°C TA = 85°C to 125°C LSB size fSCL = 400 kHz Digital inputs = 0 V or VDRIVE TA = −55°C to +25°C TA = >25°C to 85°C TA = >85°C to 125°C VDD = 3 V, VDRIVE = 3 V TA = −55°C to +25°C TA = >25°C to 85°C TA = >85°C to 125°C All specifications expressed in decibels are referred to full-scale range (FSR) and tested with an input signal at 0.5 dB below full scale, unless otherwise specified. Sample tested during initial product release to ensure compliance. 3 Refers to Pin VREF specified for 25oC. 4 A correction factor can be required on the temperature sensor results when using an external VREF (see the AD7291 data sheet). 5 Sampled during initial product release to ensure compliance; not subject to production testing. 6 ITOTAL is the total current flowing in VDD and VDRIVE. 7 ITOTAL and power dissipation are specified with VDD = VDRIVE = 3.6 V, unless otherwise noted. 1 2 Rev. 0 | Page 4 of 8 Enhanced Product AD7291-EP ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter VDD to GND1, GND VDRIVE to GND1, GND Analog Input Voltage to GND1 Digital Input Voltage to GND1 Digital Output Voltage to GND1 VREF to GND1 GND to GND1 Input Current to Any Pin Except Supplies1 Operating Temperature Range Storage Temperature Range Junction Temperature Pb-free Temperature, Soldering Reflow ESD 1 Rating −0.3 V to +5 V −0.3 V to +5 V −0.3 V to +3 V −0.3 V to VDRIVE + 0.3 V −0.3 V to VDRIVE + 0.3 V −0.3 V to +3 V −0.3 V to +0.3 V ±10 mA −55°C to +125°C −65°C to +150°C 150°C Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Close attention to PCB thermal design is required. Table 3. Thermal Resistance Package Type CP-20-81 1 θJA 52 θJC 6.5 Unit °C/W Thermal impedance simulated values are based on JEDEC 2S2P thermal test board with 9 thermal vias. See JEDEC JESD51. ESD CAUTION 260(+0)°C 2 kV Transient currents of up to 100 mA do not cause latch-up. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 5 of 8 AD7291-EP Enhanced Product 16 VDRIVE 18 VIN0 17 PD/RST 20 VIN2 19 VIN1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VIN3 1 15 SCL VIN4 2 14 SDA AD7291-EP VIN5 3 13 AS1 TOP VIEW (Not to Scale) VIN6 4 12 ALERT 11 AS0 NOTES 1. THE EXPOSED METAL PADDLE ON THE BOTTOM OF THE LFCSP PACKAGE SHOULD BE SOLDERED TO PCB GROUND FOR PROPER HEAT DISSIPATION AND PERFORMANCE. 15915-002 VDD 10 GND 9 DCAP 8 VREF 7 GND1 6 VIN7 5 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 to 5, 18 to 20 6 Mnemonic VIN3, VIN4, VIN5, VIN6, VIN7, VIN0, VIN1, VIN2 GND1 7 VREF 8 DCAP 9 GND 10 11, 13 VDD AS0, AS1 12 ALERT 14 SDA 15 SCL 16 VDRIVE 17 PD/RST EPAD EPAD Description Analog Inputs. The AD7291-EP has eight single-ended analog inputs that are multiplexed into the on-chip trackand-hold amplifier. Each input channel can accept analog inputs from 0 V to 2.5 V. Any unused input channels must be connected to GND1 to avoid noise pickup. Ground. Ground reference point for the internal reference circuitry on the AD7291-EP. All analog input signals and the external reference signals must be referred to this GND1 voltage. The GND1 pin must be connected to the ground plane of a system. All ground pins must ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. The VREF pin must be decoupled to this ground pin via a 10 μF decoupling capacitor. Internal Reference/External Reference Supply. The nominal internal reference voltage of 2.5 V appears at this pin. Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the rest of a system. Decoupling capacitors must be connected to this pin to decouple the reference buffer. For best performance, it is recommended to use a 10 μF decoupling capacitor on this pin to GND1. The internal reference can be disabled and an external reference supplied to this pin if required. The input voltage range for the external reference is 2.0 V to 2.5 V. Decoupling Capacitor Pin. Decoupling capacitors (1 μF recommended) are connected to this pin to decouple the internal low dropout regulator (LDO). Ground. Ground reference point for all analog and digital circuitry on the AD7291-EP. The GND pin must be connected to the ground plane of the system. All ground pins must ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. Both DCAP and VDD pins must be decoupled to this GND pin. Supply Voltage, 2.8 V to 3.6 V. This supply must be decoupled to GND with 10 μF and 100 nF decoupling capacitors. Logic Inputs. Together, the logic state of these two inputs selects a unique I2C address for the AD7291-EP. See the AD7291 data sheet for details. The device address depends on the voltage applied to these pins. Digital Output. This pin acts as an out-of-range indicator and, if enabled, becomes active when the conversion result violates the DATAHIGH or DATALOW register values. See the AD7291 data sheet for further details. Digital Input/Output. Serial bus bidirectional data. This open-drain output requires a pull-up resistor. The output coding is straight binary for the voltage channels and twos complement for the temperature sensor result. Digital Inputs. Serial I2C Bus Clock. This input requires a pull-up resistor. The data transfer rate in I2C mode is compatible with both 100 kHz and 400 kHz operating modes. Logic Power Supply Input. The voltage supplied at this pin determines the voltage at which the interface operates. This pin must be decoupled to GND. The voltage range on this pin is 1.65 V to 3.6 V and can be less than the voltage at VDD but must never exceed it by more than 0.3 V. Power-Down Pin. This pin places the device into a full power-down mode and enables power conservation when operation is not required. This pin can be used to reset the device by toggling the pin low for a minimum of 1 ns and a maximum of 100 ns. If the maximum time is exceeded, the device enters power-down mode. When placing the device in full power-down mode, the analog inputs must be returned to 0 V. Exposed Pad. The exposed metal paddle on the bottom of the LFCSP package must be soldered to PCB ground for proper functionality and heat dissipation. Rev. 0 | Page 6 of 8 Enhanced Product AD7291-EP TYPICAL PERFORMANCE CHARACTERISTICS 1.5 7 VDRIVE = 3V 6 TOTAL CURRENT (µA) 0.5 0 –0.5 –1.0 5 4 –55°C +25°C +85°C +125°C 3 2 –1.5 –55 –40 –25 –10 5 20 35 55 65 80 TEMPERATURE (°C) Figure 3. Temperature Accuracy at 3 V 95 110 125 0 2.7 2.8 2.9 3.0 3.1 3.2 VDD (V) 3.3 3.4 3.5 3.6 15915-004 1 15915-003 TEMPERATURE ERROR (°C) 1.0 Figure 4. Full Shutdown Current vs. Supply Voltage for Various Temperatures Rev. 0 | Page 7 of 8 AD7291-EP Enhanced Product OUTLINE DIMENSIONS DETAIL A (JEDEC 95) 4.10 4.00 SQ 3.90 16 0.50 BSC PIN 1 INDIC ATOR AREA OPTIONS (SEE DETAIL A) 20 1 15 2.75 2.60 SQ 2.35 EXPOSED PAD 5 11 TOP VIEW 0.80 0.75 0.70 SIDE VIEW PKG-005089 SEATING PLANE 0.50 0.40 0.30 10 6 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF 0.25 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-11. 02-21-2017-B PIN 1 INDICATOR 0.30 0.25 0.18 Figure 5. 20-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm × 4 mm Body and 0.75 mm Package Height (CP-20-8) Dimensions shown in millimeters ORDERING GUIDE Model 1 AD7291TCPZ-EP AD7291TCPZ-EP-RL7 1 Temperature Range −55°C to +125°C −55°C to +125°C Package Description 20-Lead Lead Frame Chip Scale Package [LFCSP] 20-Lead Lead Frame Chip Scale Package [LFCSP] Z = RoHS Compliant Part. I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D15915-0-7/17(0) Rev. 0 | Page 8 of 8 Package Option CP-20-8 CP-20-8