12-Bit Monitor and Control System with Multichannel
ADC, DACs, Temperature Sensor, and Current Sense
AD7294-2
Data Sheet
FEATURES
APPLICATIONS
12-bit SAR ADC with 3 μs conversion time
4 uncommitted analog inputs
Differential/single-ended
VREF, 2 × VREF input ranges
2 high-side current sense inputs
5 V to 59.4 V operating range
0.75% maximum gain error
±200 mV input range
2 external diode temperature sensor inputs
−55°C to +150°C measurement range
±2°C accuracy
Series resistance cancellation
1 internal temperature sensor: ±2°C accuracy
Built-in monitoring features
Minimum/maximum recorder for each channel
Programmable alert thresholds
Programmable hysteresis
Four 12-bit, monotonic, 15 V DACs
5 V span, 0 V to 10 V offset
8 μs settling time
10 mA sink and source capability
Power-on reset (POR) to 0 V
Internal 2.5 V reference
2-wire, fast mode I2C interface
Temperature range: −40°C to +105°C
Package type: 64-lead TQFP
Pin compatible with the AD7294
Cellular base stations
GSM, EDGE, UMTS, CDMA, TD-SCDMA, W-CDMA, WiMAX
Point-to-multipoint and other RF transmission systems
12 V, 24 V, 48 V automotive applications
Industrial controls
Rev. 0
GENERAL DESCRIPTION
The AD7294-2 contains all the functions that are required for
general-purpose monitoring and control of current, voltage,
and temperature, integrated into a single-chip solution. The part
includes low voltage (±200 mV) analog input sense amplifiers
for current monitoring across shunt resistors, temperature sense
inputs, and four uncommitted analog input channels multiplexed
into a SAR analog-to-digital converter (ADC) with a 3 μs
conversion time. A high accuracy internal reference is provided
to drive both the digital-to-analog converters (DACs) and the
ADC. Four 12-bit DACs provide the outputs for voltage control.
The AD7294-2 also includes limit registers for alarm functions.
The part is designed for high voltage compliance: 59.4 V on the
current sense inputs and up to a 15 V DAC output voltage.
The AD7294-2 is a highly integrated solution that offers all the
functionality necessary for precise control of the power amplifier
in cellular base station applications. In these types of applications,
the DACs provide 12-bit resolution to control the bias currents
of the power transistors. Thermal diode-based temperature sensors
are incorporated to compensate for temperature effects. The ADC
monitors the high-side current and temperature. This functionality
is provided in a 64-lead TQFP, which operates over a temperature
range of −40°C to +105°C.
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AD7294-2
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Command Register .................................................................... 26
Applications ....................................................................................... 1
ADC Result Register .................................................................. 26
General Description ......................................................................... 1
TSENSE1 and TSENSE2 Result Registers ......................................... 27
Revision History ............................................................................... 2
TSENSEINT Result Register .......................................................... 27
Functional Block Diagram .............................................................. 3
DACA, DACB, DACC, and DACD Value Registers....................... 27
Specifications..................................................................................... 4
Alert Status Register A, Alert Status Register B, and Alert
Status Register C ......................................................................... 28
DAC Specifications....................................................................... 4
Channel Sequence Register ....................................................... 28
ADC Specifications ...................................................................... 5
Configuration Register .............................................................. 29
General Specifications ................................................................. 7
Power-Down Register ................................................................ 30
Timing Characteristics ................................................................ 8
DATALOW and DATAHIGH Registers .......................................... 30
Absolute Maximum Ratings ............................................................ 9
Hysteresis Registers .................................................................... 30
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 17
DAC Terminology ...................................................................... 17
ADC Terminology ...................................................................... 17
Theory of Operation ...................................................................... 18
ADC Overview ........................................................................... 18
ADC Transfer Functions ........................................................... 18
Analog Inputs .............................................................................. 19
Current Sensor ............................................................................ 20
Analog Comparator Loop ......................................................... 22
Temperature Sensor ................................................................... 22
DAC Operation ........................................................................... 23
ADC and DAC Reference.......................................................... 24
VDRIVE Feature .............................................................................. 24
Register Settings .............................................................................. 25
Address Pointer Register ........................................................... 25
Remote Channel TSENSE1 and TSENSE2 Offset Registers ........... 31
I C Interface .................................................................................... 32
2
General I2C Timing .................................................................... 32
Serial Bus Address Byte ............................................................. 32
Interface Protocol ....................................................................... 33
Modes of Operation ....................................................................... 36
Command Mode ........................................................................ 36
Autocycle Mode .......................................................................... 37
Alerts and Limits Theory .............................................................. 38
ALERT_FLAG Bit ....................................................................... 38
Alert Status Registers ................................................................. 38
DATALOW and DATAHIGH Monitoring Features ...................... 38
Hysteresis..................................................................................... 39
Applications Information .............................................................. 40
Base Station Power Amplifier Monitor and Control ............. 40
Gain Control of Power Amplifier............................................. 41
Outline Dimensions ....................................................................... 42
Ordering Guide .......................................................................... 42
REVISION HISTORY
6/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 44
Data Sheet
AD7294-2
FUNCTIONAL BLOCK DIAGRAM
RSENSE
VPP1, VPP2
RS1(+) RS1(–) RS2(+)
HIGH-SIDE
CURRENT
SENSE
ISENSE 1
OVERRANGE
VIN0
VIN1
VIN2
VIN3
D1(+)
D2(+)
T1
AGND1
TO
DAC OUTV+ AB,
AVDD AGND7 DAC OUTV+ CD,
2.5V
REF
HIGH-SIDE
CURRENT
SENSE
12-BIT
DAC
100kΩ
200kΩ
VOUTA
VREF
10.41
100kΩ
MUX
12-BIT
ADC
12-BIT
DAC
200kΩ
100kΩ
OFFSET IN A
200kΩ
VOUTB
LIMIT
REGISTERS
100kΩ
12-BIT
DAC
T2
200kΩ
100kΩ
TEMP
SENSOR
D2(–)
D1(–)
VOUTC
100kΩ
AD7294-2
CONTROL LOGIC
OFFSET IN B
200kΩ
12-BIT
DAC
200kΩ
100kΩ
200kΩ
OFFSET IN C
VOUTD
I2C INTERFACE
PROTOCOL
DGND (×3)
RESET SDA SCL AS2 AS1 AS0 DCAP ALERT/
BUSY
Figure 1.
Rev. 0 | Page 3 of 44
100kΩ
200kΩ
OFFSET IN D
10936-001
ISENSE 2
OVERRANGE
TO LOAD
REFOUT/
REFOUT/
REFIN DAC
RS2(–) REFIN ADC
AD7294-2
Data Sheet
SPECIFICATIONS
DAC SPECIFICATIONS
AVDD = 4.5 V to 5.5 V, AGND1 to AGND7 = DGND = 0 V, internal 2.5 V reference; VDRIVE = 2.7 V to 5.5 V; TA = −40°C to +105°C, unless
otherwise noted. DAC OUTV+ AB and DAC OUTV+ CD = 4.5 V to 16.5 V; OFFSET IN x is floating; therefore, the DAC output span = 0 V
to 5 V.
Table 1.
Parameter
ACCURACY 1
Resolution
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Zero-Code Error
Full-Scale Error
Offset Error
Offset Error Temperature
Coefficient
Gain Error
Gain Error Drift
DAC OUTPUT CHARACTERISTICS
Output Voltage Span
Output Voltage Offset
Offset Input Pin Range
DC Input Impedance 2
Output Voltage Settling Time2
Slew Rate2
Short-Circuit Current2
Load Current2
Capacitive Load Stability2
DC Output Impedance2
REFERENCE
Reference Output Voltage
Reference Input Voltage Range
Input Current
Input Capacitance2
VREF Output Impedance2
Reference Temperature
Coefficient
1
2
Min
Typ
Max
Unit
±1
±0.3
2.5
±3
±1
6
10
±4
±2
Bits
LSB
LSB
mV
mV
mV
mV
ppm/°C
12
±5
±0.025
±5
0
0
0
±0.155
% FSR
ppm/°C
2 × VREF
10
V
V
5
V
kΩ
µs
75
8
1.1
40
±10
V/µs
mA
mA
nF
Ω
10
1
2.49
0
2.5
400
20
5
10
2.51
AVDD − 2
480
25
V
V
µA
pF
Ω
ppm/°C
Linearity calculated using a reduced code range: Code 10 to Code 4095.
Guaranteed by design and characterization; not production tested.
Rev. 0 | Page 4 of 44
Test Conditions/Comments
Guaranteed monotonic
DAC OUTV+ = 5.5 V
Measured in the linear region, TA = −40°C to +105°C
Measured in the linear region, TA = 25°C
0 V to 5 V for a 2.5 V reference
The output voltage span can be positioned in the 0 V to 15 V
range; if the OFFSET IN x pin is left floating, the offset =
2/3 × VREF, giving an output of 0 V to 2 × VREF
VOUT = 3 × VOFFSET − 2 × VREF + VDAC
100 kΩ to VREF, and 200 kΩ to AGND; see Figure 45
1/4 to 3/4 change within 1/2 LSB, measured from last
SCL edge
Full-scale current shorted to ground
Source and/or sink within 200 mV of supply
RL = ∞
±0.2% maximum at 25°C, AVDD = 5 V
VREF = 2.5 V
A buffer is required if the reference output is used to drive
external loads
Data Sheet
AD7294-2
ADC SPECIFICATIONS
AVDD = 4.5 V to 5.5 V, AGND1 to AGND7 = DGND = 0 V, internal or external 2.5 V reference; VDRIVE = 2.7 V to 5.5 V; VPPx = AVDD to 59.4 V;
TA = −40°C to +105°C, unless otherwise noted.
Table 2.
Parameter
DC ACCURACY
Resolution
Integral Nonlinearity (INL) 1
Min
Differential Nonlinearity (DNL)1
Single-Ended Mode
Offset Error
Offset Error Match
Gain Error
Gain Error Match
Differential Mode
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
CONVERSION RATE
Conversion Time 2
Autocycle Update Rate2
Throughput Rate
ANALOG INPUT 3
Single-Ended Input Range
Typ
Max
Unit
12
±0.5
±0.5
±0.5
±1
±1.5
±0.99
Bits
LSB
LSB
LSB
±1
±0.4
±0.5
±0.4
±7
±4.5
LSB
LSB
LSB
LSB
LSB
LSB
3
50
μs
μs
kSPS
0 V to VREF mode
0 V to 2 × VREF mode
0 V to VREF mode
0 V to 2 × VREF mode
0 V to VREF mode
0 V to 2 × VREF mode
73
72
dB
dB
72.5
dB
fIN = 10 kHz sine wave; differential mode
fIN = 10 kHz sine wave; single-ended and pseudo
differential modes
fIN = 10 kHz sine wave; differential mode
71.5
dB
Total Harmonic Distortion (THD)1
−81
−79
dB
dB
Spurious-Free Dynamic Range (SFDR)1
−81
−79
dB
dB
Channel-to-Channel Isolation2
−90
dB
Fully Differential Input Range: VIN+ − VIN−
Input Capacitance2
DC Input Leakage Current
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio (SNR)1
Signal-to-Noise and Distortion Ratio
(SINAD)1
VREF
2 × VREF
VREF
2 × VREF
+VREF
+2 × VREF
fSCL = 400 kHz
V
V
V
V
V
V
pF
µA
Pseudo Differential Input Range: VIN+ − VIN− 4
0
0
0
0
−VREF
−2 × VREF
Differential mode
Single-ended or pseudo differential mode
Differential, single-ended, and pseudo differential
modes
LSB
LSB
LSB
LSB
±1
±0.5
±3
±0.5
±1
±0.5
22.22
Test Conditions/Comments
30
±1
Rev. 0 | Page 5 of 44
fIN = 10 kHz sine wave; single-ended and pseudo
differential modes
fIN = 10 kHz sine wave; differential mode
fIN = 10 kHz sine wave; single-ended and pseudo
differential modes
fIN = 10 kHz sine wave; differential mode
fIN = 10 kHz sine wave; single-ended and pseudo
differential modes
fIN = 0.5 Hz to 100 kHz
AD7294-2
Parameter
TEMPERATURE SENSOR—INTERNAL
Operating Range
Accuracy
Resolution
Update Rate
TEMPERATURE SENSOR—EXTERNAL
Operating Range
Accuracy
Resolution
Low Level Output Current Source2
Medium Level Output Current Source2
High Level Output Current Source2
Maximum Series Resistance (RS) for
External Diode2
Maximum Parallel Capacitance (CP) for
External Diode2
CURRENT SENSE
VPP Supply Range
Gain Error
Differential Input
RS(+)/RS(−) Input Bias Current
CMRR/PSRR2
Offset Error
Offset Drift
Amplifier Peak-to-Peak Noise2
VPP Supply Current
REFERENCE
Reference Output Voltage
Reference Input Voltage Range2
DC Leakage Current
VREF Output Impedance2
Input Capacitance2
Reference Temperature Coefficient
Data Sheet
Min
Typ
−40
Max
Unit
Test Conditions/Comments
+105
±2
±2.5
°C
°C
°C
°C
ms
Internal temperature sensor, TA = −30°C to +90°C
Internal temperature sensor, TA = −40°C to +105°C
LSB size
+150
±2
10
°C
°C
°C
µA
µA
µA
kΩ
1
nF
59.4
±0.75
V
% FSR
mV
µA
dB
µV
µV/°C
µV
mA
0.25
5
−55
0.25
8
32
128
External transistor is 2N3906
Limited by external diode
TA = TDIODE = −40°C to +105°C
LSB size
For
