AD797BN

a FEATURES Low Noise 0.9 nV/√Hz typ (1.2 nV/√ Hz max) Input Voltage Noise at 1 kHz 50 nV p-p Input Voltage Noise, 0.1 Hz to 10 Hz Low Distortion –120 dB Total Harmonic Distortion at 20 kHz Excellent AC Characteristics 800 ns Settling Time to 16 Bits (10 V Step) 110 MHz Gain Bandwidth (G = 1000) 8 MHz Bandwidth (G = 10) 280 kHz Full Power Bandwidth at 20 V p-p 20 V/ s Slew Rate Excellent DC Precision 80 V max Input Offset Voltage 1.0 V/ C VOS Drift Specified for 5 V and 15 V Power Supplies High Output Drive Current of 50 mA APPLICATIONS Professional Audio Preamplifiers IR, CCD, and Sonar Imaging Systems Spectrum Analyzers Ultrasound Preamplifiers Seismic Detectors ADC/DAC Buffers PRODUCT DESCRIPTION Ultralow Distortion, Ultralow Noise Op Amp AD797* CONNECTION DIAGRAM 8-Pin Plastic Mini-DIP (N), Cerdip (Q) and SOIC (R) Packages OFFSET NULL –IN +IN –VS 1 2 3 4 AD797 8 7 6 DECOMPENSATION & DISTORTION NEUTRALIZATION +VS OUTPUT OFFSET NULL TOP VIEW 5 necessary for preamps in microphones and mixing consoles. Furthermore, the AD797’s excellent slew rate of 20 V/µs and 110 MHz gain bandwidth make it highly suitable for low frequency ultrasound applications. The AD797 is also useful in IR and Sonar Imaging applications where the widest dynamic range is necessary. The low distortion and 16-bit settling time of the AD797 make it ideal for buffering the inputs to Σ∆ ADCs or the outputs of high resolution DACs especially when they are used in critical applications such as seismic detection and spectrum analyzers. Key features such as a 50 mA output current drive and the specified power supply voltage range of ± 5 to ± 15 volts make the AD797 an excellent general purpose amplifier. –90 The AD797 is a very low noise, low distortion operational amplifier ideal for use as a preamplifier. The low noise of 0.9 nV/√ Hz and low total harmonic distortion of –120 dB at audio bandwidths give the AD797 the wide dynamic range 5 Hz 4 –100 0.001 INPUT VOLTAGE NOISE – nV/ THD – dB –110 0.0003 2 1 –120 MEASUREMENT LIMIT 0.0001 0 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz –130 100 300 1k 3k 10k FREQUENCY – Hz 30k 100k 300k AD797 Voltage Noise Spectral Density *Patent pending. THD vs. Frequency REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 THD – % 3 AD797–SPECIFICATIONS (@ T = +25 C and V = A S 15 V dc, unless otherwise noted) Min AD797A/S1 Typ Max 25 50 0.2 0.25 0.5 100 120 1 1 1 1 14000 20 6 15 5 20000 110 450 8 280 20 800 130 120 130 120 50 1.7 0.9 1.0 2.0 ± 11 ± 2.5 ± 12 ± 11 ± 2.5 30 ± 12 ±3 ± 13 ± 13 ±3 80 50 –98 –120 –90 –110 ± 11 ± 2.5 ± 12 ± 11 ± 2.5 30 80 125/180 1.0 1.5 3.0 400 600/700 2 2 2 2 14000 Min AD797B Typ Max 10 30 0.2 40 60 0.6 Units µV µV µV/°C µA µA nA nA V/µV V/µV V/µV V/µV V/V MHz MHz MHz kHz V/µs ns dB dB dB dB 2.5 1.2 1.2 nV p-p nV/√Hz nV/√Hz µV rms pA/√Hz V V V V V mA mA –90 dB dB Model INPUT OFFSET VOLTAGE Conditions TMIN to TMAX VS ± 5 V, ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V Offset Voltage Drift INPUT BIAS CURRENT TMIN to TMAX INPUT OFFSET CURRENT TMIN to TMAX OPEN-LOOP GAIN VOUT = ± 10 V RLOAD = 2 kΩ TMIN to TMAX RLOAD = 600 Ω TMIN to TMAX @ 20 kHz2 G = 1000 G = 10002 G = 10 VO = 20 V p-p, RLOAD = 1 kΩ RLOAD = 1 kΩ 10 V Step VCM = CMVR TMIN to TMAX VS = ± 5 V to ± 18 V TMIN to TMAX f = 0. 1 Hz to 10 Hz f = 10 Hz f = 1 kHz f = 10 Hz–1 MHz f = 1 kHz 0.25 0.9 0.25 2.0 80 120 20 10 15 7 20000 110 450 8 280 20 800 130 120 130 120 50 1.7 0.9 1.0 2.0 ± 12 ±3 ± 13 ± 13 ±3 80 50 –98 200 300 ± 5 V, ± 15 V ± 15 V DYNAMIC PERFORMANCE Gain Bandwidth Product –3 dB Bandwidth Full Power Bandwidth3 Slew Rate Settling Time to 0.0015% COMMON-MODE REJECTION POWER SUPPLY REJECTION INPUT VOLTAGE NOISE ± 15 V ± 15 V ± 15 V ± 15 V ± 15 V ± 15 V ± 5 V, ± 15 V 12.5 114 110 114 110 12.5 1200 120 114 120 114 1200 ± 15 V ± 15 V ± 15 V ± 15 V ± 15 V ± 15 V ±5 V 1.2 1.3 INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE OUTPUT VOLTAGE SWING RLOAD = 2 kΩ RLOAD = 600 Ω RLOAD = 600 Ω Short-Circuit Current Output Current4 TOTAL HARMONIC DISTORTION RLOAD = 1 kΩ, CN = 50 pF f = 250 kHz, 3 V rms RLOAD = 1 kΩ f = 20 kHz, 3 V rms ± 15 V ± 15 V ±5 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 15 V ± 15 V –120 –110 INPUT CHARACTERISTICS Input Resistance (Differential) Input Resistance (Common Mode) Input Capacitance (Differential)5 Input Capacitance (Common Mode) OUTPUT RESISTANCE POWER SUPPLY Operating Range Quiescent Current AV = +1, f = 1 kHz ±5 7.5 100 20 5 3 ± 18 10.5 ±5 7.5 100 20 5 3 ± 18 10.5 kΩ MΩ pF pF mΩ V mA ± 5 V, ± 15 V 8.2 8.2 NOTES 1 See standard military drawing for 883B specifications. 2 Specified using external decompensation capacitor, see Applications section. 3 Full Power Bandwidth = Slew Rate/2 π VPEAK. 4 Output Current for |V S – VOUT| >4 V, A OL > 200 kΩ. 5 Differential input capacitance consists of 1.5 pF package capacitance and 18.5 pF from the input differential pair. Specifications subject to change without notice. –2– REV. C AD797 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation @ +25°C2 Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . ± 0.7 V Output Short Circuit Duration . . . . . . . Indefinite Within max Internal Power Dissipation Storage Temperature Range (Cerdip) . . . . . . –65°C to +150°C Storage Temperature Range (N, R Suffix) . . –65°C to +125°C Operating Temperature Range AD797A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C AD797S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C Lead Temperature Range (Soldering 60 sec) . . . . . . . +300°C NOTES 1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Internal Power Dissipation: 8-Pin SOIC = 0.9 Watts (T A–25°C)/θJA 8-Pin Plastic DIP and Cerdip = 1.3 Watts – (T A–25°C)/θJA Thermal Characteristics 8-Pin Plastic DIP Package: θJA = 95°C/W 8-Pin Cerdip Package: θJA = 110°C/W 8-Pin Small Outline Package: θJA = 155°C/W ABSOLUTE MAXIMUM RATINGS 1 3 The AD797’s inputs are protected by back-to-back diodes. To achieve low noise, internal current limiting resistors are not incorporated into the design of this amplifier. If the differential input voltage exceeds ± 0.7 V, the input current should be limited to less than 25 mA by series protection resistors. Note, however, that this will degrade the low noise performance of the device. ESD SUSCEPTIBILITY ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD797 features proprietary ESD protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality. ORDERING GUIDE Model AD797AN AD797BN AD797BR AD797BR-REEL AD797BR-REEL7 AD797AR AD797AR-REEL AD797AR-REEL7 5962-9313301MPA Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –55°C to +125°C Package Description 8-Pin Plastic DIP 8-Pin Plastic DIP 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Cerdip Package Option N-8 N-8 SO-8 SO-8 SO-8 SO-8 SO-8 SO-8 Q-8 METALIZATION PHOTO Contact factory for latest dimensions. Dimensions shown in inches and (mm). NOTE The AD797 has double layer metal. Only one layer is shown here for clarity. REV. C –3– AD797–Typical Characteristics 20 INPUT COMMON-MODE RANGE – ±Volts 15 10 5 0 0 5 10 SUPPLY VOLTAGE – ±Volts 15 20 VERTICAL SCALE – 0.01µV/DIV HORIZONTAL SCALE – 5 sec/DIV Figure 1. Common-Mode Voltage Range vs. Supply 20 Figure 4. 0.1 Hz to 10 Hz Noise 0.0 OUTPUT VOLTAGE SWING – ±Volts 15 INPUT BIAS CURRENT – µA 15 20 –0.5 10 +VOUT –V OUT 5 –1.0 –1.5 0 0 5 10 SUPPLY VOLTAGE – ±Volts –2.0 –60 –40 –20 0 20 40 60 80 TEMPERATURE – °C 100 120 140 Figure 2. Output Voltage Swing vs. Supply 30 OUTPUT VOLTAGE SWING – Volts p-p Figure 5. Input Bias Current vs. Temperature 140 VS = ±15V 20 SHORT CIRCUIT CURRENT – mA 120 100 SOURCE CURRENT SINK CURRENT 80 10 V S = ±5V 60 0 10 100 1k LOAD RESISTANCE – Ω 10k 40 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE – °C Figure 3. Output Voltage Swing vs. Load Resistance Figure 6. Short Circuit Current vs. Temperature –4– REV. C AD797 11 QUIESCENT SUPPLY CURRENT – mA 140 POWER SUPPLY REJECTION – dB 10 +125°C 120 PSR –SUPPLY PSR +SUPPLY 150 COMMON MODE REJECTION – dB 100 9 80 CMR 60 125 8 +25°C 100 7 –55°C 6 0 40 75 5 10 SUPPLY VOLTAGE – ±Volts 15 20 20 1 10 100 1k 10k 100k FREQUENCY – Hz 50 1M Figure 7. Quiescent Supply Current vs. Supply Voltage Figure 10. Power Supply and Common-Mode Rejection vs. Frequency –60 RL = 600 Ω G = +10 FREQ = 10kHz NOISE BW = 100kHz THD + NOISE – dB 12 FREQ = 1kHz RL = 600Ω OUTPUT VOLTAGE – Volts rms G = +10 9 –80 6 VS = ±5V –100 VS = ±15V 3 0 0 ±5 ±10 SUPPLY VOLTAGE – Volts ±15 ±20 –120 0.01 0.1 1.0 10 OUTPUT LEVEL – Volts Figure 8. Output Voltage vs. Supply for 0.01% Distortion Figure 11. Total Harmonic Distortion (THD) + Noise vs. Output Level 30 ± 15V SUPPLIES 1.0 0.8 SETTLING TIME – µs 0.0015% 0.6 0.01% 0.4 RL = 600 Ω 20 10 ±5V SUPPLIES 0.2 0.0 0 2 4 6 8 10 STEP SIZE – Volts 0 10k 100k 1M 10M Figure 9. Settling Time vs. Step Size (± ) Figure 12. Large Signal Frequency Response REV. C –5– AD797–Typical Characteristics 4 30 SLEW RATE – V/µs GAIN/BANDWIDTH PRODUCT 110 3 SLEW RATE RISING EDGE 25 SLEW RATE FALLING EDGE 20 90 100 2 1 0 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz 15 –60 –40 –20 0 20 40 60 80 100 120 80 140 TEMPERATURE – °C Figure 13. Input Voltage Noise Spectral Density 120 PHASE MARGIN PHASE MARGIN – DEGREES Figure 16. Slew Rate & Gain/Bandwidth Product vs. Temperature 160 +100 100 OPEN-LOOP GAIN – dB WITHOUT RS* WITH RS* +80 80 +60 OPEN-LOOP GAIN – dB 140 60 GAIN 40 *RS = 100Ω SEE FIGURE 22 WITHOUT RS* WITH RS* 0 100 1k 10k 100k 1M 10M +40 +20 120 20 0 100M 100 100 1k LOAD RESISTANCE – Ohms 10k FREQUENCY – Hz Figure 14. Open-Loop Gain & Phase vs. Frequency MAGNITUDE OF OUTPUT IMPEDANCE – Ohms 300 Figure 17. Open-Loop Gain vs. Resistive Load 100 INPUT OFFSET CURRENT – nA OVER COMPENSATED 150 10 * SEE FIGURE 29 0 1 WITHOUT CN* –150 UNDER COMPENSATED 0.1 WITH CN* –300 –60 0.01 –40 –20 0 20 40 60 80 100 120 140 10 100 1k 10k 100k TEMPERATURE – °C FREQUENCY – Hz Figure 15. Input Offset Current vs. Temperature Figure 18. Magnitude of Output Impedance vs. Frequency –6– REV. C GAIN/BANDWIDTH PRODUCT – MHz (G = 1000) 5 35 120 INPUT VOLTAGE NOISE – nV/ Hz 1M AD797 20pF 1kΩ +V S 1kΩ VIN 2 7 1µs 100 90 50mV 100 90 100ns ** AD797 3 4 6 ** VOUT 10 0% 10 0% ** SEE FIGURE 32 –VS 5V Figure 19. Inverter Connection Figure 20. Inverter Large Signal Pulse Response Figure 21. Inverter Small Signal Pulse Response 100Ω 5V +V S ** 100 90 1µ s 100 90 50mV 100ns 2 RS* V IN 3 7 VOUT AD797 4 6 ** 600Ω 10 10 0% –VS * VALUE OF SOURCE RESISTANCE – SEE TEXT ** SEE FIGURE 32 0% Figure 22. Follower Connection Figure 23. Follower Large Signal Pulse Response Figure 24. Follower Small Signal Pulse Response 5mV 100 90 500ns 100 90 5mV 500ns See Figure 40 for settling time test circuit. 10 0% 10 0% Figure 25. 16-Bit Settling Time Positive Input Pulse Figure 26. 16-Bit Settling Time Negative Input Pulse REV. C –7– AD797 THEORY OF OPERATION The new architecture of the AD797 was developed to overcome inherent limitations in previous amplifier designs. Previous precision amplifiers used three stages to ensure high open-loop gain, Figure 27b, at the expense of additional frequency compensation components. Slew rate and settling performance are usually compromised, and dynamic performance is not adequate beyond audio frequencies. As can be seen in Figure 27b, the first stage gain is rolled off at high frequencies by the compensation network. Second stage noise and distortion will then appear at the input and degrade performance. The AD797 on the other hand, uses a single ultrahigh gain stage to achieve dc as well as dynamic precision. As shown in the simplified schematic (Figure 28), nodes A, B, and C all track in voltage forcing the operating points of all pairs of devices in the signal path to match. By exploiting the inherent matching of devices fabricated on the same IC chip, high open-loop gain, CMRR, PSRR, and low VOS are all guaranteed by pairwise device matching (i.e., NPN to NPN & PNP to PNP), and not absolute parameters such as beta and early voltage. This matching benefits not just dc precision but since it holds up dynamically, both distortion and settling time are also reduced. This single stage has a voltage gain of >5 × 106 and VOS