AD8002AN

a FEATURES Excellent Video Specifications (RL = 150 , G = +2) Gain Flatness 0.1 dB to 60 MHz 0.01% Differential Gain Error 0.02 Differential Phase Error Low Power 5.5 mA/Amp Max Power Supply Current (55 mW) High Speed and Fast Settling 600 MHz, –3 dB Bandwidth (G = +1) 500 MHz, –3 dB Bandwidth (G = +2) 1200 V/ s Slew Rate 16 ns Settling Time to 0.1% Low Distortion –65 dBc THD, f C = 5 MHz 33 dBm Third Order Intercept, F1 = 10 MHz –66 dB SFDR, f = 5 MHz –60 dB Crosstalk, f = 5 MHz High Output Drive Over 70 mA Output Current Drives Up to Eight Back-Terminated 75 Loads (Four Loads/Side) While Maintaining Good Differential Gain/Phase Performance (0.01%/0.17 ) Available in 8-Lead Plastic DIP, SOIC and SOIC Packages APPLICATIONS A-to-D Driver Video Line Driver Differential Line Driver Professional Cameras Video Switchers Special Effects RF Receivers PRODUCT DESCRIPTION Dual 600 MHz, 50 mW Current Feedback Amplifier AD8002 FUNCTIONAL BLOCK DIAGRAM 8-Lead Plastic DIP, SOIC, and SOIC OUT1 1 –IN1 2 +IN1 3 V– 4 8 V+ 7 OUT2 6 –IN2 5 +IN2 AD8002 The outstanding bandwidth of 600 MHz along with 1200 V/µs of slew rate make the AD8002 useful in many general purpose high speed applications where dual power supplies of up to ± 6 V and single supplies from 6 V to 12 V are needed. The AD8002 is available in the industrial temperature range of –40°C to +85°C. 1 SIDE 1 0 –1 –2 –3 SIDE 1 –4 –5 SIDE 2 –0.2 –0.3 –0.4 –0.5 1M –6 –7 –8 –9 1G NORMALIZED FLATNESS – dB G = +2 RL = 100 VIN = 50mV 0.1 0 –0.1 SIDE 2 10M 100M FREQUENCY – Hz The AD8002 is a dual, low-power, high-speed amplifier designed to operate on ± 5 V supplies. The AD8002 features unique transimpedance linearization circuitry. This allows it to drive video loads with excellent differential gain and phase performance on only 50 mW of power per amplifier. The AD8002 is a current feedback amplifier and features gain flatness of 0.1 dB to 60 MHz while offering differential gain and phase error of 0.01% and 0.02° . This makes the AD8002 ideal for professional video electronics such as cameras and video switchers. Additionally, the AD8002’s low distortion and fast settling make it ideal for buffer high-speed A-to-D converters. The AD8002 offers low power of 5.5 mA/amplifier max (VS = ± 5 V) and can run on a single 12 V power supply, while capable of delivering over 70 mA of load current. It is offered in an 8-lead plastic DIP, SOIC, and µSOIC package. These features make this amplifier ideal for portable and battery-powered applications where size and power are critical. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Figure 1. Frequency Response and Flatness, G = +2 SIDE 1 G = +2 1V STEP SIDE 2 200mV 5ns Figure 2. 1 V Step Response, G = +1 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 NORMALIZED FREQUENCY RESPONSE – dB AD8002–SPECIFICATIONS (@ T = 25 C, V = A S 5 V, RL = 100 , RC1 = 75 Min , unless otherwise noted.) AD8002A Typ Max 500 600 500 600 500 600 60 90 60 700 1200 16 2.4 –65 –60 2.0 2.0 18 0.01 0.02 33 14 –66 2.0 2.0 10 5.0 3.0 6 9 25 35 6.0 10 Model Conditions DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth, N Package R Package RM Package Bandwidth for 0.1 dB Flatness N Package R Package RM Package Slew Rate Settling Time to 0.1% Rise and Fall Time NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Crosstalk, Output to Output Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error Third Order Intercept 1 dB Gain Compression SFDR DC PERFORMANCE Input Offset Voltage TMIN –TMAX Offset Drift –Input Bias Current TMIN –TMAX +Input Bias Current Open Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio Offset Voltage –Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing Output Current2 Short Circuit Current2 POWER SUPPLY Operating Range Quiescent Current/Both Amplifiers Power Supply Rejection Ratio –Input Current +Input Current TMIN –TMAX VO = ± 2.5 V TMIN –TMAX +Input –Input +Input VCM = ± 2.5 V VCM = ± 2.5 V, TMIN –TMAX VCM = ± 2.5 V, TMIN –TMAX R L = 150 Ω 250 175 G = +2, R F = 750 Ω G = +2, R F = 681 Ω G = +2, R F = 681 Ω G = +2, VO = 2 V Step G = –1, VO = 2 V Step G = +2, VO = 2 V Step G = +2, VO = 2 V Step, RF = 750 Ω fC = 5 MHz, VO = 2 V p-p G = +2, RL = 100 Ω f = 5 MHz, G = +2 f = 10 kHz, RC = 0 Ω f = 10 kHz, +In –In NTSC, G = +2, R L = 150 Ω NTSC, G = +2, R L = 150 Ω f = 10 MHz f = 10 MHz f = 5 MHz G = +2, RF = 750 Ω G = +1, RF = 1.21 kΩ G = +2, RF = 681 Ω G = +1, RF = 953 Ω G = +2, RF = 681 Ω G = +1, RF = 1 kΩ Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz V/µs V/µs ns ns dBc dB nV/√Hz pA/√Hz pA/√Hz % Degree dBm dBm dB mV mV µV/°C ±µ A ±µ A ±µ A ±µ A kΩ kΩ MΩ Ω pF ±V 900 10 50 1.5 3.2 49 54 0.3 0.2 3.1 70 110 ± 6.0 11.5 1.0 0.9 dB µA/V µA/V ±V mA mA V mA dB dB µA/V µA/V 2.7 85 ± 3.0 TMIN –TMAX +VS = +4 V to +6 V, –VS = –5 V –VS = – 4 V to – 6 V, +VS = +5 V TMIN –TMAX TMIN –TMAX 60 49 10.0 75 56 0.5 0.1 2.5 0.5 NOTES 1 RC is recommended to reduce peaking and minimize input reflections at frequencies above 300 MHz. However, R C is not required. 2 Output current is limited by the maximum power dissipation in the package. See the power derating curves. Specifications subject to change without notice. –2– REV. D AD8002 ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 V Internal Power Dissipation2 Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . . . . 1.3 W Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . 0.9 W µSOIC Package (RM) . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R, RM . . . . . –65°C to +125°C Operating Temperature Range (A Grade) . . . – 40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic DIP Package: θJA = 90°C/W 8-Lead SOIC Package: θJA = 155°C/W 8-Lead µSOIC Package: θJA = 200°C/W The maximum power that can be safely dissipated by the AD8002 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. While the AD8002 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. 2.0 8-LEAD PLASTIC-DIP PACKAGE MAXIMUM POWER DISSIPATION – W 8-LEAD SOIC PACKAGE 1.5 TJ = 150 C 1.0 0.5 8-LEAD SOIC PACKAGE 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE – C Figure 3. Plot of Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model AD8002AN AD8002AR AD8002AR-REEL AD8002AR-REEL7 AD8002ARM AD8002ARM-REEL AD8002ARM-REEL7 Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 8-Lead PDIP 8-Lead SOIC 8-Lead SOIC 13" REEL 8-Lead SOIC 7" REEL 8-Lead µSOIC 8-Lead µSOIC 13" REEL 8-Lead µSOIC 7" REEL Package Option N-8 SO-8 SO-8 SO-8 RM-8 RM-8 RM-8 Brand Code Standard Standard Standard Standard HFA HFA HFA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8002 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. D –3– AD8002–Typical Performance Characteristics 953 +5V 10 F 0.1 F 750 +5V 750 10 F 0.1 F AD8002 75 VIN PULSE GENERATOR TR/TF = 250ps 50 0.1 F 10 F –5V RL = 100 VIN PULSE GENERATOR TR/TF = 250ps AD8002 75 50 0.1 F 10 F –5V RL = 100 TPC 1. Test Circuit , Gain = +1 TPC 4. Test Circuit, Gain = +2 SIDE 1 SIDE 1 G = +1 100mV STEP G = +2 100mV STEP SIDE 2 SIDE 2 20mV 5ns 20mV 5ns TPC 2. 100 mV Step Response, G = +1 TPC 5. 100 mV Step Response, G = +2 SIDE 1 G = +1 1V STEP SIDE 1 G = +2 1V STEP SIDE 2 SIDE 2 200mV 5ns 20mV 5ns TPC 3. 1 V Step Response, G = +1 TPC 6. 1 V Step Response, G = +2 –4– REV. D AD8002 1 NORMALIZED FREQUENCY RESPONSE – dB SIDE 1 NORMALIZED FLATNESS – dB G = +2 RL = 100 VIN = 50mV 0.1 0 –0.1 –0.2 –0.3 681 75 50 50 –20 –30 –40 –50 0 –1 –2 –3 SIDE 2 VIN = –4dBV RL = 100 VS = 5.0V G = +2 RF = 750 OUTPUT SIDE 1 CROSSTALK – dB –60 –70 –80 –90 –100 –110 –120 100k OUTPUT SIDE 2 SIDE 1 –4 –5 SIDE 2 –6 –7 –0.4 –0.5 1M RF 681 –8 –9 1G 10M 100M FREQUENCY – Hz 1M 10M FREQUENCY – Hz 100M TPC 7. Frequency Response and Flatness, G = +2 TPC 10. Crosstalk (Output-to-Output) vs. Frequency –50 G = +2 RL = 100 –60 SIDE 1 G=+2 RF = 750 RC = 75 RL = 100 DISTORTION – dBc –70 2ND HARMONIC –80 3RD HARMONIC –90 SIDE 2 –100 5ns –110 10k 100k 1M FREQUENCY – Hz 10M 100M NOTES: SIDE 1: VIN = 0V; 8mV/div RTO SIDE 2: 1V STEP RTO; 400mV/div TPC 8. Distortion vs. Frequency, G = +2, RL = 100 Ω –60 TPC 11. Pulse Crosstalk, Worst Case, 1 V Step 0.02 DIFF GAIN – % –70 G = +2 RL = 1k VOUT = 2V p-p 0.01 0.00 –0.01 –0.02 G = +2 RF = 750 NTSC 2 BACK-TERMINATED LOADS (75 ) DISTORTION – dBc –80 2ND HARMONIC –90 1 BACK-TERMINATED LOAD (150 ) 2 BACK-TERMINATED LOADS (75 ) DIFF PHASE – Degrees 3RD HARMONIC 0.08 0.06 0.04 0.02 0.00 1 2 3 4 5 6 IRE 7 8 9 10 11 1 BACK-TERMINATED LOAD (150 ) –100 –110 –120 10k 100k 1M FREQUENCY – Hz 10M 100M TPC 9. Distortion vs. Frequency, G = +2, RL = 1 kΩ TPC 12. Differential Gain and Differential Phase (per Amplifier) REV. D –5– AD8002 2 1 0 VIN = 50mV G = +1 RF = 953 RL = 100 SIDE 1 0 –3 –6 6 3 0 –3 –6 –9 G = +2 RF = 681 VS = 5V RL = 100 –12 –15 –18 –21 500M INPUT LEVEL – dBV SIDE 2 GAIN – dB –1 –2 –3 –4 –5 –6 1M 953 75 50 50 –9 –12 –15 –18 –21 –24 –27 1M 10M 100M FREQUENCY – Hz 1G 10M 100M FREQUENCY – Hz TPC 13. Frequency Response, G = +1 TPC 16. Large Signal Frequency Response, G = +2 –40 G = +1 RL = 100 VOUT = 2V p-p 9 6 INPUT/OUTPUT LEVEL – dBV –50 3 0 –3 –6 75 RL = 100 G = +1 RF = 1.21k DISTORTION – dBc –60 –70 2ND HARMONIC –80 3RD HARMONIC –90 –9 50 50 –12 –15 –18 1.21k –100 10k 100k 1M FREQUENCY – Hz 10M 100M –27 1M 10M 100M FREQUENCY – Hz 500M TPC 14. Distortion vs. Frequency, G = +1, RL = 100 Ω TPC 17. Large Signal Frequency Response, G = +1 –40 G = +1 RL = 1k 45 40 35 VS = 5V RL = 100 –50 –60 DISTORTION – dBc 30 –70 2ND HARMONIC –80 –90 3RD HARMONIC GAIN – dB 25 20 15 10 5 G = +100 RF = 1000 G = +10 RF = 499 –100 0 –5 1M –110 10k 100k 1M FREQUENCY – Hz 10M 100M 10M 100M FREQUENCY – Hz 1G TPC 15. Distortion vs. Frequency, G = +1, RL = 1 kΩ TPC 18. Frequency Response, G = +10, G = +100 –6– REV. D OUTPUT LEVEL – dBV AD8002 OUTPUT G = +2 2V STEP RF = 750 RC = 75 G = +2 2V STEP RF = 750 RC = 75 RL = 100 ERROR, (0.05%/DIV) ERROR, (0.05%/DIV) OUTPUT INPUT 400mV 10ns INPUT 400mV TPC 19. Short-Term Settling Time TPC 22. Long-Term Settling Time 3.4 3.3 3.2 4 DEVICE #1 RL = 150 VS = +VOUT |–VOUT| 5V 3 INPUT OFFSET VOLTAGE – mV OUTPUT SWING – Volts 2 1 DEVICE #2 0 –1 DEVICE #3 3.1 3.0 2.9 2.8 2.7 2.6 2.5 –55 RL = 50 VS = +VOUT |–VOUT| 5V –2 –3 –55 –35 –15 5 25 45 65 85 105 125 –35 –15 5 25 45 65 85 105 125 JUNCTION TEMPERATURE – C JUNCTION TEMPERATURE – C TPC 20. Output Swing vs. Temperature TPC 23. Input Offset Voltage vs. Temperature 5 4 3 2 1 0 –1 –2 –3 –55 +IN TOTAL SUPPLY CURRENT – mA 11.5 –IN INPUT BIAS CURRENT – A 11.0 10.5 VS = 10.0 5V 9.5 –35 –15 5 25 45 65 85 105 125 9.0 –55 –35 –15 5 25 45 65 85 105 125 JUNCTION TEMPERATURE – C JUNCTION TEMPERATURE – C TPC 21. Input Bias Current vs. Temperature TPC 24. Total Supply Current vs. Temperature REV. D –7– AD8002 120 115 SHORT CIRCUIT CURRENT – mA 100 RF = 750 RC = 75 VS = 5.0V POWER = 0dBm (223.6mVrms) G = +2 RbT = 0 RbT = 50 110 105 100 95 90 85 80 75 70 –55 0.01 10 |SINK ISC| SOURCE ISC RESISTANCE – 1 0.1 –35 –15 5 25 45 65 85 105 125 10k 100k JUNCTION TEMPERATURE – C 1M 10M FREQUENCY – Hz 100M 1G TPC 25. Short Circuit Current vs. Temperature TPC 28. Output Resistance vs. Frequency 100 100 –3dB BANDWIDTH SIDE 1 0.2 SIDE 2 1 0 –1 –2 0.1dB FLATNESS 0 –0.1 –0.2 –0.3 VS = 5V VIN = 50mV G = –1 RL = 100 RF = 549 SIDE 2 SIDE 1 –3 –4 –5 –6 –7 –8 OUTPUT VOLTAGE – dB NOISE CURRENT – pA/ Hz NOISE VOLTAGE – nV/ Hz INVERTING CURRENT VS = 5V 0.1 10 NONINVERTING CURRENT VS = 5V 10 VOLTAGE NOISE VS = 5V 1 10 100 1k FREQUENCY – Hz 10k 1 100k 1M 10M 100M FREQUENCY – Hz –9 1G TPC 26. Noise vs. Frequency TPC 29. –3 dB Bandwidth vs. Frequency, G = –1 –48 –49 –50 –CMRR –50.0 –52.5 –PSRR –55.0 –57.5 CMRR – dB PSRR – dB –51 –52 –53 –54 +CMRR –60.0 –62.5 –65.0 –67.5 –70.0 2V SPAN CURVES ARE FOR WORSTCASE CONDITION WHERE ONE SUPPLY IS VARIED WHILE THE OTHER IS HELD CONSTANT. –55 –56 –55 +PSRR –72.5 –75.0 –55 –35 –15 5 25 45 65 85 JUNCTION TEMPERATURE – C 105 125 –35 –15 5 25 45 65 85 105 125 JUNCTION TEMPERATURE – C TPC 27. CMRR vs. Temperature TPC 30. PSRR vs. Temperature –8– REV. D AD8002 0 VIN 0 –10 50 –10 604 604 VIN = 200mV G = +2 –20 –30 –20 CMRR – dB 0.1 F –5V PSRR – dB 57.6 154 154 –40 –50 –60 –PSRR –30 –40 SIDE 1 SIDE 2 VS = 5.0V RL = 100 VIN = 200mV +PSRR –70 –80 –90 30k 100k –50 –60 1M 10M 100M FREQUENCY – Hz 1G 1M 10M FREQUENCY – Hz 100M 500M TPC 31. CMRR vs. Frequency TPC 34. PSRR vs. Frequency SIDE 1 G = –1 RF = 576 RG = 576 RC = 50 SIDE 1 G = –2 2V STEP RF = 549 SIDE 2 SIDE 2 400mV 5ns 400mV 5ns TPC 32. 2 V Step Response, G = –1 TPC 35. 2 V Step Response, G = –2 576 576 50 54.9 50 61.9 50 274 549 50 SIDE 1 SIDE 1 G = –1 100mV STEP RF = 549 SIDE 2 G = –1 RF = 576 RG = 576 RC = 50 RL = 100 SIDE 2 20mV 5ns 20mV 5ns TPC 33. 100 mV Step Response, G = –1 TPC 36. 100 mV Step Response, G = –2 REV. D –9– AD8002 THEORY OF OPERATION Printed Circuit Board Layout Considerations A very simple analysis can put the operation of the AD8002, a current feedback amplifier, in familiar terms. Being a current feedback amplifier, the AD8002’s open-loop behavior is expressed as transimpedance, ∆VO/∆I–IN, or TZ. The open-loop transimpedance behaves just as the open-loop voltage gain of a voltage feedback amplifier, that is, it has a large dc value and decreases at roughly 6 dB/octave in frequency. Since the RIN is proportional to 1/gm, the equivalent voltage gain is just TZ × gm, where the gm in question is the transconductance of the input stage. This results in a low open-loop input impedance at the inverting input, a now familiar result. Using this amplifier as a follower with gain, Figure 4, basic analysis yields the following result. As expected for a wideband amplifier, PC board parasitics can affect the overall closed-loop performance. Of concern are stray capacitances at the output and the inverting input nodes. If a ground plane is to be used on the same side of the board as the signal traces, a space (5 mm min) should be left around the signal lines to minimize coupling. Additionally, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. Line lengths on the order of less than 5 mm are recommended. If long runs of coaxial cable are being driven, dispersion and loss must be considered. Power Supply Bypassing TZ (S ) VO =G× VIN TZ (S ) + G × RIN + R1 G = 1+ R1 RIN = 1 / g m ≈ 50 Ω R2 R1 Adequate power supply bypassing can be critical when optimizing the performance of a high-frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier’s response. In addition, if large current transients must be delivered to the load, bypass capacitors (typically greater than 1 µF) will be required to provide the best settling time and lowest distortion. A parallel combination of 4.7 µF and 0.1 µF is recommended. Some brands of electrolytic capacitors will require a small series damping resistor ≈4.7 Ω for optimum results. DC Errors and Noise R2 RIN VOUT VIN Figure 4. Recognizing that G × RIN