AD8002ARZ-RL

Dual 600 MHz, 50 mW Current Feedback Amplifier AD8002 Data Sheet PIN CONNECTION BLOCK DIAGRAM Excellent video specifications (RL = 150 Ω, G = +2) Gain flatness: 0.1 dB to 60 MHz Differential gain error: 0.01% Differential phase error: 0.02° Low power Maximum power supply current (50 mW): 5.0 mA/amp High speed and fast settling −3 dB bandwidth (G = +1): 600 MHz −3 dB bandwidth (G = +2): 500 MHz Slew rate: 1200 V/µs Settling time to 0.1%: 16 ns Low distortion THD at fC = 5 MHz: −65 dBc Third-order intercept at f1 = 10 MHz: 33 dBm SFDR at f = 5 MHz: −66 dB Crosstalk at f = 5 MHz: −60 dB High output drive Over 70 mA output current Drives up to eight back terminated 75 Ω loads (four loads/side) while maintaining good differential gain/phase performance (0.01%/0.17°) Available in 8-lead SOIC and MSOP packages APPLICATIONS Analog-to-digital drivers Video line drivers Differential line drivers Professional cameras Video switchers Special effects RF receivers OUT1 1 –IN1 8 V+ 7 OUT2 2 6 –IN2 +IN1 3 V– 4 AD8002 5 +IN2 01044-001 FEATURES Figure 1. The AD8002 offers a low power of 5.0 mA/amp maximum (VS = ±5 V) and can run on a single 12 V power supply, yet is capable of delivering over 70 mA of load current. It is offered in 8-lead SOIC and MSOP packages. These features make this amplifier ideal for portable and battery-powered applications where size and power are critical. The bandwidth of 600 MHz along with 1200 V/µs of slew rate make the AD8002 useful in many general-purpose high speed applications where dual power supplies of up to ±6 V and single supplies from 6 V to 12 V are needed. The AD8002 is available in the industrial temperature range of −40°C to +85°C. GENERAL DESCRIPTION Rev. E SIDE 1 G = +2 1V STEP SIDE 2 200mV 5ns 01044-003 The AD8002 is a dual, low power, high speed amplifier designed to operate on ±5 V supplies. The AD8002 features unique transimpedance linearization circuitry, which allows the AD8002 to drive video loads with excellent differential gain and phase performance on only 50 mW of power per amplifier. The AD8002 is a current feedback amplifier and features gain flatness of 0.1 dB to 60 MHz while offering differential gain and phase error of 0.01% and 0.02°, which makes the AD8002 ideal for professional video electronics such as cameras and video switchers. Additionally, the low distortion and fast settling of the AD8002 make it ideal for buffer high speed analog-todigital converters (ADCs). Figure 2. 1 V Step Response, G = +1 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8002 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Choice of Feedback and Gain Resistors .................................. 14 Applications ....................................................................................... 1 Printed Circuit Board (PCB) Layout Considerations ........... 14 General Description ......................................................................... 1 Power Supply Bypassing ............................................................ 14 Pin Connection Block Diagram ..................................................... 1 DC Errors and Noise.................................................................. 14 Revision History ............................................................................... 2 Driving Capacitive Loads .......................................................... 15 Specifications..................................................................................... 3 Communications ........................................................................ 15 Absolute Maximum Ratings ............................................................ 5 Operation as a Video Line Driver ............................................ 15 Maximum Power Dissipation ..................................................... 5 Driving ADCs ............................................................................. 16 ESD Caution .................................................................................. 5 Single-Ended-to-Differential Driver Using an AD8002 ....... 16 Pin Configurations and Function Descriptions ........................... 6 Applications Information .............................................................. 18 Typical Performance Characteristics ............................................. 7 Layout Considerations ............................................................... 18 Test Circuits ..................................................................................... 13 Outline Dimensions ....................................................................... 21 Theory of Operation ...................................................................... 14 Ordering Guide .......................................................................... 21 REVISION HISTORY 8/15—Rev. D to Rev. E Updated Format .................................................................. Universal Deleted 8-Lead Plastic DIP ............................................... Universal Changes to Features Section............................................................ 1 Deleted Figure 1; Renumbered Sequentially ................................. 1 Changes to Table 1 ............................................................................ 3 Change to Figure 3 ........................................................................... 5 Added Pin Configurations and Function Descriptions Section, Figure 4, Figure 5, and Table 3; Renumbered Sequentially ......... 6 Change to Figure 10 ......................................................................... 7 Change to Figure 16 ......................................................................... 8 Change to Figure ............................................................................... 9 Change to Figure 34 ....................................................................... 11 Change to Figure 32 ....................................................................... 11 Added Test Circuits Section and Figure 42 to Figure 47 ........... 13 Change to Theory of Operation Section ..................................... 14 Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 21 4/01—Rev. C to Rev. D Max Ratings Changed ...................................................................... 3 Rev. E | Page 2 of 21 Data Sheet AD8002 SPECIFICATIONS At TA = 25°C, VS = ±5 V, RL = 100 Ω, RC1 = 75 Ω, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth R Package RM Package Bandwidth for 0.1 dB Flatness R Package RM Package Slew Rate Settling Time to 0.1% Rise and Fall Time NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion (THD) Crosstalk (Output to Output) Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error Third-Order Intercept 1 dB Gain Compression Spurious-Free Dynamic Range (SFDR) DC PERFORMANCE Input Offset Voltage Test Conditions/Comments Min MHz MHz MHz MHz G = +2, RF = 681 Ω G = +2, RF = 681 Ω G = +2, VOUT = 2 V step G = −1, VOUT = 2 V step G = +2, VOUT = 2 V step G = +2, VOUT = 2 V step, RF = 750 Ω 90 60 700 1200 16 2.4 MHz MHz V/µs V/µs ns ns fC = 5 MHz, VOUT = 2 V p-p, G = +2, RL = 100 Ω f = 5 MHz, G = +2 f = 10 kHz, RC = 0 Ω f = 10 kHz, +IN1,+IN2 f = 10 kHz, −IN1, −IN2 NTSC, G = +2, RL = 150 Ω NTSC, G = +2, RL = 150 Ω f1= 10 MHz f = 10 MHz f = 5 MHz −65 −60 2.0 2.0 18 0.01 0.02 33 14 −66 dBc dB nV/√Hz pA/√Hz pA/√Hz % Degrees dBm dBm dB −25 −35 −6.0 −10 250 175 TMIN to TMAX Input Bias Current (+IN1, +IN2) Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio Offset Voltage Input Current (−IN1, −IN2) Input Current (+IN1, +IN2) OUTPUT CHARACTERISTICS Output Voltage Swing Output Current2 Short-Circuit Current2 Unit 500 600 500 600 Offset Drift Input Bias Current (−IN1, −IN2) INPUT CHARACTERISTICS Input Resistance Max G = +2, RF = 681 Ω G = +1, RF = 953 Ω G = +2, RF = 681 Ω G = +1, RF = 1 kΩ TMIN to TMAX Open-Loop Transresistance Typ TMIN to TMAX VOUT = ±2.5 V TMIN to TMAX +IN1, +IN2 −IN1, −IN2 +IN1, +IN2 2.0 2.0 10 +5.0 +3.0 6 9 +25 +35 +6.0 +10 900 10 50 1.5 ±3.2 VCM = ±2.5 V VCM = ±2.5 V, TMIN to TMAX VCM = ±2.5 V, TMIN to TMAX 49 RL = 150 Ω ±2.7 85 Rev. E | Page 3 of 21 54 0.3 0.2 ±3.1 70 110 mV mV µV/°C µA µA µA µA kΩ kΩ MΩ Ω pF V 1.0 0.9 dB µA/V µA/V V mA mA AD8002 Parameter POWER SUPPLY Operating Range Quiescent Current/Both Amplifiers Power Supply Rejection Ratio Input Current (−IN1, −IN2) Input Current (+IN1, +IN2) 1 2 Data Sheet Test Conditions/Comments Min Typ ±3.0 TMIN to TMAX +VS = +4 V to +6 V, −VS = −5 V −VS = −4 V to −6 V, +VS = +5 V TMIN to TMAX TMIN to TMAX 60 49 10.0 75 56 0.5 0.1 RC is recommended to reduce peaking and minimize input reflections at frequencies above 300 MHz. However, RC is not required. Output current is limited by the maximum power dissipation in the package. See Figure 3. Rev. E | Page 4 of 21 Max Unit ±6.0 11.5 V mA dB dB µA/V µA/V 2.5 0.5 Data Sheet AD8002 ABSOLUTE MAXIMUM RATINGS Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering 10 sec) 1 Rating 13.2 V 0.9 W 0.6 W ±VS ±1.2 V Observe power derating curves −65°C to +125°C −40°C to +85°C 300°C 2.0 TJ = 150°C Specification is for device in free air: 8-lead SOIC: θJA = 155°C/W. 8-lead MSOP: θJA = 200°C/W. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 8-LEAD SOIC PACKAGE 1.5 1.0 0.5 8-LEAD MSOP PACKAGE 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD8002 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. Rev. E | Page 5 of 21 01044-004 Parameter Supply Voltage Internal Power Dissipation1 SOIC (R) MSOP (RM) Input Common-Mode Voltage Differential Input Voltage Output Short-Circuit Duration Although the AD8002 is internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. MAXIMUM POWER DISSIPATION (W) Table 2. AD8002 Data Sheet –IN1 2 +IN1 3 AD8002 8 V+ 7 OUT2 TOP VIEW (Not to Scale) 6 –IN2 V– 4 5 +IN2 OUT1 1 01044-100 OUT1 1 +IN1 3 TOP VIEW (Not to Scale) 8 V+ 7 OUT2 6 –IN2 5 +IN2 Figure 5. 8-Lead MSOP Table 3. Pin Function Descriptions Mnemonic OUT1 −IN1 +IN1 V− +IN2 −IN2 OUT2 V+ AD8002 V– 4 Figure 4. 8-Lead SOIC Pin No. 1 2 3 4 5 6 7 8 –IN1 2 Description Output 1 Inverting Input 1 Noninverting Input 1 VEE or Negative Supply Noninverting Input 2 Inverting Input 2 Output 2 VCC or Positive Supply Rev. E | Page 6 of 21 01044-101 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Data Sheet AD8002 TYPICAL PERFORMANCE CHARACTERISTICS SIDE 1 SIDE 1 G = +1 100mV STEP G = +2 100mV STEP SIDE 2 5ns 01044-008 20mV 01044-005 SIDE 2 20mV 5ns Figure 9. 1 V Step Response, G = +2 Figure 6. 100 mV Step Response, G = +1 5ns –2 –3 0.1 SIDE 1 0 –4 –5 –0.1 SIDE 2 –0.2 01044-006 SIDE 2 –1 SIDE 2 –6 –0.3 –7 –0.4 –8 –0.5 1M –9 1G 10M 100M FREQUENCY (Hz) 01044-009 G = +1 1V STEP 20mV G = +2 RL = 100Ω VIN = 50mV NORMALIZED FLATNESS (dB) SIDE 1 NORMALIZED FREQUENCY RESPONSE (dB) 1 0 SIDE 1 Figure 10. Frequency Response and Flatness, G = +2 (See Figure 41) Figure 7. 1 V Step Response, G = +1 –50 G = +2 RL = 100Ω –60 G = +2 100mV STEP DISTORTION (dBc) SIDE 1 –70 SECOND HARMONIC –80 THIRD HARMONIC –90 –100 5ns –110 10k 100k 1M FREQUENCY (Hz) 10M Figure 11. Distortion vs. Frequency, G = +2, RL = 100 Ω Figure 8. 100 mV Step Response, G = +2 Rev. E | Page 7 of 21 100M 01044-010 20mV 01044-007 SIDE 2 AD8002 Data Sheet –60 –80 SECOND HARMONIC THIRD HARMONIC –100 100k 1M FREQUENCY (Hz) –0.01 10M 100M G = +2 RF = 750Ω NTSC 0.08 0.06 0.04 1 BACK TERMINATED LOAD (150Ω) 0.02 0 1 2 3 4 5 6 IRE 7 VIN = –4dBV RL = 100Ω VS = ±5.0V G = +2 RF = 750Ω VIN = 50mV G = +1 RF = 953Ω RL = 100Ω 1 OUTPUT SIDE 1 9 10 11 SIDE 1 0 –50 SIDE 2 –60 –1 OUTPUT SIDE 2 GAIN (V) CROSSTALK (dB) 8 2 –20 –40 2 BACK TERMINATED LOADS (75Ω) Figure 15. Differential Gain and Differential Phase (per Amplifier) Figure 12. Distortion vs. Frequency, G = +2, RL = 1 kΩ –30 1 BACK TERMINATED LOAD (150Ω) –0.02 01044-011 –110 –120 10k 0 DIFFERENTIAL PHASE (Degrees) –90 2 BACK TERMINATED LOADS (75Ω) 0.01 01044-014 –70 –70 –80 –2 –3 –90 –4 –100 –5 –110 10M FREQUENCY (Hz) 100M –6 1M 10M 100M FREQUENCY (Hz) 01044-015 1M 01044-012 –120 100k 1G Figure 16. Gain vs. Frequency Response, G = +1 (See Figure 42) Figure 13. Crosstalk (Output to Output) vs. Frequency –40 G = +1 RL = 100Ω VOUT = 2V p-p –50 DISTORTION (dBc) SIDE 1 G = +2 RF = 750Ω RC = 75Ω RL = 100Ω SIDE 2 –60 –70 SECOND HARMONIC –80 THIRD HARMONIC –90 –100 10k SIDE 1: VIN = 0V; 8mV/DIV RTO SIDE 2: 1V STEP RTO; 400mV/DIV 01044-013 5ns 100k 1M FREQUENCY (Hz) 10M 100M Figure 17. Distortion vs. Frequency, G = +1, RL = 100 Ω Figure 14. Pulse Crosstalk, Worst Case, 1 V Step Rev. E | Page 8 of 21 01044-016 DISTORTION (dBc) DIFFERENTIAL GAIN (%) 0.02 G = +2 RL = 1kΩ VOUT = 2V p-p Data Sheet AD8002 –40 45 G = +1 RL = 1kΩ –50 40 VS = ±5.0V RL = 100Ω –60 30 SECOND HARMONIC GAIN (dB) DISTORTION (dBc) 35 –70 THIRD HARMONIC –80 G = +100 RF = 1000Ω 25 20 G = +10 RF = 499Ω 15 10 –90 5 –100 1M FREQUENCY (Hz) 10M 100M 01044-017 100k –5 1M –3 3 –6 0 –9 –3 –12 –6 –15 –9 G = +2 RF = 681Ω VS = ±5V RL = 100Ω ERROR, (0.05%/DIV) –15 INPUT –18 –24 1M 10M FREQUENCY (Hz) 100M –21 500M 400mV 01044-018 –27 10ns 01044-021 –21 –12 G = +2 2V STEP RF = 750Ω RC = 75Ω OUTPUT OUTPUT LEVEL (dBV) 6 –18 1G Figure 21. Frequency Response, G = +10, G = +100 0 Figure 22. Short Term Settling Time Figure 19. Large Signal Frequency Response, G = +2 3.4 RL = 100Ω G = +1 RF = 1.21Ω 6 3.3 3 RL = 150Ω 3.2 OUTPUT SWING (V) 0 –3 –6 –9 –12 VS = ±5V 500M 01044-019 2.6 100M RL = 50Ω 2.8 –18 10M FREQUENCY (Hz) |–VOUT| 2.9 2.7 1M +VOUT 3.0 –15 –21 VS = ±5V 3.1 2.5 –55 +VOUT |–VOUT| –35 –15 5 25 45 65 85 105 JUNCTION TEMPERATURE (°C) Figure 23. Output Swing vs. Junction Temperature Figure 20. Large Signal Frequency Response, G = +1 (See Figure 43) Rev. E | Page 9 of 21 125 01044-022 9 INPUT/OUTPUT LEVEL (dBV) INPUT LEVEL (dBV) Figure 18. Distortion vs. Frequency, G = +1, RL = 1 kΩ 10M 100M FREQUENCY (Hz) 01044-020 0 –110 10k AD8002 Data Sheet 11.5 5 4 1 0 –1 +IN –2 –3 –55 –35 –15 5 25 45 65 85 JUNCTION TEMPERATURE (°C) 105 125 10.5 VS = 5V 10.0 9.5 9.0 –55 –35 –15 5 25 45 65 85 105 125 JUNCTION TEMPERATURE (°C) Figure 24. Input Bias Current vs. Junction Temperature 01044-026 TOTAL SUPPLY CURRENT (mA) 2 11.0 01044-023 INPUT BIAS CURRENT (µA) –IN 3 Figure 27. Total Supply Current vs. Junction Temperature 120 G = +2 2V STEP RF = 750Ω RC = 75Ω RL = 100Ω SHORT-CIRCUIT CURRENT (mA) 115 ERROR, (0.05%/DIV) OUTPUT INPUT 110 105 100 |SINK ISC| SOURCE ISC 95 90 85 80 2µs Figure 25. Long Term Settling Time –35 –15 5 25 45 65 85 JUNCTION TEMPERATURE (°C) 105 125 01044-027 400mV 01044-024 75 70 –55 Figure 28. Short-Circuit Current vs. Junction Temperature 100 100 4 DEVICE 1 1 DEVICE 2 0 DEVICE 3 –1 INVERTING CURRENT VS = ±5V 10 10 NONINVERTING CURRENT V S = ±5V NOISE CURRENT ( pA/√Hz) NOISE VOLTAGE (nV/√Hz) 2 VOLTAGE NOISE VS = ±5V –3 –55 –35 –15 5 25 45 65 85 105 JUNCTION TEMPERATURE (°C) 125 Figure 26. Input Offset Voltage vs. Junction Temperature 1 10 100 1k FREQUENCY (Hz) 10k Figure 29. Noise Voltage vs. Frequency Rev. E | Page 10 of 21 1 100k 01044-028 –2 01044-025 INPUT OFFSET VOLTAGE (mV) 3 Data Sheet AD8002 –48 –50.0 –49 –52.5 –PSRR –55.0 –50 –57.5 PSRR (dB) CMRR (dB) –CMRR –51 +CMRR –52 –53 2V SPAN CURVES ARE FOR WORSTCASE CONDITION WHERE ONE SUPPLY IS VARIED WHILE THE OTHER IS HELD CONSTANT. –60.0 –62.5 –65.0 –67.5 –54 –70.0 +PSRR –55 –35 –15 5 25 45 65 85 JUNCTION TEMPERATURE (°C) 105 125 –75.0 –55 01044-029 –56 –55 –35 –15 5 25 45 65 85 105 125 JUNCTION TEMPERATURE (°C) Figure 30. Common-Mode Rejection Ratio (CMRR) vs. Junction Temperature Figure 33. Power Supply Rejection Ration (PSRR) vs. Junction Temperature 0 RbT = 50Ω 1 –20 RbT = 0Ω –30 –40 SIDE 1 0.1 –50 VS = ±5.0V RL = 100Ω VIN = 200mV SIDE 2 0.01 100k 100M 1M 10M FREQUENCY (Hz) 1G 01044-030 –60 10k 1M 10M 100M FREQUENCY (Hz) 1G Figure 34. CMRR vs. Frequency (See Figure 45) Figure 31. Output Resistance vs. Frequency 1 –2 0.1 SIDE 1 0.1dB FLATNESS 0 –3 –4 –0.1 –0.3 VS = ±5.0V VIN = 50mV G = –1 RL = 100Ω RF = 549Ω SIDE 2 SIDE 1 –5 –6 –7 –8 1M G = –1 RF = 576Ω RG = 576Ω RC = 50Ω 10M 100M FREQUENCY (Hz) –9 1G SIDE 2 Figure 32. −3 dB Bandwidth vs. Frequency, G = −1 400mV 5ns Figure 35. 2 V Step Response, G = −1 Rev. E | Page 11 of 21 01044-034 –0.2 0 –1 01044-031 NORMALIZED FLATNESS (dB) SIDE 1 SIDE 2 0.2 OUTPUT VOLTAGE (dB) –3dB BANDWIDTH 01044-033 10 –10 RF = 750Ω RC = 75Ω VS = ±5.0V POWER = 0dBm (223.6mV rms) G = +2 CMRR (dB) OUTPUT RESISTANCE (Ω) 100 01044-032 –72.5 AD8002 Data Sheet SIDE 1 SIDE 1 G = –2 2V STEP RF = 549Ω SIDE 2 SIDE 2 5ns 400mV 5ns 01044-037 20mV 01044-035 G = –1 RF = 576Ω RG = 576Ω RC = 50Ω RL = 100Ω Figure 38. 2 V Step Response, G = −2 Figure 36. 100 mV Step Response, G = −1 0 –10 VIN = 200mV G = +2 SIDE 1 –20 G = –1 100mV STEP RF = 549Ω –40 –PSRR SIDE 2 –50 +PSRR –60 –70 –90 60k 100k 1M 10M FREQUENCY (Hz) 100M 400M Figure 37. PSRR vs. Frequency 20mV 5ns Figure 39. 100 mV Step Response, G = −1 Rev. E | Page 12 of 21 01044-038 –80 01044-036 PSRR (dB) –30 Data Sheet AD8002 TEST CIRCUITS 750Ω 953Ω 10µF 10µF +5V 0.1µF 0.1µF 750Ω 8 2 PULSE GENERATOR tR/tF = 250ps 75Ω RL = 100Ω 0.1µF 3 AD8002 75Ω VIN 4 50Ω 2 1 PULSE GENERATOR 10µF 01044-039 VIN AD8002 8 –5V 3 RL = 100Ω 4 50Ω 10µF tR/tF = 250ps Figure 40. Test Circuit, Gain = +1 1 0.1µF 01044-040 +5V –5V Figure 44. Test Circuit, Gain = +2 VIN 604Ω 50Ω 604Ω 681Ω 01044-041 50Ω RF 681Ω 57.6Ω 154Ω 50Ω 154Ω 0.1µF –5V Figure 41. Frequency Response and Flatness Test Circuit (See Figure 10) 01044-044 75Ω Figure 45. CMRR Test Circuit (See Figure 34) 576Ω 576Ω 50Ω 953Ω 50Ω 54.9Ω 01044-042 50Ω 01044-045 75Ω 50Ω Figure 42. Frequency Response Test Circuit (See Figure 16) Figure 46. 100 mV Step Response, G = −1 549Ω 274Ω 50Ω 1.21kΩ 50Ω 61.9Ω 01044-043 50Ω 50Ω Figure 43. Large Signal Frequency Response Test Circuit (See Figure 20) Rev. E | Page 13 of 21 01044-046 75Ω Figure 47. 100 mV Step Response, G = −2 AD8002 Data Sheet THEORY OF OPERATION PRINTED CIRCUIT BOARD (PCB) LAYOUT CONSIDERATIONS An analysis of the AD8002 can put the operation in familiar terms. The open-loop behavior of the AD8002 is expressed as transimpedance, ΔVOUT/ΔI−INx, or TZ. The open-loop transimpedance behaves just as the open-loop voltage gain of a voltage feedback amplifier, that is, it has a large dc value and decreases at roughly 6 dB/octave in frequency. Because the value of RIN is proportional to 1/gm, the equivalent voltage gain is just TZ × gm, where the gm in question is the transconductance of the input stage. This results in a low openloop input impedance at the inverting input. Using this amplifier as a follower with gain (see Figure 48) basic analysis yields the following result: VOUT TZ (s) =G× VIN TZ (s) + G × RIN + R1 POWER SUPPLY BYPASSING where: TZ(s) implies the transimpedance as a function of the frequency. G = 1 + R1/R2. RIN = 1/gm ≈ 50 Ω. R1 R2 VOUT Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the response of the amplifier. In addition, if large current transients must be delivered to the load, bypass capacitors (typically greater than 1 μF) are required to provide the best settling time and lowest distortion. A parallel combination of 4.7 μF and 0.1 μF is recommended. Some brands of electrolytic capacitors require a small series damping resistor ≈4.7 Ω for optimum results. DC ERRORS AND NOISE Figure 48. Small Signal Schematic Recognizing that G × RIN