Low Power Video Op Amp with Disable
AD810
Data Sheet
CONNECTION DIAGRAM
High speed
80 MHz typical −3 dB bandwidth (G = +1)
75 MHz typical −3 dB bandwidth (G = +2)
1000 V/µs typical slew rate
50 ns typical settling time to 0.1% (VOUT = 10 V step)
Ideal for video applications
30 MHz typical 0.1 dB bandwidth (G = +2, VS = ±15 V)
0.02% typical differential gain (VS = ±15 V)
0.04° typical differential phase (VS = ±15 V)
Low noise
2.9 nV/√Hz typical input voltage noise
13 pA/√Hz typical inverting input current noise
Low power
8.0 mA maximum supply current (quiescent)
2.1 mA typical supply current (power-down mode)
High performance disable function
Turn off time: 100 ns typical
Break before make guaranteed
Input to output isolation of 64 dB (off state)
Flexible operation
Specified for ±5 V and ±15 V operation
±2.9 V typical output swing into a 150 Ω load (VS = ±5 V)
AD810
OFFSET NULL 1
8
DISABLE
–IN 2
7
+VS
+IN 3
6
OUTPUT
–VS 4
5
OFSET NULL
1737-001
FEATURES
Figure 1.
APPLICATIONS
Professional video cameras
Multimedia systems
NTSC-, PAL-, and SECAM-compatible systems
Video line drivers
ADC or DAC buffers
DC restoration circuits
GENERAL DESCRIPTION
The AD810 is a composite and HDTV-compatible, current
feedback, video operational amplifier, ideal for use in systems
such as multimedia, digital tape recorders, and video cameras.
The 0.1 dB flatness specification at a bandwidth of 30 MHz
(G = +2) and the differential gain and phase of 0.02% and 0.04°
(NTSC) make the AD810 ideal for any broadcast quality video
system. All these specifications are under load conditions of
150 Ω (one 75 Ω back terminated cable).
The AD810 is ideal for power sensitive applications such as
video cameras, offering a low power supply current of 8.0 mA
Rev. B
maximum. The disable feature reduces the power supply
current to only 2.1 mA, while the amplifier is not in use, to
conserve power. Furthermore, the AD810 is specified over a
power supply range of ±5 V to ±15 V.
The AD810 works well as an ADC or DAC buffer in video
systems due to its unity gain (G = +1) −3 dB bandwidth of
80 MHz. Because the AD810 is a transimpedance amplifier, this
bandwidth can be maintained over a wide range of gains while
featuring a low noise of 2.9 nV/√Hz for wide dynamic range
applications.
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2019 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
AD810
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Choice of Feedback Resistor ..................................................... 15
Applications ....................................................................................... 1
Printed Circuit Board Layout ................................................... 15
Connection Diagram ....................................................................... 1
Quality of Coaxial Cable ........................................................... 15
General Description ......................................................................... 1
Power Supply Bypassing ............................................................ 15
Revision History ............................................................................... 2
Power Supply Operating Range ................................................ 15
Specifications..................................................................................... 3
Offset Nulling ............................................................................. 16
Absolute Maximum Ratings............................................................ 5
Disable Mode .............................................................................. 16
Thermal Resistance ...................................................................... 5
Applications Information .............................................................. 17
Maximum Power Dissipation ..................................................... 5
Capacitive Loads......................................................................... 17
ESD Caution .................................................................................. 5
Operation As a Video Line Driver ........................................... 18
Pin Configurations and Function Descriptions ........................... 6
2:1 Video Multiplexer ................................................................ 19
Typical Performance Characteristics ............................................. 7
4:1 Multiplexer ............................................................................ 20
Test Circuits ..................................................................................... 14
Outline Dimensions ....................................................................... 21
Theory of Operation ...................................................................... 15
Ordering Guide .......................................................................... 22
General Design Considerations................................................ 15
Achieving Very Flat Gain Response at High Frequency ....... 15
REVISION HISTORY
5/2019—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changed VO to VOUT and
AD810S to 5962-9313201MPA ........................................... Throughout
Deleted Closed-Loop Gain and Phase vs. Frequency Plot and
Differential Gain and Phase vs. Supply Voltage Plot ................... 1
Changes to General Description Section ..................................... 1
Changes to Table 1 ............................................................................ 3
Deleted Figure 2; Renumbered Sequentially................................. 4
Changes to Table 2, Maximum Power Dissipation Section ........ 5
Added Thermal Resistance Section and Table 3; Renumbered
Sequentially ....................................................................................... 5
Added Pin Configurations and Function Descriptions Section,
Figure 3, Figure 4, Figure 5, and Table 4; Renumbered
Sequentially ....................................................................................... 6
Changes to Figure 6 Caption and Figure 7 Caption..................... 7
Changes to Figure 14 Caption and Figure 16 ............................... 8
Changes to Figure 19 ........................................................................ 9
Added Test Circuits Section .......................................................... 14
Moved Figure 45 and Figure 46 .................................................... 14
Changed Choice of Feedback and Gain Resistor Section to
Choice of Feedback Resistor Section ........................................... 15
Changes to Achieving Very Flat Gain Response at High
Frequency Section, Choice of Feedback Resistor Section, and
Power Supply Bypassing Section .................................................. 15
Moved Figure 45 ............................................................................. 16
Changes to Disable Mode Section................................................ 16
Added Applications Information Section ................................... 17
Moved Capacitive Loads Section and Figure 48 to Figure 51 .. 17
Changes to Figure 48 and Figure 50............................................. 17
Moved Operation As a Video Line Driver Section and Figure 52
to Figure 56 ...................................................................................... 18
Change to Figure 54 ....................................................................... 18
Moved 2:1 Video Multiplexer Section and Figure 57 to
Figure 60 .......................................................................................... 19
Changes to Figure 58...................................................................... 19
Moved 4:1 Multiplexer Section and Figure 61 to Figure 63 ..... 20
Changes to 4:1 Multiplexer Section ............................................. 20
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 22
10/1992—Rev. 0 to Rev. A
Rev. B | Page 2 of 22
Data Sheet
AD810
SPECIFICATIONS
TA = 25°C, supply voltage (VS) = ±15 V dc, load resistance (RL) = 150 Ω, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
0.1 dB Bandwidth
Full Power Bandwidth
Slew Rate2
Settling Time to 0.1%
Settling Time to 0.01%
Differential Gain
Differential Phase
Total Harmonic
Distortion
INPUT OFFSET VOLTAGE
Offset Voltage Drift
INPUT BIAS CURRENT
Negative Input
Positive Input
OPEN-LOOP
TRANSRESISTANCE
OPEN-LOOP DC VOLTAGE
GAIN
COMMON-MODE
REJECTION
Offset Voltage (VOS)
Input Bias Current
POWER SUPPLY REJECTION
VOS
Input Bias Current
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
INPUT COMMON-MODE
VOLTAGE RANGE
Test Conditions/Comments
Min
AD810A
Typ
Min
5962-9313201MPA1
Typ
G = +2, feedback resistor (RF) =
715 Ω, VS = ±5 V
G = +2, RF = 715 Ω, VS = ±15 V
G = +1, RF = 1000 Ω, VS = ±15 V
G = +10, RF = 270 Ω, VS = ±15 V
G = +2, RF = 715 Ω, VS = ±5 V
G = +2, RF = 715 Ω, VS = ±15 V
Output voltage (VOUT) = 20 V p-p
RL = 400 Ω
RL = 150 Ω, VS = ±5 V
RL = 400 Ω, VS = ±15 V
10 V step, G = −1
10 V step, G = −1
f = 3.58 MHz, VS = ±15 V
f = 3.58 MHz, VS = ±5 V
f = 3.58 MHz, VS = ±15 V
f = 3.58 MHz, VS = ±5 V
f = 10 MHz, VOUT = 2 V p-p
40
50
40
50
MHz
55
40
50
13
15
75
80
65
22
30
55
40
50
13
15
75
80
65
22
30
MHz
MHz
MHz
MHz
MHz
16
350
1000
50
125
0.02
0.04
0.04
0.045
8
175
500
16
350
1000
50
125
0.02
0.04
0.04
0.045
MHz
V/µs
V/µs
ns
ns
%
%
Degrees
Degrees
Max
0.05
0.07
0.07
0.08
Max
0.05
0.07
0.07
0.08
Unit
RL = 400 Ω, G = +2
VS = ±5 V and ±15 V
TMIN to TMAX, VS = ±5 V and ±15 V
−61
1.5
2
7
6
7.5
−61
1.5
4
15
6
15
dBc
mV
mV
µV/°C
TMIN to TMAX, VS = ±5 V and ±15 V
TMIN to TMAX, VS = ±5 V and ±15 V
TMIN to TMAX
0.7
2
5
7.5
0.8
2
5
10
µA
µA
VOUT = ±10 V, RL = 400 Ω, VS = ±15 V
VOUT = ±2.5 V, RL = 100 Ω, VS = ±5 V
TMIN to TMAX
1.0
0.3
3.5
1.2
1.0
0.2
3.5
1.0
MΩ
MΩ
VOUT = ±10 V, RL = 400 Ω, VS = ±15 V
VOUT = ±2.5 V, RL = 100 Ω, VS = ±5 V
TMIN to TMAX
86
76
100
88
80
72
100
88
dB
dB
Common-mode voltage (VCM) = ±12 V,
VS = ±15 V
VCM = ±2.5 V, VS = ±5 V
TMIN to TMAX, VS = ±5 V and ±15 V
56
64
56
64
dB
52
60
0.1
0.4
50
−0.4
60
0.1
TMIN to TMAX, VS = ±4.5 V to ±18 V
TMIN to TMAX
f = 1 kHz, VS = ±5 V and ±15 V
Negative input current (–IIN),
f = 1 kHz, VS = ±5 V and ±15 V
Positive input current (+IIN), f = 1 kHz,
VS = ±5 V and ±15 V
VS = ±5 V
65
0.3
60
−0.3
72
0.05
2.9
13
±2.5
±3.0
VS = ±15 V
±12
±13
72
0.05
2.9
13
1.5
Rev. B | Page 3 of 22
+0.4
+0.3
dB
µA/V
dB
µA/V
nV/√Hz
pA/√Hz
1.5
pA/√Hz
±2.5
±3
V
±12
±13
V
AD810
Parameter
OUTPUT CHARACTERISTICS
Output Voltage Swing3
Short-Circuit Current
Output Current
OUTPUT RESISTANCE
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
DISABLE CHARACTERISTICS4
Off Isolation
Off Output Resistance
Turn On Time5
Turn Off Time
DISABLE Pin Current
Minimum DISABLE Pin
Current to Disable
POWER SUPPLY
Operating Range
Quiescent Current
Power-Down Current
TEMPERATURE
Operating Range (TMIN to
TMAX)
Data Sheet
Test Conditions/Comments
Min
RL = 150 Ω, TMIN to TMAX, VS = ±5 V
RL = 400 Ω, VS = ±15 V
RL = 400 Ω, TMIN to TMAX, VS = ±15 V
±2.5
±12.5
±12
TMIN to TMAX, VS = ±5 V and ±15 V
Open loop (5 MHz)
40
Positive input
Negative input
Positive input
2.5
f = 5 MHz, see Figure 59
See Figure 15, RG is gain resistor
Output impedance (ZOUT) = low, see
Figure 59
ZOUT = high
DISABLE pin = 0 V, VS = ±5 V
DISABLE pin = 0 V, VS = ±15 V
Max
±2.9
±12.9
Min
±2.5
±12.5
±12
150
60
15
30
10
40
2
2.5
64
(RF + RG)||13 pF
170
TMIN to TMAX, VS = ±5 V and ±15 V
25°C to TMAX
TMIN
VS = ±5 V
VS = ±15 V
TMIN to TMAX, VS = ±5 V and ±15 V
VS = ±5 V
VS = ±15 V
AD810A
Typ
100
50
75
290
400
30
±2.5
±3.0
6.7
6.8
8.3
1.8
2.1
−40
See the Analog Devices military data sheet for 883B specifications.
Slew rate measurement is based on 10% to 90% rise time with the amplifier configured for a gain of −10.
3
Voltage swing is defined as useful operating range, not the saturation range.
4
Disable guaranteed break before make.
5
Turn on time is defined with ±5 V supplies using complementary output CMOS to drive the disable pin.
1
2
Rev. B | Page 4 of 22
10
±18
±18
7.5
8.0
10.0
2.3
2.8
±2.5
±3.5
+85
−55
5962-9313201MPA1
Typ
Max
±2.9
±12.9
Unit
150
60
15
V
V
V
mA
mA
Ω
10
40
2
MΩ
Ω
pF
64
(RF + RG)||13 pF
170
dB
Ω
ns
100
50
75
ns
µA
290
400
µA
30
40
µA
6.7
6.8
9
1.8
2.1
±18
±18
7.5
8.0
11.0
2.3
2.8
V
V
mA
mA
mA
mA
mA
+125
°C
Data Sheet
AD810
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Table 2.
1
The maximum power that can be safely dissipated by the AD810 is
limited by the associated rise in junction temperature. To ensure
proper operation, it is important to observe the derating curves
in Figure 2.
Rating
±18 V
See Figure 2
See Figure 2
±VS
±6 V
2.4
2.2
TOTAL POWER DISSIPATION (W)
−65°C to +125°C
−65°C to +150°C
−65°C to +125°C
−40°C to +85°C
−55°C to +125°C
145°C
175°C
300°C
1.8
1.6
1.4
1.2
1.0
0.8
8-LEAD
CERDIP
8-LEAD
SOIC
0.6
0.4
–60
–40
–20
0
20
40
60
80
100
120
140
AMBIENT TEMPERATURE (°C)
Internal short-circuit protection may not be sufficient to guarantee that the
maximum junction temperature is not exceeded under all conditions.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Figure 2. Total Power Dissipation vs. Ambient Temperature
ESD CAUTION
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θJA is the natural convection junction to ambient thermal
resistance measured in a one-cubic foot sealed enclosure.
Table 3. Thermal Resistance
Package Type
N-8
Q-8
R-8
8-LEAD
PDIP
2.0
θJA
90
110
150
Unit
°C/W
°C/W
°C/W
Rev. B | Page 5 of 22
1737-002
Parameter
Supply Voltage
Internal Power Dissipation
Output Short-Circuit Duration1
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
PDIP
CERDIP
SOIC_N
Operating Temperature Range
AD810A
5962-9313201MPA
Junction Temperature
AD810A
5962-9313201MPA
Lead Temperature Range (Soldering
60 sec)
AD810
Data Sheet
–IN 2
AD810
+IN 3
TOP VIEW
(Not to Scale)
–VS 4
8
DISABLE
7
+VS
–IN 2
6
OUTPUT
5
OFSET NULL
TOP VIEW
+IN 3 (Not to Scale)
–VS 4
OFFSET NULL 1
1737-003
OFFSET NULL 1
Figure 3. 8-Lead PDIP Pin Configuration
8
AD810
DISABLE
+VS
TOP VIEW
6 OUTPUT
(Not to Scale)
5 OFSET NULL
–VS 4
–IN 2
7
+IN 3
Figure 4. 8-Lead CERDIP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 5
2
3
4
6
7
8
Mnemonic
OFFSET NULL
−IN
+IN
−VS
OUTPUT
+VS
DISABLE
8
DISABLE
7
+VS
6
OUTPUT
5
OFSET NULL
Figure 5. 8-Lead SOIC Pin Configuration
1737-100
OFFSET NULL 1
AD810
Description
Inverting Input Offset Null Connection. See Figure 47.
Inverting Input.
Noninverting Input.
Negative Supply Voltage.
Output.
Positive Supply Voltage.
Disable (Active Low).
Rev. B | Page 6 of 22
1737-101
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Data Sheet
AD810
TYPICAL PERFORMANCE CHARACTERISTICS
10
9
SUPPLY CURRENT (mA)
15
NO LOAD
10
RL = 150Ω
5
VS = ±15V
8
VS = ±5V
7
6
0
0
5
10
15
20
SUPPLY VOLTAGE (±V)
4
–60
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
Figure 6. Magnitude of the Output Voltage vs. Supply Voltage
1737-007
5
1737-004
MAGNITUDE OF THE OUTPUT VOLTAGE (±V)
20
Figure 9. Supply Current vs. Junction Temperature
35
10
8
INPUT OFFSET VOLTAGE (mV)
OUTPUT VOLTAGE (V p-p)
30
±15V SUPPLY
25
20
15
10
±5V SUPPLY
6
4
VS = ±5V
2
0
VS = ±15V
–2
–4
–6
5
100
1k
10k
LOAD RESISTANCE (Ω)
–10
–60
1737-005
0
10
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage vs. Load Resistance
1737-008
–8
Figure 10. Input Offset Voltage vs. Junction Temperature
10
250
SHORT-CIRCUIT CURRENT (mA)
8
4
NONINVERTING INPUT
VS = ±5V, ±15V
2
0
–2
INVERTING INPUT
VS = ±5V, ±15V
–4
–6
200
VS = ±15V
150
100
VS = ±5V
–10
–60
–40
–20
0
20
40
60
80
100
120
JUNCTION TEMPERATURE (°C)
140
Figure 8. Input Bias Current vs. Junction Temperature
50
–60
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE (°C)
Figure 11. Short-Circuit Current vs. Junction Temperature
Rev. B | Page 7 of 22
1737-009
–8
1737-006
INPUT BIAS CURRENT (µA)
6
AD810
1M
VS = ±5V
1
VS = ±15V
0.1
0.01
10k
100k
1M
10M
100M
FREQUENCY (Hz)
100k
10k
1k
100
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 12. Closed-Loop Output Resistance vs. Frequency
1737-013
OUTPUT RESISTANCE (Ω)
GAIN = +2
RF = 715Ω
1737-010
CLOSED-LOOP OUTPUT RESISTANCE (Ω)
10
Data Sheet
Figure 15. Output Resistance vs. Frequency, Disabled State
30
100
100
VS = ±5V TO ±15V
INPUT VOLTAGE NOISE (nV/√Hz)
20
OUTPUT LEVEL FOR 3% THD
RL = 400Ω
15
10
VS = ±5V
5
INVERTING INPUT
CURRENT NOISE
10
10
VOLTAGE NOISE
NONINVERTING INPUT
CURRENT NOISE
10M
1M
100M
FREQUENCY (Hz)
1
10
1737-011
0
100k
100
1k
10k
1
100k
1737-014
OUTPUT VOLTAGE (V p-p)
25
INPUT CURRENT NOISE (pA/√Hz)
VS = ±15V
FREQUENCY (Hz)
Figure 13. Large Signal Frequency Response
Figure 16. Input Voltage Noise and Input Current Noise vs. Frequency
120
100
COMMON-MODE REJECTION (dB)
90
VS = ±15V
80
VS = ±5V
60
40
80
70
60
50
40
20
–60
–40
–20
0
20
40
60
80
100
120
JUNCTION TEMPERATURE (°C)
140
Figure 14. Output Current vs. Junction Temperature
20
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 17. Common-Mode Rejection vs. Frequency
Rev. B | Page 8 of 22
100M
1737-015
30
1737-012
OUTPUT CURRENT (mA)
100
Data Sheet
–40
–50
VS = ±5V
–60
–60
–70
–80
–90
–100
VS = ±15V
–110
–70
–80
–90
VOUT = 20V p-p
–100
–110
VOUT = 2V p-p
–120
10k
100k
1M
10M
FREQUENCY (Hz)
–140
100
1200
8
1100
0.01%
RF = RG = 1kΩ
RL = 400Ω
–2
–4
0.1%
GAIN = +10
700
600
GAIN = –10
0.01%
400
60
80
100
120
140
160
180
200
SETTLING TIME (ns)
1737-017
300
200
40
0
4
8
6
12
10
14
16
20
18
Figure 22. Slew Rate vs. Supply Voltage
PHASE
–45
60
–90
VS = ±15V
1
CLOSED-LOOP GAIN (dB)
50
40
VS = ±5V
30
20
10
CURVES ARE FOR WORST CASE
CONDITION WHERE ONE SUPPLY
IS VARIED WHILE THE OTHER IS
HELD CONSTANT
0
10k
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 20. Power Supply Rejection vs. Frequency
–135
0
GAIN
–1
–4
–180
VS = ±5V
–225
VS = ±2.5V
–2
–3
VS = ±15V
PHASE SHIFT (Degrees)
GAIN = +1
RL = 150Ω 0
RF = 715Ω
GAIN = +2
1737-018
POWER SUPPLY REJECTION (dB)
70
2
SUPPLY VOLTAGE (±V)
Figure 19. Output Swing (to 0 V) vs. Settling Time at Various Error Levels
80
GAIN = +2
500
–8
20
RL = 400Ω
800
–10
0
10M
900
SLEW RATE (V/µs)
2
–6
1M
1000
4
0
100k
Figure 21. Harmonic Distortion vs. Frequency (RL = 400 Ω)
10
0.1%
10k
FREQUENCY (Hz)
Figure 18. Harmonic Distortion vs. Frequency (RL = 100 Ω)
6
1k
1737-020
1k
1737-016
–130
100
1737-019
–130
–120
OUTPUT SWING (TO 0V)
SECOND HARMONIC
THIRD HARMONIC
VS = ±15V
RL = 400Ω
GAIN = +2
–50
–270
VS = ±15V
VS = ±5V
VS = ±2.5V
–5
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 23. Closed-Loop Gain and Phase Shift vs. Frequency, G= +1,
RF = 1 kΩ for ±15 V, 910 Ω for ±5 V and ±2.5 V
Rev. B | Page 9 of 22
1737-021
HARMONIC DISTORTION (dBc)
–40
SECOND HARMONIC
THIRD HARMONIC
VOUT = 2V p-p
RL = 100Ω
GAIN = +2
HARMONIC DISTORTION (dBc)
–30
AD810
AD810
110
Data Sheet
200
GAIN = +1
RL = 150Ω
VOUT = 250mV p-p
100
90
160
–3dB BANDWIDTH (MHz)
80
RF = 750Ω
70
60
PEAKING ≤ 0.1dB
50
RF = 1kΩ
40
100
PEAKING ≤ 0.1dB
80
RF = 1kΩ
60
40
2
4
6
8
10
12
14
16
18
0
1737-022
0
RF = 1.5kΩ
20
20
SUPPLY VOLTAGE (±V)
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Figure 24. −3 dB Bandwidth vs. Supply Voltage, Gain = +1, RL = 150 Ω
1V
0
1737-025
RF = 1.5kΩ
20
Figure 27. −3 dB Bandwidth vs. Supply Voltage, G = +1, RL = 1 kΩ
20ns
100mV
100
20ns
100
90
90
VIN
VIN
VOUT
10
0%
0%
1737-023
10
1V
Figure 25. Small Signal Pulse Response, Gain = +1, RF = 1 kΩ, RL = 150 Ω,
VS = ±15 V
Figure 28. Small Signal Pulse Response, Gain = +10, RF = 442 Ω, RL = 150 Ω,
VS = ±15 V
GAIN = +1
RL = 1kΩ 0
–90
1
–135
0
GAIN
–1
VS = ±15V
–180
VS = ±5V
–225
VS = ±2.5V
–2
–3
VS = ±15V
–4
VS = ±5V
PHASE
–45
–90
21
CLOSED-LOOP GAIN (dB)
–45
PHASE SHIFT (Degrees)
PHASE
–270
100M
1G
FREQUENCY (Hz)
1737-024
VS = ±2.5V
10M
GAIN = +10
RF = 270Ω 0
RL = 150Ω
Figure 26. Closed-Loop Gain and Phase Shift vs. Frequency, G= +1,
RF = 1 kΩ for ±15 V, 910 Ω for ±5 V and ±2.5 V
–135
20
–180
GAIN
19
VS = ±15V
18
VS = ±5V
17
VS = ±15V
16
VS = ±5V
15
1M
–225
–270
VS = ±2.5V
VS = ±2.5V
10M
100M
1G
FREQUENCY (Hz)
Figure 29. Closed-Loop Gain and Phase Shift vs. Frequency,
G = +10, RL = 150 Ω
Rev. B | Page 10 of 22
1737-027
1V
1737-026
VOUT
CLOSED-LOOP GAIN (dB)
RF = 750Ω
120
30
–5
1M
PEAKING ≤ 1dB
140
PHASE SHIFT (Degrees)
–3dB BANDWIDTH (MHz)
PEAKING ≤ 1dB
10
GAIN = +1
RL = 1kΩ
VOUT = 250mV p-p
180
Data Sheet
110
AD810
110
GAIN = +10
RL = 150Ω
VOUT = 250mV p-p
100
90
–3dB BANDWIDTH (MHz)
80
RF = 232Ω
60
PEAKING ≤ 0.5dB
RF = 442Ω
40
PEAKING ≤ 0.1dB
PEAKING ≤ 0.5dB
60
RF = 442Ω
50
40
30
PEAKING ≤ 0.1dB
30
RF = 1kΩ
0
2
4
6
8
RF = 1kΩ
20
10
12
14
16
18
10
1737-028
20
20
SUPPLY VOLTAGE (±V)
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Figure 30. −3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 150 Ω
1V
0
Figure 33. −3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 1 kΩ
GAIN = –1
RF = 681Ω
RL = 150Ω
50ns
PHASE
180
135
100
90
90
VIN
CLOSED-LOOP GAIN (dB)
1
VOUT
10
45
0
0
GAIN
VS = ±15V
–1
–3
VS = ±15V
–4
VS = ±5V
–45
VS = ±5V
VS = ±2.5V
–2
1737-029
0%
10V
1737-031
50
RF = 232Ω
70
PHASE SHIFT (Degrees)
70
80
–90
VS = ±2.5V
–5
1M
10M
100M
1737-032
–3dB BANDWIDTH (MHz)
90
10
GAIN = +10
RL = 1kΩ
VOUT = 250mV p-p
100
1G
FREQUENCY (Hz)
Figure 31. Large Signal Pulse Response, Gain = +10, RF = 442 Ω, RL = 400 Ω,
VS = ±15 V
21
–135
20
–180
GAIN
19
VS = ±15V
18
VS = ±5V
VS = ±15V
–225
90
–3dB BANDWIDTH (MHz)
–90
–270
VS = ±2.5V
70
RF = 681Ω
60
PEAKING ≤ 0.1dB
50
40
RF = 1kΩ
100M
1G
FREQUENCY (Hz)
Figure 32. Closed-Loop Gain and Phase Shift vs. Frequency,
G = +10, RL = 1 kΩ
10
0
2
4
6
8
10
12
14
SUPPLY VOLTAGE (±V)
16
18
20
1737-033
10M
RF = 500Ω
20
VS = ±2.5V
1737-030
15
1M
PEAKING ≤ 1.0dB
80
30
VS = ±5V
16
GAIN = –1
RL = 150Ω
VOUT = 250mV p-p
100
PHASE SHIFT (Degrees)
–45
CLOSED-LOOP GAIN (dB)
110
GAIN = +10
RF = 270Ω 0
RL = 1kΩ
PHASE
17
Figure 34. Closed-Loop Gain and Phase Shift vs. Frequency G = −1,
RL = 150 Ω, RF = 681 Ω for ±15 V, 620 Ω for ±5 V and ±2.5 V
Figure 35. −3 dB Bandwidth vs. Supply Voltage, Gain = –1, RL = 150 Ω
Rev. B | Page 11 of 22
AD810
Data Sheet
1V
20ns
100mV
100
100
90
90
VIN
VIN
VOUT
0%
0%
1737-034
10
1V
180
0
0
GAIN
VS = ±15V
–1
VS = ±15V
–3
–45
VS = ±5V
VS = ±2.5V
–2
90
21
–90
VS = ±5V
–4
VS = ±2.5V
–5
1M
10M
100M
1G
FREQUENCY (Hz)
19
–90
VS = ±5V
VS = ±2.5V
VS = ±15V
17
VS = ±5V
16
VS = ±2.5V
15
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 40. Closed-Loop Gain and Phase Shift vs. Frequency,
G = −10, RL = 150 Ω
110
GAIN = –10
RL = 150Ω
VOUT = 250mV p-p
100
NO PEAKING
90
–3dB BANDWIDTH (MHz)
160
PEAKING ≤ 1dB
140
120
RF = 500Ω
100
80
RF = 649Ω
60
PEAKING ≤ 0.1dB
80
70
RF = 249Ω
60
50
40
RF = 442Ω
30
RF = 1kΩ
0
2
4
6
8
RF = 750Ω
20
10
12
14
SUPPLY VOLTAGE (±V)
16
18
20
1737-036
20
Figure 38. −3 dB Bandwidth vs. Supply Voltage, Gain = –1, RL = 1 kΩ
10
0
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Figure 41. −3 dB Bandwidth vs. Supply Voltage, G = −10, RL = 150 Ω
Rev. B | Page 12 of 22
1737-039
40
0
–45
VS = ±15V
18
GAIN = –1
RL = 1kΩ
VOUT = 250mV p-p
180
0
GAIN
Figure 37. Closed-Loop Gain and Phase Shift vs. Frequency, G = −1, RL = 1 kΩ,
RF = 681 Ω for VS = ±15 V, 620 Ω for ±5 V and ±2.5 V
200
45
20
1737-035
CLOSED-LOOP GAIN (dB)
45
135
1737-038
90
1
GAIN = –10
RF = 249Ω 180
RL = 150Ω
PHASE
CLOSED-LOOP GAIN (dB)
135
PHASE SHIFT (Degrees)
PHASE
Figure 39. Small Signal Pulse Response, Gain = −10, RF = 442 Ω, RL = 150 Ω,
VS = ±15 V
PHASE SHIFT (Degrees)
Figure 36. Small Signal Pulse Response, Gain = −1, RF = 681 Ω, RL = 150 Ω,
VS = ±5 V
GAIN = –1
RF = 681Ω
RL = 150Ω
1737-037
VOUT
10
1V
–3dB BANDWIDTH (MHz)
20ns
Data Sheet
AD810
110
1V
50ns
GAIN = –10
RL = 1kΩ
VOUT = 250mV p-p
100
NO PEAKING
90
100
–3dB BANDWIDTH (MHz)
90
VIN
VOUT
10
80
70
RF = 249Ω
60
50
RF = 442Ω
40
30
RF = 750Ω
1737-040
20
10V
10
0
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Figure 42. Large Signal Pulse Response, Gain = −10, RF = 442 Ω, RL = 400 Ω,
VS = ±15 V
PHASE
135
90
45
20
0
GAIN
19
VS = ±15V
18
VS = ±5V
VS = ±2.5V
VS = ±15V
17
VS = ±5V
16
15
1M
–45
–90
VS = ±2.5V
10M
100M
1G
FREQUENCY (Hz)
1737-041
CLOSED-LOOP GAIN (dB)
21
PHASE SHIFT (Degrees)
GAIN = –10
RF = 249Ω 180
RL = 1kΩ
Figure 43. Closed-Loop Gain and Phase Shift vs. Frequency,
G = −10, RL = 1 kΩ
Rev. B | Page 13 of 22
Figure 44. −3 dB Bandwidth vs. Supply Voltage, G = −10, RL = 1 kΩ
1737-042
0%
AD810
Data Sheet
TEST CIRCUITS
RF
RF
2
7
AD810
VIN
HP8130
50Ω
PULSE
GENERATOR
3
+VS
VOUT TO
TEKTRONIX
P6201 FET
PROBE
VIN
VOUT
6
HP8130
PULSE
GENERATOR
RL
4
0.1µF
–VS
RG
2
7
AD810
3
0.1µF
VOUT TO
TEKTRONIX
P6201 FET
PROBE
VOUT
6
RL
4
0.1µF
–VS
Figure 45. Noninverting Amplifier Connection
Figure 46. Inverting Amplifier Connection
Rev. B | Page 14 of 22
1737-044
RG
0.1µF
1737-043
+VS
Data Sheet
AD810
THEORY OF OPERATION
GENERAL DESIGN CONSIDERATIONS
CHOICE OF FEEDBACK RESISTOR
The AD810 is a current feedback amplifier optimized for use in
high performance video and data acquisition systems. Because
the AD810 uses a current feedback architecture, its closed-loop
bandwidth depends on the value of the feedback resistor. Table 5
and Table 6 list recommended resistor values for some useful
closed-loop gains and supply voltages. As shown in Table 5 and
Table 6, the closed-loop bandwidth is not a strong function of
gain, as it is for a voltage feedback amplifier. The recommended
resistor values results in maximum bandwidths with less than
0.1 dB of peaking in the gain vs. frequency response.
Because the 3 dB bandwidth depends on the feedback resistor,
the fine scale flatness varies to some extent with feedback
resistor tolerance. It is recommended that resistors with a 1%
tolerance be used to maintain exceptional flatness through high
volume production.
The −3 dB bandwidth is also somewhat dependent on the
power supply voltage. Lowering the supplies increases the
values of internal capacitances, reducing the bandwidth. To
compensate for this reduction, smaller values of feedback
resistor are sometimes used at lower supply voltages. The
characteristic curves in Figure 23 and Figure 24 illustrate that
bandwidths of over 100 MHz on 30 V total supplies and over
50 MHz on 5 V total supplies can be achieved.
Table 5. −3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values (RL = 150 Ω), VS = ±15 V
Closed-Loop Gain
+1
+2
+10
–1
–10
RF
1 kΩ
715 Ω
270 Ω
681 Ω
249 Ω
RG
Open
715 Ω
30 Ω
681 Ω
24.9 Ω
−3 dB Bandwidth (MHz)
80
75
65
70
65
Table 6. −3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values (RL = 150 Ω), VS = ±5 V
Closed-Loop Gain
+1
+2
+10
–1
–10
RF
910 Ω
715 Ω
270 Ω
620 Ω
249 Ω
RG
Open
715 Ω
30 Ω
620 Ω
24.9 Ω
−3 dB Bandwidth (MHz)
50
50
50
55
50
ACHIEVING VERY FLAT GAIN RESPONSE AT HIGH
FREQUENCY
Achieving and maintaining gain flatness of less than 0.1 dB
above 10 MHz is not difficult if the recommended resistor
values are used. Additionally, consider feedback resistor
selection, PCB layout, coaxial cable quality, power supply
bypassing and operating range, and offset nulling to ensure
consistently optimal results.
PRINTED CIRCUIT BOARD LAYOUT
As with all wideband amplifiers, PCB parasitics can affect the
overall closed-loop performance. Most important are stray
capacitances at the output and inverting input nodes. (An
added capacitance of 2 pF between the inverting input and
ground adds about 0.2 dB of peaking in the gain of 2 response,
and increase the bandwidth to 105 MHz). Leave space (3/16 inches
is sufficient) around the signal lines to minimize coupling. Also,
keep signal lines connecting the feedback and gain resistors
short enough so that their associated inductance does not cause
high frequency gain errors. Line lengths less than ¼ inches are
recommended.
QUALITY OF COAXIAL CABLE
Optimum flatness when driving a coaxial cable is possible only
when the driven cable is terminated at each end with a resistor
matching its characteristic impedance. With an ideal coaxial
cable, the resulting flatness is not affected by the length of the
cable. Although outstanding results can be achieved using
inexpensive cables, some variation in flatness due to varying
cable lengths is to be expected.
POWER SUPPLY BYPASSING
Adequate power supply bypassing can be critical when
optimizing the performance of a high frequency circuit.
Inductance in the power supply leads can contribute to resonant
circuits that produce peaking in the amplifier response.
Although the recommended 0.1 µF power supply bypass
capacitors are sufficient in most applications, more elaborate
bypassing (such as using two paralleled capacitors) may be
required in some cases. In addition, if large current transients
must be delivered to the load, bypass capacitors (typically
greater than 1 µF) are required to optimize settling time and
lowest distortion.
POWER SUPPLY OPERATING RANGE
The AD810 operates with supplies from ±18 V down to about
±2.5 V. On ±2.5 V supplies, the low distortion output voltage
swing is greater than 1 V p-p. Single-supply operation can be
achieved by biasing the input common-mode voltage at the
supply midpoint.
Rev. B | Page 15 of 22
AD810
Data Sheet
OFFSET NULLING
A 10 kΩ potentiometer connected between Pin 1 and Pin 5,
with its wiper connected to +VS can be used to trim out the
inverting input current (with about ±20 µA of range). For
closed-loop gains above about 5, this configuration may not be
sufficient to trim the output offset voltage to zero. Tie the
potentiometer wiper to ground through a large value resistor
(50 kΩ for ±5 V supplies, 150 kΩ for ±15 V supplies) to trim
the output to zero at high closed-loop gains.
SEE TEXT
0.1µF +VS
1
5
3
4
–VS
6
0.1µF
1737-045
AD810
The input impedance of the disable pin is about 35 kΩ in
parallel with a few pF. When grounded, about 50 µA flows out
of the DISABLE pin for ±5 V supplies. If driven by complementary
output CMOS logic, the disable time (until the output goes high
impedance) is about 100 ns and the enable time (to low impedance
output) is about 170 ns on ±5 V supplies. The enable time can
be extended to about 750 ns by using open-drain logic.
When operated on ±15 V supplies, the AD810 disable pin can
be driven by open-drain logic. In this case, adding a 10 kΩ
pull-up resistor from the DISABLE pin to the positive supply
decreases the enable time to about 150 ns. If there is a nonzero
voltage present on the amplifier output at the time the device is
switched to the disabled state, some additional decay time is
required for the output voltage to decrease to zero. The total
time for the output to go to zero is generally about 250 ns and is
somewhat dependent on the load impedance.
10kΩ
7
2
Leaving the disable pin disconnected (floating) keeps the
AD810 operational in the enabled state.
Figure 47. Offset Null Configuration
DISABLE MODE
By pulling the voltage on Pin 8 to ground (0 V), the AD810 can
be put into a disabled state. In this condition, the supply current
drops to less than 2.8 mA, the output becomes high impedance,
and there is a high level of isolation from input to output. In the
case of a line driver, for example, the output impedance is about
the same as for a 1.5 kΩ resistor (the feedback plus gain resistors)
in parallel with a 13 pF capacitor (due to the output) and the
input to output isolation is greater than 65 dB at 1 MHz.
In cases where the amplifier is driving a high impedance load,
the input to output isolation decreases significantly if the input
signal is greater than about 1.2 V p-p. The isolation can be
restored back to the 65 dB level by adding an extra load (for
example, 150 Ω) at the amplifier output. This additional load
attenuates the feedthrough signal. (This decreased isolation is
not an issue for multiplexer applications where the outputs of
multiple AD810 devices are tied together as long as at least one
channel is in the on state.)
Rev. B | Page 16 of 22
Data Sheet
AD810
APPLICATIONS INFORMATION
10k
CAPACITIVE LOADS
1k
VS = ±5V
100
VS = ±15V
10
1
0
1k
2k
3k
4k
5k
FEEDBACK RESISTOR (Ω)
Figure 49 to Figure 51 illustrate the outstanding performance
that can be achieved when driving a 1000 pF capacitor.
1737-048
Another method of compensating for large load capacitances is
to insert a resistor in series (RS) with the loop output, as shown
in Figure 48. In most cases, less than 50 Ω is all that is needed to
achieve an extremely flat gain response.
MAXIMUM LOAD CAPACITANCE (pF)
When used with the appropriate feedback resistor, the AD810
can drive capacitive loads exceeding 1000 pF directly without
oscillation. By using the curves in Figure 50 to choose the
resistor value, less than 1 dB of peaking can easily be achieved
without sacrificing much bandwidth. Note that the curves in
Figure 50 were generated for the case of a 10 kΩ load resistor.
For smaller load resistances, the peaking is less than indicated
by Figure 50.
GAIN = +2
RL = 10kΩ
Figure 50. Maximum Load Capacitance vs. Feedback Resistor,
Peaking < 1 dB
RF
+VS
5V
100ns
0.1µF
100
1µF
RG
2
VIN
AD810
VIN
3
90
7
RS (OPTIONAL)
VOUT
6
CL
1µF
4
RL
VOUT
1737-046
0.1µF
–VS
10
0%
5V
15
GAIN = +2
VS = ±15V
RL = 10kΩ
CL = 1000pF
12
CLOSED-LOOP GAIN (dB)
9
Figure 51. AD810 Driving a 1000 pF Load, Gain = +2, RF = 750 Ω, RS = 11 Ω,
RL = 10 kΩ
6
3
RF = 750Ω
RS = 11Ω
0
–3
RF = 4.5kΩ
RS = 0Ω
–6
–9
–15
10
FREQUENCY (MHz)
100
1737-047
–12
1
1737-049
Figure 48. Circuit Options for Driving a Large Capacitive Load
Figure 49. Performance Comparison of Two Methods for Driving a Large
Capacitive Load
Rev. B | Page 17 of 22
AD810
Data Sheet
0.1
OPERATION AS A VIDEO LINE DRIVER
715Ω
715Ω
+VS
0.1µF
±15V
RL = 150Ω
0
–0.1
NORMALIZED GAIN (dB)
The AD810 is designed to offer outstanding performance at
closed-loop gains of 1 or greater. At a gain of 2, the low
differential gain and phase errors and wide −0.1 dB bandwidth
are nearly independent of supply voltage and load (as shown in
Figure 53 through Figure 55) making the AD810 an excellent
video line driver.
±5V
±2.5V
0.1
RL = 1kΩ
0
±15V
–0.1
±5V
3
±2.5V
VOUT
6
100k
75Ω
4
–VS
–45
–90
–135
0
VS = ±15V
–180
–1
VS = ±5V
–225
–2
VS = ±2.5V
–270
GAIN
–4
VS = ±5V
90
100M
1G
FREQUENCY (Hz)
0.16
0.14
0.12
0.06
0.05
0.10
GAIN
PHASE
0.04
0.08
0.03
0.06
0.02
0.04
0.01
0.02
0
5
6
7
8
9
10
11
12
13
14
0
15
1737-052
0.07
0.18
DIFFERENTIAL PHASE (Degrees)
0.08
DIFFERENTIAL GAIN (%)
0.20
GAIN = +2
RF = 715Ω
RL = 150Ω
f = 3.58MHz
100 IRE
MODULATED RAMP
0.09
RF = 750Ω
60
PEAKING ≤ 0.1dB
50
RF = 1kΩ
45
10
10M
Figure 53. Closed-Loop Gain and Phase Shift vs. Frequency,
G = +2, RL = 150 Ω, RF = 715 Ω
0.10
70
PEAKING ≤ 1dB
20
VS = ±2.5V
–5
1M
RF = 500Ω
80
30
1737-051
CLOSED-LOOP GAIN (dB)
1
GAIN = +2
RL = 150Ω
VOUT = 250mV p-p
100
0
–3dB BANDWIDTH (MHz)
PHASE
110
PHASE SHIFT (Degrees)
GAIN = +2
RF = 715Ω
RL = 150Ω
VS = ±15V
100M
Figure 55. Normalized Gain vs. Frequency for Various Supply Voltages,
Gain = +2, RF = 715 Ω
Figure 52. Video Line Driver Operating at Gain = +2
–3
10M
FREQUENCY (Hz)
0.1µF
75Ω
1M
1737-053
AD810
SUPPLY VOLTAGE (±V)
Figure 54. Differential Gain and Differential Phase vs. Supply Voltage
Rev. B | Page 18 of 22
0
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Figure 56. −3 dB Bandwidth vs. Supply Voltage, G = +2, RL = 150 Ω
1737-054
75Ω
CABLE
1737-050
VIN
75Ω
75Ω CABLE
7
2
Data Sheet
AD810
750Ω
2:1 VIDEO MULTIPLEXER
750Ω
+5V 0.1µF
The outputs of two AD810 devices can be wired together to
form a 2:1 mux without degrading the flatness of the gain response.
Figure 59 shows a recommended configuration that results in
−0.1 dB bandwidth of 20 MHz and off channel isolation of
77 dB at 10 MHz on ±5 V supplies. The time to switch between
channels is about 0.75 μs when the DISABLE pins are driven by
open-drain output logic. Adding pull-up resistors to the logic
outputs or using complementary output logic (such as the
74HC04) reduces the switching time to about 180 ns. The
switching time is only slightly affected by the signal level.
75Ω
75Ω CABLE
7
2
AD810
VINA
8
75Ω
750Ω
0.1µF
75Ω
–5V
750Ω
+5V 0.1µF
2
7
AD810
500mV
VOUT
6
4
3
VINB
500ns
3
6
4
8
75Ω
0.1µF
–5V
100
90
1737-057
VSW
74HC04
Figure 59. A Fast Switching 2:1 Video Mux
PHASE
0%
–45
–40
–45
–50
–55
–60
–135
–0.5
–180
–1.0
–225
–1.5
–270
–2.0
–2.5
–3.0
1M
–65
GAIN
VS = ±5V
10M
100M
FREQUENCY (Hz)
–70
Figure 60. Closed-Loop Gain and Phase Shift vs. Frequency for 2:1 Mux,
On Channel
–75
–80
–90
1
10
100
FREQUENCY (MHz)
1737-056
–85
Figure 58. Isolation vs. Frequency for 2:1 Mux, Off Channel
Rev. B | Page 19 of 22
1737-058
CLOSED-LOOP GAIN (dB)
0
Figure 57. Channel Switching Time for the 2:1 Mux
ISOLATION (dB)
–90
0.5
1737-055
5V
PHASE SHIFT (Degrees)
0
10
AD810
Data Sheet
4:1 MULTIPLEXER
1kΩ +VS
0.1µF
A multiplexer of arbitrary size can be formed by combining the
desired number of AD810 devices together with the appropriate
selection logic. The schematic in Figure 63 shows a recommendation for a 4:1 mux, which can be useful for driving a high
impedance such as the input to a video ADC. The output series
resistors effectively compensate for the combined output
capacitance of the off channels plus the input capacitance of the
ADC while maintaining wide bandwidth. In the case illustrated
in Figure 63, the −0.1 dB bandwidth is about 20 MHz with no
peaking. Switching time and off channel isolation (for the 4:1
mux) are about 250 ns and 60 dB at 10 MHz, respectively.
–90
0.5
–135
–0.5
–180
–1.0
–225
–1.5
–VS
1kΩ +VS
0.1µF
7
2
6
8
3
4
SELECT B
VOUT
–VS
RL
1kΩ +VS
0.1µF
33Ω
AD810
VINC
6
8
3
4
75Ω
VS = ±15V
RL = 10kΩ
CL = 10pF
CL
7
2
–270
SELECT C
0.1µF
10M
100M
–VS
FREQUENCY (Hz)
1kΩ +VS
0.1µF
Figure 61. Closed-Loop Gain and Phase Shift vs. Frequency for 4:1 Mux,
On Channel
7
2
–25
33Ω
AD810
VIND
–30
3
75Ω
–35
6
8
4
SELECT D
0.1µF
–40
–VS
–45
Figure 63. 4:1 Multiplexer Driving a High Impedance
–50
–55
–60
–65
10M
100M
FREQUENCY (Hz)
1737-060
–70
–75
1M
33Ω
AD810
Figure 62. Isolation vs. Frequency for 4:1 Mux, Off Channel
Rev. B | Page 20 of 22
1737-061
–3.0
1M
SELECT A
0.1µF
1737-059
–2.5
4
0.1µF
–2.0
ISOLATION (dB)
CLOSED-LOOP GAIN (dB)
GAIN
6
8
3
75Ω
PHASE SHIFT (Degrees)
–45
0
VINA
75Ω
0
33Ω
AD810
VINB
PHASE
7
2
Data Sheet
AD810
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
4
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 64. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 65. 8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Rev. B | Page 21 of 22
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
AD810
Data Sheet
5.00 (0.1968)
4.80 (0.1890)
1
5
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 66. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
AD810ANZ
AD810ARZ
AD810ARZ-REEL
AD810ARZ-REEL7
5962-9313201MPA
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
Package Description
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Plastic Standard Small Outline Package [SOIC_N]
8-Lead Plastic Standard Small Outline Package [SOIC_N]
8-Lead Plastic Standard Small Outline Package [SOIC_N]
8-Lead Ceramic Dual In-Line Package [CERDIP]
Z = RoHS Compliant Part.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D1737-0-5/19(B)
Rev. B | Page 22 of 22
Package Option
N-8
R-8
R-8
R-8
Q-8
工商网监
湘ICP备2023018690号
