AD812

a FEATURES Two Video Amplifiers in One 8-Lead SOIC Package Optimized for Driving Cables in Video Systems Excellent Video Specifications (RL = 150 ): Gain Flatness 0.1 dB to 40 MHz 0.02% Differential Gain Error 0.02 Differential Phase Error Low Power Operates on Single +3 V Supply 5.5 mA/Amplifier Max Power Supply Current High Speed 145 MHz Unity Gain Bandwidth (3 dB) 1600 V/ s Slew Rate Easy to Use 50 mA Output Current Output Swing to 1 V of Rails (150 Load) APPLICATIONS Video Line Driver Professional Cameras Video Switchers Special Effects PRODUCT DESCRIPTION Dual, Current Feedback Low Power Op Amp AD812 PIN CONFIGURATION 8-Lead Plastic Mini-DIP and SOIC OUT1 1 –IN1 2 +IN1 3 + + 8 V+ 7 OUT2 6 –IN2 V– 4 AD812 5 +IN2 The AD812 is a low power, single supply, dual video amplifier. Each of the amplifiers have 50 mA of output current and are optimized for driving one back-terminated video load (150 Ω) each. Each amplifier is a current feedback amplifier and features gain flatness of 0.1 dB to 40 MHz while offering differential gain and phase error of 0.02% and 0.02°. This makes the AD812 ideal for professional video electronics such as cameras and video switchers. 0.4 0.3 0.2 G = +2 RL = 150 The AD812 offers low power of 4.0 mA per amplifier max (VS = +5 V) and can run on a single +3 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals of 1 V p-p. Also, at gains of +2 the AD812 can swing 3 V p-p on a single +5 V power supply. All this is offered in a small 8-lead plastic DIP or 8-lead SOIC package. These features make this dual amplifier ideal for portable and battery powered applications where size and power is critical. The outstanding bandwidth of 145 MHz along with 1600 V/µs of slew rate make the AD812 useful in many general purpose high speed applications where a single +5 V or dual power supplies up to ± 15 V are available. The AD812 is available in the industrial temperature range of –40°C to +85°C. 0.06 DIFFERENTIAL GAIN – % 0.04 DIFFERENTIAL GAIN NORMALIZED GAIN – dB 0.1 0 –0.1 –0.2 VS = –0.3 5V –0.4 5V –0.5 3V –0.6 100k 1M 10M FREQUENCY – Hz 100M 15V DIFFERENTIAL PHASE – Degrees 0.08 0.02 0.06 DIFFERENTIAL PHASE 0.04 0.02 0 5 6 7 8 9 10 11 12 SUPPLY VOLTAGE – Volts 13 14 15 Figure 1. Fine-Scale Gain Flatness vs. Frequency, Gain = +2, RL = 150 Ω Figure 2. Differential Gain and Phase vs. Supply Voltage, Gain = +2, RL = 150 Ω REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 AD812–SPECIFICATIONS Dual Supply (@ T = +25 C, R = 150 A L , unless otherwise noted) Conditions VS ±5 V ± 15 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ±5 V ± 15 V ±5 V ± 15 V ± 5 V, ± 15 V TMIN –TMAX ± 5 V, ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ±5 V ± 15 V ±5 V ± 15 V 68 69 76 75 350 270 450 370 Min 50 75 100 20 25 275 1400 AD812A Typ 65 100 145 30 40 425 1600 250 600 50 40 –90 3.5 1.5 18 0.05 0.02 0.07 0.02 2 15 7 0.3 76 82 550 800 Max Units MHz MHz MHz MHz MHz V/µs V/µs V/µs V/µs ns ns dBc nV/√Hz pA/√Hz pA/√Hz % % Degrees Degrees mV mV µV/°C µA µA µA µA dB dB dB dB kΩ kΩ kΩ kΩ MΩ Ω pF ±V ±V dB µA/V µA/V dB µA/V µA/V Model DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, No Peaking Gain = +1 G = +2 G = +2, RL = 1 kΩ 20 V Step G = –1, RL = 1 kΩ G = –1, RL = 1 kΩ VO = 3 V Step VO = 10 V Step fC = 1 MHz, RL = 1 kΩ f = 10 kHz f = 10 kHz, +In f = 10 kHz, –In NTSC, G = +2, RL = 150 Ω Bandwidth for 0.1 dB Flatness Slew Rate1 Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Offset Drift –Input Bias Current 0.1 0.06 0.15 0.06 5 12 25 38 1.5 2.0 TMIN –T MAX +Input Bias Current Open-Loop Voltage Gain TMIN –T MAX VO = ± 2.5 V, RL = 150 Ω TMIN –T MAX VO = ± 10 V, RL = 1 kΩ TMIN –T MAX VO = ± 2.5 V, RL = 150 Ω TMIN –T MAX VO = ± 10 V, RL = 1 kΩ TMIN –T MAX +Input –Input +Input Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage –Input Current +Input Current Input Offset Voltage –Input Current +Input Current ± 15 V ±5 V ± 15 V 15 65 1.7 4.0 13.5 51 58 2 0.07 60 1.5 0.05 VCM = ± 2.5 V VCM = ± 12 V ±5 V ± 15 V 3.0 0.15 3.3 0.15 55 –2– REV. B AD812 Model Conditions OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short Circuit Current Output Resistance MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input offset Voltage –Input Bias Current POWER SUPPLY Operating Range Quiescent Current G = +2, RF = 715 Ω VIN = 2 V Open-Loop RL = 150 Ω, TMIN –TMAX RL = 1 kΩ, TMIN –TMAX VS ±5 V ± 15 V ±5 V ± 15 V ± 15 V ± 15 V Min 3.5 13.6 30 40 AD812A Typ 3.8 14.0 40 50 100 15 Max Units ±V ±V mA mA mA Ω G = +2, f = 5 MHz G = +2, f = 40 MHz TMIN –TMAX TMIN –TMAX ± 5 V, ± 15 V ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 1.2 –75 0.1 0.5 2 3.6 25 ± 18 4.0 5.5 6.0 dB dB mV µA V mA mA mA dB µA/V µA/V Per Amplifier TMIN –TMAX ±5 V ± 15 V ± 15 V 3.5 4.5 Power Supply Rejection Ratio Input Offset Voltage –Input Current +Input Current VS = ± 1.5 V to ± 15 V 70 80 0.3 0.005 0.6 0.05 NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. Specifications subject to change without notice. Single Supply Model (@ TA = +25 C, RL = 150 , unless otherwise noted) VS +5 V +3 V +5 V +3 V +5 V +3 V +5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V +3 V +5 V +3 V Min 35 30 13 10 AD812A Typ 50 40 20 18 125 60 3.5 1.5 18 0.07 0.15 0.06 0.15 Max Units MHz MHz MHz MHz V/µs V/µs nV/√Hz pA/√Hz pA/√Hz % % Degrees Degrees Conditions DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate1 NOISE/HARMONIC PERFORMANCE Input Voltage Noise Input Current Noise Differential Gain Error2 Differential Phase Error 2 G = +2, No Peaking G = +2 G = +2, RL = 1 kΩ f = 10 kHz f = 10 kHz, +In f = 10 kHz, –In NTSC, G = +2, RL = 150 Ω G = +1 G = +2 G = +1 REV. B –3– AD812–SPECIFICATIONS Single Supply (Continued) Model DC PERFORMANCE Input Offset Voltage TMIN –TMAX Offset Drift –Input Bias Current TMIN –TMAX +Input Bias Current Open-Loop Voltage Gain Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage –Input Current +Input Current Input Offset Voltage –Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing p-p TMIN –TMAX VO = +2.5 V p-p VO = +0.7 V p-p VO = +2.5 V p-p VO = +0.7 V p-p +Input –Input +Input +5 V, +3 V +5 V +3 V +5 V +3 V +5 V +5 V +5 V +3 V VCM = 1.25 V to 3.75 V +5 V 1.0 1.0 52 55 3 0.1 52 3.5 0.1 3.2 3.1 1.3 30 25 40 67 250 0.2 73 70 400 300 15 90 2 4.0 2.0 +5 V, +3 V +5 V, +3 V 7 2 Conditions VS +5 V, +3 V Min AD812A Typ 1.5 Max 4.5 7.0 20 30 1.5 2.0 Units mV mV µV/°C µA µA µA µA dB dB kΩ kΩ MΩ Ω pF V V dB µA/V µA/V dB µA/V µA/V V p-p V p-p V p-p mA mA mA 5.5 0.2 VCM = 1 V to 2 V +3 V RL = 1 kΩ, TMIN –TMAX RL = 150 Ω, TMIN –TMAX Output Current Short Circuit Current MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input offset Voltage –Input Bias Current POWER SUPPLY Operating Range Quiescent Current G = +2, RF = 715 Ω VIN = 1 V +5 V +5 V +3 V +5 V +3 V +5 V 3.0 2.8 1.0 20 15 G = +2, f = 5 MHz G = +2, f = 20 MHz TMIN –TMAX TMIN –TMAX +5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V, +3 V 2.4 –72 0.1 0.5 2 3.5 25 36 4.0 3.5 4.5 dB dB mV µA V mA mA mA dB µA/V µA/V Per Amplifier TMIN –TMAX +5 V +3 V +5 V 70 3.2 3.0 Power Supply Rejection Ratio Input Offset Voltage –Input Current +Input Current TRANSISTOR COUNT VS = +3 V to +30 V 80 0.3 0.005 56 0.6 0.05 NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2 Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53. Specifications subject to change without notice. –4– REV. B AD812 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-lead plastic package: θJA = 90°C/Watt; 8-lead SOIC package: θJA = 150°C/Watt. ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD812 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. While the AD812 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150 degrees) is not exceeded under all conditions. To ensure proper operation, it is important to observe the derating curves. It must also be noted that in high (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. 2.0 MAXIMUM POWER DISSIPATION – Watts TJ = +150 C 8-LEAD MINI-DIP PACKAGE 1.5 ORDERING GUIDE Model Temperature Range Package Description Package Option AD812AN –40°C to +85°C AD812AR –40°C to +85°C AD812AR-REEL AD812AR-REEL7 8-Lead Plastic DIP N-8 8-Lead Plastic SOIC SO-8 13" Reel 7" Reel METALIZATION PHOTO Dimensions shown in inches and (mm). 0.0783 (1.99) V+ 8 OUT2 7 –IN2 6 1.0 8-LEAD SOIC PACKAGE 0.5 5 +IN2 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE – C Figure 3. Plot of Maximum Power Dissipation vs. Temperature 0.0539 (1.37) 4 V– 1 OUT1 2 –IN1 3 +IN1 4 V– CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD812 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. B –5– AD812–Typical Performance Characteristics 20 16 Volts 14 15 COMMON-MODE VOLTAGE RANGE – TOTAL SUPPLY CURRENT – mA VS = 12 15V 10 10 VS = 8 5V 5 6 0 0 5 10 SUPPLY VOLTAGE – 15 Volts 20 4 –60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE – C Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage Figure 7. Total Supply Current vs. Junction Temperature 10 20 TOTAL SUPPLY CURRENT – mA TA = +25 C NO LOAD 9 OUTPUT VOLTAGE – V p-p 15 8 10 RL = 150 7 5 6 5 0 0 2 4 0 5 10 SUPPLY VOLTAGE – 15 Volts 20 10 12 6 8 SUPPLY VOLTAGE – Volts 14 16 Figure 5. Output Voltage Swing vs. Supply Voltage Figure 8. Total Supply Current vs. Supply Voltage 30 15V SUPPLY 25 25 20 A OUTPUT VOLTAGE – Volts p-p 15 10 5 0 –5 –10 –IB, VS = –15 –20 15V +IB, VS = 5V, 15V –IB, VS = 5V 20 15 10 5V SUPPLY 5 0 INPUT BIAS CURRENT – 10 100 1k LOAD RESISTANCE – 10k –25 –60 –40 –20 0 20 40 60 80 100 JUNCTION TEMPERATURE – C 120 140 Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Input Bias Current vs. Junction Temperature –6– REV. B AD812 4 2 VS = 5V 60 70 0 –2 –4 –6 –8 –10 –12 –14 –16 –60 20 –40 –20 0 20 40 60 80 100 JUNCTION TEMPERATURE – C 120 140 0 5 10 SUPPLY VOLTAGE – 15 Volts 20 VS = 15V INPUT OFFSET VOLTAGE – mV OUTPUT CURRENT – mA 50 40 30 Figure 10. Input Offset Voltage vs. Junction Temperature Figure 13. Linear Output Current vs. Supply Voltage 160 CLOSED-LOOP OUTPUT RESISTANCE – 1k G = +2 100 SHORT CIRCUIT CURRENT – mA 140 SINK 120 VS = 15V 10 100 SOURCE 80 1 5VS 0.1 15VS 100k 1M FREQUENCY – Hz 10M 100M 60 40 –60 –40 –20 0 20 40 60 80 100 JUNCTION TEMPERATURE – C 120 140 0.01 10k Figure 11. Short Circuit Current vs. Junction Temperature Figure 14. Closed-Loop Output Resistance vs. Frequency 80 30 VS = 15V 70 OUTPUT VOLTAGE – V p-p OUTPUT CURRENT – mA 25 60 20 RL = 1k 15 50 VS = 40 VS = 30 15V 5V 10 VS = 5V 5 20 –60 –40 –20 0 20 40 60 80 100 120 140 0 100k 1M JUNCTION TEMPERATURE – C 10M FREQUENCY – Hz 100M Figure 12. Linear Output Current vs. Junction Temperature Figure 15. Large Signal Frequency Response REV. B –7– AD812 100 100 120 PHASE VOLTAGE NOISE – nV/ Hz CURRENT NOISE – pA/ Hz TRANSIMPEDANCE – dB 0 –45 VS = 15V –90 100 GAIN VS = 3V 80 VS = 3V VS = 15V –180 –135 PHASE – Degrees INVERTING INPUT CURRENT NOISE 10 VOLTAGE NOISE 10 NONINVERTING INPUT CURRENT NOISE 60 1 10 100 1k FREQUENCY – Hz 10k 1 100k 40 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 16. Input Current and Voltage Noise vs. Frequency Figure 19. Open-Loop Transimpedance vs. Frequency (Relative to 1 Ω) 90 681 80 COMMON-MODE REJECTION – dB –30 VIN 70 60 50 40 681 VOUT 681 681 HARMONIC DISTORTION – dBc –50 G = +2 VS = 2V p-p VS = 15V ; RL = 1k VS = 5V ; RL = 150 –70 VS = –90 2ND HARMONIC 3RD HARMONIC –110 2ND –130 1k 3RD 10k 100k 1M FREQUENCY – Hz 10M 100M 5V VS = 15V VS = VS = 3V 15V 30 20 10 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 17. Common-Mode Rejection vs. Frequency Figure 20. Harmonic Distortion vs. Frequency 80 70 10 8 V TO 0 15V POWER SUPPLY REJECTION – dB GAIN = –1 VS = 15V 6 4 2 0 –2 –4 –6 –8 1% 0.1% 0.025% 60 50 1.5V 40 30 20 10 0 10k 100k 1M FREQUENCY – Hz 10M 100M OUTPUT SWING FROM –10 20 30 40 SETTLING TIME – ns 50 60 Figure 18. Power Supply Rejection vs. Frequency Figure 21. Output Swing and Error vs. Settling Time –8– REV. B AD812 1400 VS = 15V RL = 500 G = +1 1400 G = +1 1200 1200 1000 SLEW RATE – V/ s 1000 G = +2 800 600 400 200 0 0 1 2 3 4 5 6 7 8 9 10 OUTPUT STEP SIZE – Vp-p G = +10 SLEW RATE – V/ s 800 600 G = +10 G = +2 G = –1 400 200 0 G = –1 0 1.5 3.0 4.5 6.0 7.5 9.0 10.5 Volts 12.0 13.5 15.0 SUPPLY VOLTAGE – Figure 22. Slew Rate vs. Output Step Size Figure 25. Maximum Slew Rate vs. Supply Voltage 2V 100 90 50ns 100 500mV 20ns VIN 90 VIN 10 0% VOUT 10 0% VOUT 2V 500mV Figure 23. Large Signal Pulse Response, Gain = +1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) Figure 26. Small Signal Pulse Response, Gain = +1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) PHASE G = +1 RL = 150 VS = 15V 5V PHASE SHIFT – Degrees 200 180 160 –3dB BANDWIDTH – MHz 0 –90 –180 G = +1 RL = 150 RF = 750 RF = 866 PEAKING 1dB PEAKING 0.2dB 1 GAIN CLOSED-LOOP GAIN – dB 140 120 100 80 60 40 5V –270 3V VS = 15V 5V 0 –1 –2 –3 –4 –5 –6 1 10 100 FREQUENCY – MHz 5V 3V 20 0 1000 0 2 4 6 8 10 12 14 Volts 16 18 20 SUPPLY VOLTAGE – Figure 24. Closed-Loop Gain and Phase vs. Frequency, G = +1 Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1 REV. B –9– AD812 500mV 100 90 50ns 100 50mV 20ns VIN 90 VIN 10 0% VOUT 10 0% VOUT 5V 500mV Figure 28. Large Signal Pulse Response, Gain = +10, (RF = 357 Ω, RL = 500 Ω, VS = ± 15 V) Figure 31. Small Signal Pulse Response, Gain = +10, (RF = 357 Ω, RL = 150 Ω, VS = ± 5 V) VS = CLOSED-LOOP GAIN (NORMALIZED) – dB 15V 5V 0 –90 –180 VS = 3V 15V 5V 0 –90 –180 –270 –360 5V 1 GAIN 0 –1 5V –2 3V –3 –4 –5 –6 1 10 100 FREQUENCY – MHz VS = 3V CLOSED-LOOP GAIN (NORMALIZED) – dB 1 GAIN 0 –1 –2 –3 –4 –5 –6 1 5V 3V 5V –270 15V VS = 5V 15V 5V 1000 10 100 FREQUENCY – MHz 1000 Figure 29. Closed-Loop Gain and Phase vs. Frequency, Gain = +10, RL = 150 Ω Figure 32. Closed-Loop Gain and Phase vs. Frequency, Gain = +10, RL = 1 k Ω 100 90 80 G = +10 RL= 150 110 100 90 –3dB BANDWIDTH – MHz PEAKING 1dB RF = 357 G = +10 RL = 1k RF = 357 –3dB BANDWIDTH – MHz 70 60 RF = 154 50 40 30 20 10 0 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE – Volts 16 18 20 RF = 649 80 70 RF = 154 60 50 40 30 20 10 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE – Volts 16 18 20 RF = 649 Figure 30. –3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 150 Ω Figure 33. –3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 1 k Ω –10– REV. B PHASE SHIFT – Degrees PHASE G = +10 RL = 150 PHASE SHIFT – Degrees PHASE G = +10 RL = 1k AD812 2V 100 90 50ns 100 500mV 20ns VIN 90 VIN 10 0% VOUT 10 0% VOUT 2V 500mV Figure 34. Large Signal Pulse Response, Gain = –1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) Figure 37. Small Signal Pulse Response, Gain = –1, (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) VS = 15V 5V 5V G = –1 RL = 150 0 –90 PHASE VS = 15V 5V G = –10 RL = 1k 0 –90 CLOSED-LOOP GAIN (NORMALIZED) – dB 1 GAIN 0 –1 –2 3V –180 –270 CLOSED-LOOP GAIN (NORMALIZED) – dB 1 GAIN 0 –1 VS = –2 –3 –4 –5 –6 1 15V 5V 5V 3V –180 –270 VS = –3 5V –4 –5 –6 1 10 100 FREQUENCY – MHz 5V 3V 15V 5V 3V 1000 10 100 FREQUENCY – MHz 1000 Figure 35. Closed-Loop Gain and Phase vs. Frequency, Gain = –1, RL = 150 Ω Figure 38. Closed-Loop Gain and Phase vs. Frequency, Gain = –10, RL = 1 kΩ 130 120 110 –3dB BANDWIDTH – MHz 100 G = –1 RL = 150 RF = 681 –3dB BANDWIDTH – MHz PEAKING 1.0dB RF = 715 90 80 70 60 G = –10 RL = 1k RF = 357 100 90 80 PEAKING 70 60 50 40 30 0 2 4 6 8 10 12 RF = 154 50 40 30 20 10 RF = 649 0.2dB 14 Volts 16 18 20 0 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE – Volts 16 18 20 SUPPLY VOLTAGE – Figure 36. –3 dB Bandwidth vs. Supply Voltage, Gain = –1, RL = 150 Ω Figure 39. –3 dB Bandwidth vs. Supply Voltage, Gain = –10, RL = 1 kΩ REV. B –11– PHASE SHIFT – Degrees PHASE PHASE SHIFT – Degrees AD812 General Considerations The AD812 is a wide bandwidth, dual video amplifier which offers a high level of performance on less than 5.5 mA per amplifier of quiescent supply current. It is designed to offer outstanding performance at closed-loop inverting or noninverting gains of one or greater. Built on a low cost, complementary bipolar process, and achieving bandwidth in excess of 100 MHz, differential gain and phase errors of better than 0.1% and 0.1° (into 150 Ω), and output current greater than 40 mA, the AD812 is an exceptionally efficient video amplifier. Using a conventional current feedback architecture, its high performance is achieved through careful attention to design details. Choice of Feedback and Gain Resistors To estimate the –3 dB bandwidth for closed-loop gains or feedback resistors not listed in the above table, the following two pole model for the AD812 many be used: ACL = G where: Because it is a current feedback amplifier, the closed-loop bandwidth of the AD812 depends on the value of the feedback resistor. The bandwidth also depends on the supply voltage. In addition, attenuation of the open-loop response when driving load resistors less than about 250 Ω will affect the bandwidth. Table I contains data showing typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 Ω. (Bandwidths will be about 20% greater for load resistances above a few hundred ohms.) The choice of feedback resistor is not critical unless it is important to maintain the widest, flattest frequency response. The resistors recommended in the table are those (metal film values) that will result in the widest 0.1 dB bandwidth. In those applications where the best control of the bandwidth is desired, 1% metal film resistors are adequate. Wider bandwidths can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback Resistor (RL = 150 Ω) VS (V) ± 15 Gain +1 +2 +10 –1 –10 +1 +2 +10 –1 –10 +1 +2 +10 –1 –10 +1 +2 +10 –1 –10 RF ( ) 866 715 357 715 357 750 681 154 715 154 750 681 154 715 154 750 681 154 715 154 BW (MHz) 145 100 65 100 60 90 65 45 70 45 60 50 35 50 35 50 40 30 40 25  RF + GrIN CT   + S RF + GrIN CT + 1 S2  2πf 2     ACL = closed-loop gain G = 1 + RF /RG rIN = input resistance of the inverting input CT = “transcapacitance,” which forms the open-loop dominant pole with the tranresistance RF = feedback resistor RG = gain resistor f2 = frequency of second (nondominant) pole S = 2 πj f ( ) ( ) Appropriate values for the model parameters at different supply voltages are listed in Table II. Reasonable approximations for these values at supply voltages not found in the table can be obtained by a simple linear interpolation between those tabulated values which “bracket” the desired condition. Table II. Two-Pole Model Parameters at Various Supply Voltages VS ± 15 ±5 +5 +3 rIN ( ) 85 90 105 115 CT (pF) 2.5 3.8 4.8 5.5 f2 (MHz) 150 125 105 95 As discussed in many amplifier and electronics textbooks (such as Roberge’s Operational Amplifiers: Theory and Practice), the –3 dB bandwidth for the 2-pole model can be obtained as: f3 = fN [1 – 2d2 + (2 – 4d2 + 4d4 )1/2]1/2 where:   f2  fN =   R + Gr CT  IN F  1/ 2 ( ) ±5 and: d = (1/2) [f2 (RF + GrIN ) CT]1/2 This model will predict –3 dB bandwidth within about 10 to 15% of the correct value when the load is 150 Ω. However, it is not an accurate enough to predict either the phase behavior or the frequency response peaking of the AD812. Printed Circuit Board Layout Guidelines +5 +3 As with all wideband amplifiers, printed circuit board parasitics can affect the overall closed-loop performance. Most important for controlling the 0.1 dB bandwidth are stray capacitances at the output and inverting input nodes. Increasing the space between signal lines and ground plane will minimize the coupling. Also, signal lines connecting the feedback and gain resistors should be kept short enough that their associated inductance does not cause high frequency gain errors. –12– REV. B AD812 Power Supply Bypassing Adequate power supply bypassing can be very important when optimizing the performance of high speed circuits. Inductance in the supply leads can (for example) contribute to resonant circuits that produce peaking in the amplifier’s response. In addition, if large current transients must be delivered to a load, then large (greater than 1 µF) bypass capacitors are required to produce the best settling time and lowest distortion. Although 0.1 µF capacitors may be adequate in some applications, more elaborate bypassing is required in other cases. When multiple bypass capacitors are connected in parallel, it is important to be sure that the capacitors themselves do not form resonant circuits. A small (say 5 Ω) resistor may be required in series with one of the capacitors to minimize this possibility. As discussed below, power supply bypassing can have a significant impact on crosstalk performance. Achieving Low Crosstalk The input and output signal return paths must also be kept from overlapping. Since ground connections are not of perfectly zero impedance, current in one ground return path can produce a voltage drop in another ground return path if they are allowed to overlap. Electric field coupling external to (and across) the package can be reduced by arranging for a narrow strip of ground plane to be run between the pins (parallel to the pin rows). Doing this on both sides of the board can reduce the high frequency crosstalk by about 5 dB or 6 dB. Driving Capacitive Loads Measured crosstalk from the output of amplifier 2 to the input of amplifier 1 of the AD812 is shown in Figure 40. The crosstalk from the output of amplifier 1 to the input of amplifier 2 is a few dB better than this due to the additional distance between critical signal nodes. A carefully laid-out PC board should be able to achieve the level of crosstalk shown in the figure. The most significant contributors to difficulty in achieving low crosstalk are inadequate power supply bypassing, overlapped input and/or output signal paths, and capacitive coupling between critical nodes. The bypass capacitors must be connected to the ground plane at a point close to and between the ground reference points for the two loads. (The bypass of the negative power supply is particularly important in this regard.) There are two amplifiers in the package, and low impedance signal return paths must be provided for each load. (Using a parallel combination of 1 µF, 0.1 µF, and 0.01 µF bypass capacitors will help to achieve optimal crosstalk.) –10 –20 RL = 150 –30 When used with the appropriate output series resistor, any load capacitance can be driven without peaking or oscillation. In most cases, less than 50 Ω is all that is needed to achieve an extremely flat frequency response. As illustrated in Figure 44, the AD812 can be very attractive for driving largely capacitive loads. In this case, the AD812’s high output short circuit current allows for a 150 V/µs slew rate when driving a 510 pF capacitor. RF +VS 0.1 F 1.0 F RG 8 RS VO 1.0 F CL RL AD812 VIN RT 0.1 F –VS 4 Figure 41. Circuit for Driving a Capacitive Load CLOSED-LOOP GAIN – dB CROSSTALK – dB –40 –50 –60 –70 –80 –90 –100 –110 100k 1M 10M 100M 12 9 6 VS = 5V G = +2 RF = 750 RL = 1k CL = 10pF RS = 0 RS = 30 3 0 –3 –6 1 RS = 50 FREQUENCY – Hz 10 100 FREQUENCY – MHz 1000 Figure 40. Crosstalk vs. Frequency Figure 42. Response to a Small Load Capacitor at ± 5 V REV. B –13– AD812 VS = 15V G = +2 RF = 750 RL = 1k 12 1V 100 90 50ns VIN CLOSED-LOOP GAIN – dB 9 6 CL = 150pF, RS = 30 3 0 10 VOUT –3 CL = 510pF, RS = 15 –6 –9 1 10 100 FREQUENCY – MHz 1000 0% 2V Figure 43. Response to Large Load Capacitor, VS = ± 15 V Figure 45. 6 dB Overload Recovery; G = 10, RL = 500 Ω, VS = ± 5 V 5V 100 90 100ns VIN In the case of high gains with very high levels of input overdrive, a longer recovery time may occur. For example, if the input common-mode voltage range is exceeded in a gain of +10, the recovery time will be on the order of 100 ns. This is primarily due to current overloading of the input stage. As noted in the warning under “Maximum Power Dissipation,” a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. For differential input voltages of less than about 1.25 V, this will be internally limited to less than 20 mA (decreasing with supply voltage). For input overdrives which result in higher differential input voltages, power dissipation in the input stage must be considered. It is recommended that external diode clamps be used in cases where the differential input voltage is expected to exceed 1.25 V. High Performance Video Line Driver 10 0% VOUT 5V Figure 44. Pulse Response of Circuit of Figure 41 with CL = 510 pF, RL = 1 kΩ, RF = RG = 715 Ω, RS = 15 Ω Overload Recovery There are three important overload conditions to consider. They are due to input common mode voltage overdrive, input current overdrive, and output voltage overdrive. When the amplifier is configured for low closed-loop gains, and its input common-mode voltage range is exceeded, the recovery time will be very fast, typically under 10 ns. When configured for a higher gain, and overloaded at the output, the recovery time will also be short. For example, in a gain of +10, with 6 dB of input overdrive, the recovery time of the AD812 is about 10 ns. At a gain of +2, the AD812 makes an excellent driver for a backterminated 75 Ω video line. Low differential gain and phase errors and wide 0.1 dB bandwidth can be realized over a wide range of power supply voltage. Outstanding gain and group delay matching are also attainable over the full operating supply voltage range. RG +VS RF 0.1 F 8 75 CABLE VIN 75 75 75 CABLE VOUT 75 AD812 4 0.1 F –VS Figure 46. Gain of +2 Video Line Driver (RF = RG from Table I) –14– REV. B AD812 90 PHASE G = +2 RL = 150 3V 1 GAIN CLOSED-LOOP GAIN – dB PHASE SHIFT – Degrees 0.4 0.3 0.2 NORMALIZED GAIN – dB 0 –90 G = +2 RL = 150 5V VS = 15V –180 5V –270 0.1 0 –0.1 –0.2 VS = –0.3 –0.4 –0.5 3V 5V 5V –0.6 100k 15V 0 –1 –2 –3 5V –4 –5 –6 1 10 100 FREQUENCY –MHz 1000 5V 3V VS = 15V 1M 10M FREQUENCY – Hz 100M Figure 47. Closed-Loop Gain and Phase vs. Frequency for the Line Driver Figure 50. Fine-Scale Gain Flatness vs. Frequency, Gain = +2, RL = 150 Ω 120 110 100 –3dB BANDWIDTH – MHz 1.0 G = +2 RL = 150 PEAKING 1dB RF = 590 RF = 715 RF = 750 GAIN MATCH – dB 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 VS = 3V RF = 681 G = +2 RL = 150 90 80 NO PEAKING 70 60 50 40 30 20 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE – Volts 16 18 20 VS = 15V RF = 715 –1.0 1 10 100 FREQUENCY – MHz 1000 Figure 48. –3 dB Bandwidth vs. Supply Voltage, Gain = +2, RL = 150 Ω Figure 51. Closed-Loop Gain Matching vs. Frequency, Gain = +2, RL = 150 Ω DIFFERENTIAL GAIN – % 0.06 DELAY 8 3V 6 4 GROUP DELAY – ns 0.04 DIFFERENTIAL GAIN DIFFERENTIAL PHASE – Degrees 5V 5V 15V 0.08 0.02 2 0 DELAY MATCHING 0.4 0.2 VS = 3V TO 0 15V 0.06 DIFFERENTIAL PHASE 0.04 0.02 –0.2 –0.4 100k 1M 10M FREQUENCY – Hz 100M 0 5 6 7 8 9 10 11 12 Volts 13 14 15 SUPPLY VOLTAGE – Figure 49. Differential Gain and Phase vs. Supply Voltage, Gain = +2, RL = 150 Ω Figure 52. Group Delay and Group Delay Matching vs. Frequency, G = +2, RL = 150 Ω REV. B –15– AD812 The AD812 will operate with total supply voltages from 36 V down to 2.4 V. With proper biasing (see Figure 53), it can be an outstanding single supply video amplifier. Since the input and output voltage ranges extend to within 1 volt of the supply rails, it will handle a 1.3 V p-p signal on a single 3.3 V supply, or a 3 V p-p signal on a single 5 V supply. The small signal, 0.1 dB bandwidths will exceed 10 MHz in either case, and the large signal bandwidths will exceed 6 MHz. The capacitively coupled cable driver in Figure 53 will achieve outstanding differential gain and phase errors of 0.07% and 0.06 degrees respectively on a single 5 V supply. Resistor R2, in this circuit, is selected to optimize the differential gain and phase by operating the amplifier in its most linear region. To optimize the circuit for a 3 V supply, a value of 8 kΩ is recommended for R2. 649 C3 30 F C2 1F R1 9k C1 2F VIN R2 11.8k 8 R3 1k +VS 649 PHASE VS = 5V 0.5 GAIN 0 CLOSED-LOOP GAIN – dB 0 –90 –180 –270 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –3.5 1 10 100 FREQUENCY – MHz PHASE SHIFT – Degrees Operation Using a Single Supply 90 1000 Figure 54. Closed-Loop Gain and Phase vs. Frequency, Circuit of Figure 53 1V COUT 47 F 75 75 CABLE VOUT 75 100 90 50ns VIN AD812 4 Figure 53. Biasing for Single Supply Operation VOUT 10 0% 500mV Figure 55. Pulse Response of the Circuit of Figure 53 with VS = 5 V OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 0.39 (9.91) 8 5 8-Lead Plastic SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80) 0.25 (6.35) 1 4 PIN 1 0.165 0.01 (4.19 0.25) 0.125 (3.18) MIN 0.060 (1.52) 0.015 (0.38) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.1574 (4.00) 0.1497 (3.80) 8 1 5 4 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) 0.0099 (0.25) 45 SEATING 0.018 0.003 0.10 0.033 (0.84) PLANE (0.46 +0.08) (2.54) NOM BSC 0.015 (0.381) 0.008 (0.204) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41) –16– REV. B PRINTED IN U.S.A. C1859b–0–9/98