AD8129

Low Cost 270 MHz Differential Receiver Amplifiers AD8129/AD8130 FEATURES High speed AD8130: 270 MHz, 1090 V/μs @ G = +1 AD8129: 200 MHz, 1060 V/μs @ G = +10 High CMRR 94 dB min, dc to 100 kHz 80 dB min @ 2 MHz 70 dB @ 10 MHz High input impedance: 1 MΩ differential Input common-mode range ±10.5 V Low noise AD8130: 12.5 nV/√Hz AD8129: 4.5 nV/√Hz Low distortion, 1 V p-p @ 5 MHz AD8130, −79 dBc worst harmonic @ 5 MHz AD8129, −74 dBc worst harmonic @ 5 MHz User-adjustable gain No external components for G = +1 Power supply range +4.5 V to ±12.6 V Power-down CONNECTION DIAGRAM +IN 1 –V S 2 PD 3 AD8129/ AD8130 + 8 7 6 5 –IN +VS OUT FB 02464-001 REF 4 Figure 1. The AD8129/AD8130 are differential-to-single-ended amplifiers with extremely high CMRR at high frequency. Therefore, they can also be effectively used as high speed instrumentation amps or for converting differential signals to single-ended signals. The AD8129 is a low noise, high gain (10 or greater) version intended for applications over very long cables, where signal attenuation is significant. The AD8130 is stable at a gain of 1 and can be used for applications where lower gains are required. Both have user-adjustable gain to help compensate for losses in the transmission line. The gain is set by the ratio of two resistor values. The AD8129/AD8130 have very high input impedance on both inputs, regardless of the gain setting. APPLICATIONS High speed differential line receivers Differential-to-single-ended converters High speed instrumentation amps Level shifting GENERAL DESCRIPTION The AD8129/AD8130 are designed as receivers for the transmission of high speed signals over twisted-pair cables to work with the AD8131 or AD8132 drivers. Either can be used for analog or digital video signals and for high speed data transmission. 120 110 100 90 CMRR (dB) The AD8129/AD8130 have excellent common-mode rejection (70 dB @ 10 MHz), allowing the use of low cost, unshielded twisted-pair cables without fear of corruption by external noise sources or crosstalk. The AD8129/AD8130 have a wide power supply range from single +5 V to ±12 V, allowing wide commonmode and differential-mode voltage ranges while maintaining signal integrity. The wide common-mode voltage range enables the driver-receiver pair to operate without isolation transformers in many systems where the ground potential difference between drive and receive locations is many volts. The AD8129/AD8130 have considerable cost and performance improvements over op amps and other multiamplifier receiving solutions. +VS PD 3 1 8 4 7 6 5 2 80 70 60 50 40 02464-002 VIN VOUT 30 10k 100k 1M FREQUENCY (Hz) 10M 100M RG RF 02464-003 Figure 2. AD8129 CMRR vs. Frequency –VS VOUT = VIN [1+(R F/RG)] Figure 3. Typical Connection Configuration Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. AD8129/AD8130 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Connection Diagram ....................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 AD8129/AD8130 Specifications..................................................... 3 5 V Specifications ......................................................................... 3 ±5 V Specifications....................................................................... 5 ±12 V Specifications..................................................................... 7 Absolute Maximum Ratings............................................................ 9 Thermal Resistance ...................................................................... 9 ESD Caution.................................................................................. 9 Typical Performance Characteristics ........................................... 10 AD8130 Frequency Response Characteristics........................ 10 AD8129 Frequency Response Characteristics........................ 13 AD8130 Harmonic Distortion Characteristics ...................... 16 AD8129 Harmonic Distortion Characteristics ...................... 18 AD8130 Transient Response Characteristics.......................... 23 AD8129 Transient Response Characteristics.......................... 26 Theory of Operation ...................................................................... 32 Op Amp Configuration ............................................................. 32 Applications..................................................................................... 33 Basic Gain Circuits..................................................................... 33 Twisted-Pair Cable, Composite Video Receiver with Equalization Using an AD8130................................................... 33 Output Offset/Level Translator ................................................ 34 Resistorless Gain of 2 ................................................................. 35 Summer ....................................................................................... 35 Cable-Tap Amplifier .................................................................. 35 Power-Down ............................................................................... 36 Extreme Operating Conditions ................................................ 36 Power Dissipation....................................................................... 37 Layout, Grounding, and Bypassing.......................................... 38 Outline Dimensions ....................................................................... 39 Ordering Guide .......................................................................... 40 REVISION HISTORY 11/05—Rev. B to Rev. C Changes to 5 V Specifications......................................................... 3 Changes to Table 4 and Maximum Power Dissipation Section.. 9 Changes to Figure 16...................................................................... 11 Changes to Figure 17...................................................................... 12 3/05—Rev. 0 to Rev. A Changes to Specifications.................................................................2 Replaced Figure 3 ..............................................................................5 Changes to Ordering Guide .............................................................6 Updated Outline Dimensions....................................................... 27 Revision 0: Initial Version 9/05—Rev. A to Rev. B Extended Temperature Range...........................................Universal Deleted Figure 5................................................................................ 5 Added Thermal Resistance Section ............................................... 9 Updated Outline Dimensions ....................................................... 39 Changes to Ordering Guide .......................................................... 40 Rev. C | Page 2 of 40 AD8129/AD8130 AD8129/AD8130 SPECIFICATIONS 5 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25°C, +VS = 5 V, −VS = 0 V, REF = 2.5 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted. TMIN to TMAX = −40°C to +125°C, unless otherwise noted. Table 1. Model Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic Conditions VOUT ≤ 0.3 V p-p VOUT = 1 V p-p VOUT ≤ 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT ≤ 1 V p-p, 10% to 90% Min 160 160 AD8129 Typ 185 185 25/40 930 20 1.8 20 VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f ≥ 10 kHz f ≥ 100 kHz f ≥ 100 kHz AD8130, G = +2, NTSC 100 IRE, RL ≥ 150 Ω AD8130, G = +2, NTSC 100 IRE, RL ≥ 150 Ω DC to 100 kHz, VCM = 1.5 V to 3.5 V VCM = 1 V p-p @ 1 MHz VCM = 1 V p-p @ 10 MHz VCM = 1 V p-p @ 1 kHz, VOUT = ±0.5 V dc V+IN − V−IN = 0 V 86 80 70 80 1.25 to 3.7 ±0.5 ±0.75 1 4 3 4 −68/−75 −62/−64 −63/−70 −56/−58 −67 25 4.5 1 1.4 0.3 0.1 Max Min 220 180 AD8130 Typ 250 205 25 930 20 1.5 30 −72/−79 −65/−71 −60/−62 −68/−68 −70 26 12.3 1 1.4 0.13 0.15 Max Unit MHz MHz MHz V/μs ns ns ns dBc dBc dBc dBc dBc dBm nV/√Hz pA/√Hz pA/√Hz % Degrees 810 810 IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, −IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio 96 86 80 96 dB dB dB dB V V V MΩ MΩ pF pF CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance 70 72 1.25 to 3.8 ±2.5 ±2.8 6 4 3 4 ±0.6 Differential Common mode Differential Common mode ±0.85 ±2.3 ±3.3 Rev. C | Page 3 of 40 AD8129/AD8130 Model Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Conditions VOUT = ±1 V, RL ≥ 150 Ω TMIN to TMAX VOUT = ±1 V VOUT = ±1 V TMIN to TMAX TMIN to TMAX +VS = 5 V, −VS = −0.5 V to +0.5 V −VS = 0 V, +VS = +4.5 V to +5.5 V Min AD8129 Typ ±0.25 20 86 250 0.2 2 −88 −100 ±0.5 ±1 TMIN to TMAX (+IN, −IN, REF, FB) (+IN, −IN, REF, FB) TMIN to TMAX RLOAD ≥ 150 Ω To common TMIN to TMAX PD ≤ VIL, in powerdown mode Total supply voltage TMIN to TMAX PD ≤ VIL PD ≤ VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Enable Time OPERATING TEMPERATURE RANGE +VS − 1.5 PD = min VIH PD = max VIL PD ≤ +VS − 3 V PD ≥ +VS − 2 V −40 +VS − 2.5 −30 −50 12.5 100 0.5 +125 −40 12.5 100 0.5 +125 ±2.25 9.9 33 0.65 1.1 35 −60/+55 −240 10 5 ±0.08 0.2 ±0.4 Max ±1.25 Min AD8130 Typ ±0.1 20 71 200 0.4 20 −74 −90 ±0.5 ±1 5 ±0.08 0.2 1.1 35 −60/+55 −240 10 ±0.4 Max ±0.6 Unit % ppm/°C dB ppm mV μV/°C mV dB dB μA μA nA/°C μA nA/°C V mA mA μA/°C pF 0.8 1.4 −80 −86 ±2 ±3.5 1.8 3.5 −70 −76 ±2 ±3.5 Input Offset Voltage vs. Supply Input Bias Current (+IN, −IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current 3.9 3.9 ±12.6 10.6 0.85 1 ±2.25 9.9 33 0.65 ±12.6 10.6 0.85 1 V mA μA/°C mA mA V V μA μA kΩ kΩ μs °C +VS − 1.5 +VS − 2.5 −30 −50 Rev. C | Page 4 of 40 AD8129/AD8130 ±5 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25°C, VS = ±5 V, REF = 0 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted. TMIN to TMAX = −40°C to +125°C, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic Conditions VOUT ≤ 0.3 V p-p VOUT = 2 V p-p VOUT ≤ 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT ≤ 1 V p-p, 10% to 90% Min 175 170 AD8129 Typ 200 190 30/50 1060 20 1.7 30 VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f ≥ 10 kHz f ≥ 100 kHz f ≥ 100 kHz AD8130, G = +2, NTSC 200 IRE, RL ≥ 150 Ω AD8130, G = +2, NTSC 200 IRE, RL ≥ 150 Ω DC to 100 kHz, VCM = −3 V to +3.5 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 2 V p-p @ 1 kHz, VOUT = ±0.5 V dc V+IN − V−IN = 0 V 94 80 70 100 ±3.5 ±0.5 ±0.6 Differential Common mode Differential Common mode ±0.75 1 4 3 4 ±0.85 ±2.3 −74/−84 −68/−74 −67/−81 −61/−70 −67 25 4.5 1 1.4 0.3 0.1 Max Min 240 140 AD8130 Typ 270 155 45 1090 20 1.4 40 −79/−86 −74/−81 −74/−80 −74/−76 −70 26 12.5 1 1.4 0.13 0.15 Max Unit MHz MHz MHz V/μs ns ns ns dBc dBc dBc dBc dBc dBm nV/√Hz pA/√Hz pA/√Hz % Degrees 925 950 IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, −IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio 110 90 80 110 dB dB dB dB V V ±3.3 V MΩ MΩ pF pF CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance 70 83 ±3.8 ±2.5 ±2.8 6 4 3 4 Rev. C | Page 5 of 40 AD8129/AD8130 Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Conditions VOUT = ±1 V, RL ≥ 150 Ω TMIN to TMAX VOUT = ±1 V VOUT = ±1 V TMIN to TMAX TMIN to TMAX +VS = +5 V, −VS = −4.5 V to −5.5 V −VS = −5 V, +VS = +4.5 V to +5.5 V Min AD8129 Typ ±0.4 20 88 250 0.2 2 −90 −94 ±0.5 ±1 5 ±0.08 0.2 3.6/4.0 40 −60/+55 −240 10 Max ±1.5 Min AD8130 Typ ±0.15 10 74 200 0.4 20 −78 −80 ±0.5 ±1 5 ±0.08 0.2 3.6/4.0 40 −60/+55 −240 10 Max ±0.6 Unit % ppm/°C dB ppm mV μV/°C mV dB dB μA μA nA/°C μA nA/°C ±V mA mA μA/°C pF 0.8 1.4 −84 −86 ±2 ±3.5 1.8 3.5 −74 −74 ±2 ±3.5 Input Offset Voltage vs. Supply Input Bias Current (+IN, −IN) Input Bias Current (REF, FB) TMIN to TMAX (+IN, −IN, REF, FB) (+IN, −IN, REF, FB) TMIN to TMAX RLOAD = 150 Ω/1 kΩ To common TMIN to TMAX PD ≤ VIL, in powerdown mode Total supply voltage TMIN to TMAX PD ≤ VIL PD ≤ VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Enable Time OPERATING TEMPERATURE RANGE +VS − 1.5 PD = min VIH PD = max VIL PD ≤ +VS − 3 V PD ≥ +VS − 2 V −40 ±2.25 Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current ±0.4 ±0.4 10.8 36 0.68 ±12.6 11.6 0.85 1 ±2.25 10.8 36 0.68 ±12.6 11.6 0.85 1 V mA μA/°C mA mA V V μA μA kΩ kΩ μs °C +VS − 1.5 +VS − 2.5 −30 −50 12.5 100 0.5 +125 −40 12.5 100 0.5 +125 +VS − 2.5 −30 −50 Rev. C | Page 6 of 40 AD8129/AD8130 ±12 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25°C, VS = ±12 V, REF = 0 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted. TMIN to TMAX = −40°C to +85°C, unless otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic Conditions VOUT ≤ 0.3 V p-p VOUT = 2 V p-p VOUT ≤ 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT ≤ 1 V p-p, 10% to 90% Min 175 170 AD8129 Typ 200 195 50/70 1070 20 1.7 40 VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f ≥ 10 kHz f ≥ 100 kHz f ≥ 100 kHz AD8130, G = +2, NTSC 200 IRE, RL ≥ 150 Ω AD8130, G = +2, NTSC 200 IRE, RL ≥ 150 Ω DC to 100 kHz, VCM = ±10 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 4 V p-p @ 1 kHz, VOUT = ±0.5 V dc V+IN − V–IN = 0 V 92 80 70 93 ±10.3 ±0.5 ±0.75 1 4 3 4 −71/−84 −65/−74 −65/−82 −59/−70 −67 25 4.6 1 1.4 0.3 0.1 Max Min 250 150 AD8130 Typ 290 175 110 1100 20 1.4 40 −79/−86 −74/−81 −74/−80 −74/−74 −70 26 13 1 1.4 0.13 0.2 Max Unit MHz MHz MHz V/μs ns ns ns dBc dBc dBc dBc dBc dBm nV/√Hz pA/√Hz pA/√Hz % Degrees 935 960 IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, −IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio 105 88 80 105 dB dB dB dB V V V MΩ MΩ pF pF CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance 70 80 ±10.5 ±2.5 ±2.8 6 4 3 4 ±0.6 Differential Common mode Differential Common mode ±0.85 ±2.3 ±3.3 Rev. C | Page 7 of 40 AD8129/AD8130 Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Conditions VOUT = ±1 V, RL ≥ 150 Ω TMIN to TMAX VOUT = ±1 V VOUT = ±1 V TMIN to TMAX TMIN to TMAX +VS = +12 V, −VS = –11.0 V to −13.0 V −VS = −12 V, +VS = +11.0 V to +13.0 V Min AD8129 Typ ±0.8 20 87 250 0.2 2 −88 −92 ±0.25 ±0.5 2.5 ±0.08 0.2 ±10.8 40 −60/+55 −240 10 Max ±1.8 Min AD8130 Typ ±0.15 10 73 200 0.4 20 −77 −88 ±0.25 ±0.5 2.5 ±0.08 0.2 ±10.8 40 −60/+55 −240 10 Max ±0.6 Unit % ppm/°C dB ppm mV μV/°C mV dB dB μA μA nA/°C μA nA/°C V mA mA μA/°C pF 0.8 1.4 −82 −84 ±2 ±3.5 1.8 3.5 −70 −70 ±2 ±3.5 Input Offset Voltage vs. Supply Input Bias Current (+IN, −IN) Input Bias Current (REF, FB) TMIN to TMAX (+IN, −IN, REF, FB) (+IN, −IN, REF, FB) TMIN to TMAX RLOAD = 700 Ω To common TMIN to TMAX PD ≤ VIL, in powerdown mode Total supply voltage TMIN to TMAX PD ≤ VIL PD ≤ VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Enable Time OPERATING TEMPERATURE RANGE +VS − 1.5 PD = min VIH PD = max VIL PD ≤ +VS − 3 V PD ≥ +VS − 2 V −40 ±2.25 Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current ±0.4 ±0.4 13 43 0.73 ±12.6 13.9 0.9 1.1 ±2.25 13 43 0.73 ±12.6 13.9 0.9 1.1 V mA μA°C mA mA V V μA μA kΩ kΩ μs °C +VS − 1.5 +VS − 2.5 −30 −50 3 100 0.5 +85 −40 3 100 0.5 +85 +VS − 2.5 −30 −50 Rev. C | Page 8 of 40 AD8129/AD8130 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage Power Dissipation Input Voltage (Any Input) Differential Input Voltage (AD8129) VS ≥ ±11.5 V Differential Input Voltage (AD8129) VS < ±11.5 V Differential Input Voltage (AD8130) Storage Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 26.4 V Refer to Figure 4 −VS − 0.3 V to +VS + 0.3 V ±0.5 V ±6.2 V ±8.4 V −65°C to +150°C 300°C 150°C The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow reduces θJA. In addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the θJA. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC (121°C/W) and MSOP (θJA = 142°C/W) packages on a JEDEC standard 4-layer board. θJA values are approximations. 1.75 THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for the device soldered in a circuit board in still air. Table 5. Thermal Resistance Package Type 8-Lead SOIC/4-Layer 8-Lead MSOP/4-Layer θJA 121 142 Unit °C/W °C/W MAXIMUM POWER DISSIPATION (W) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1.50 1.25 1.00 SOIC 0.75 MSOP 0.50 0.25 02464-005 Maximum Power Dissipation The maximum safe power dissipation in the AD8129/AD8130 packages is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8129/AD8130. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) Figure 4. Maximum Power Dissipation vs. Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 9 of 40 AD8129/AD8130 TYPICAL PERFORMANCE CHARACTERISTICS AD8130 FREQUENCY RESPONSE CHARACTERISTICS G = +1, RL = 1 kΩ, CL = 2 pF, VOUT = 0.3 V p-p, TA = 25°C, unless otherwise noted. 3 VOUT = 0.3V p-p 2 1 0 VS = ±2.5V 6 VS = ±5V 5 4 CL = 10pF 3 VS = ±5V VS = ±12V GAIN (dB) CL = 20pF GAIN (dB) –1 –2 –3 –4 –5 2 1 0 –1 –2 CL = 5pF CL = 2pF 02464-006 –6 –7 1 10 FREQUENCY (MHz) 100 –3 –4 1 10 FREQUENCY (MHz) 100 400 300 Figure 5. AD8130 Frequency Response vs. Supply, VOUT = 0.3 V p-p Figure 8. AD8130 Frequency Response vs. Load Capacitance 3 VOUT = 1V p-p 2 1 0 VS = ±5V VS = ±2.5V 0.7 0.6 0.5 0.4 VS = ±12V RL = 1kΩ VS = ±2.5V GAIN (dB) –2 –3 –4 –5 02464-007 GAIN (dB) –1 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 1 VS = ±5V –6 –7 1 10 FREQUENCY (MHz) 100 300 10 FREQUENCY (MHz) 100 300 Figure 6. AD8130 Frequency Response vs. Supply, VOUT = 1 V p-p 3 VOUT = 2V p-p 2 1 0 GAIN (dB) Figure 9. AD8130 Fine Scale Response vs. Supply, RL = 1 kΩ 0.5 VS = ±5V 0.4 0.3 0.2 VS = ±12V RL = 150Ω VS = ±2.5V VS = ±2.5V VS = ±5V GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 0.1 0 –0.1 –0.2 –0.3 VS = ±12V 02464-011 02464-008 –0.4 –0.5 1 10 FREQUENCY (MHz) 100 10 FREQUENCY (MHz) 100 300 300 Figure 7. AD8130 Frequency Response vs. Supply, VOUT = 2 V p-p Figure 10. AD8130 Fine Scale Response vs. Supply, RL = 150 Ω Rev. C | Page 10 of 40 02464-010 VS = ±12V 02464-009 AD8129/AD8130 3 2 1 0 RL = 150Ω VS = ±2.5V 3 2 1 0 VS = ±5V VS = ±12V G = +2 VS = ±5V RF = RG = 750Ω RF = RG = 1kΩ GAIN (dB) GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 –1 –2 –3 –4 –5 RF = RG = 499Ω RF = RG = 250Ω 02464-012 –6 –7 1 10 FREQUENCY (MHz) 100 10 FREQUENCY (MHz) 100 400 300 Figure 11. AD8130 Frequency Response vs. Supply, RL = 150 Ω 3 2 1 0 Figure 14. AD8130 Frequency Response for Various RF/RG 0.3 0.2 G = +2 VOUT = 0.3V p-p VS = ±2.5V G = +2 RL = 1kΩ VS = ±2.5V 0.1 0 GAIN (dB) GAIN (dB) –1 –2 –3 –4 –5 VS = ±5V VS = ±12V –0.1 –0.2 –0.3 –0.4 –0.5 VS = ±12V 02464-016 VS = ±5V 02464-013 –6 –7 1 10 FREQUENCY (MHz) 100 –0.6 –0.7 1 10 FREQUENCY (MHz) 300 100 Figure 12. AD8130 Frequency Response vs. Supply, G = +2, VOUT = 0.3 V p-p 0.3 Figure 15. AD8130 Fine Scale Response vs. Supply, G = +2, RL = 1 kΩ 3 2 1 0 G = +2 VOUT = 2V p-p VS = ±2.5V 0.2 0.1 0 GAIN (dB) G = +2 RL = 150Ω VS = ±2.5V GAIN (dB) –1 –2 –3 –4 –5 VS = ±5V VS = ±12V –0.1 VS = ±5V –0.2 –0.3 –0.4 –0.5 VS = ±12V 02464-015 02464-014 –6 –7 1 10 FREQUENCY (MHz) 100 –0.6 –0.7 1 10 FREQUENCY (MHz) 300 100 Figure 13. AD8130 Frequency Response vs. Supply, G = +2, VOUT = 2 V p-p Figure 16. AD8130 Fine Scale Response vs. Supply, G = +2, RL = 150 Ω Rev. C | Page 11 of 40 02464-017 AD8129/AD8130 3 G = +2 2 RL = 150Ω 1 0 3 2 RL = 150Ω VS = ±2.5V VS = ±5V GAIN (dB) 1 0 –1 –2 –3 –4 –5 02464-018 VS = ±5V, ±12V GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 10 FREQUENCY (MHz) 100 G = +10 G = +5 VS = ±12V VS = ±2.5V VS = ±5V, ±12V 02464-021 –6 –7 0.1 1 FREQUENCY (MHz) 10 300 100 Figure 17. AD8130 Frequency Response vs. Supply, G = +2, RL = 150 Ω Figure 20. AD8130 Frequency Response vs. Supply, G = +5, G = +10, RL = 150 Ω 12 0.3 VOUT = 2V p-p 0.2 VS = ±2.5V 0.1 0 VS = ±5V 0dB = 1V rms 6 0 OUTPUT VOLTAGE (dBV) 02464-019 –6 –12 –18 –24 –30 –36 –42 GAIN (dB) –0.1 –0.2 –0.3 –0.4 G = +10 –0.5 –0.6 –0.7 0.1 1 FREQUENCY (MHz) 10 G = +5 VS = ±2.5V VS = ±5V, ±12V VS = ±12V VS = ±5V –48 10 100 FREQUENCY (MHz) 30 400 Figure 18. AD8130 Fine Scale Response vs. Supply, G = +5, G = +10, VOUT = 2 V p-p 3 VOUT = 2V p-p 2 Figure 21. AD8130 Frequency Response for Various Output Levels 1 1 50Ω 0 8 6 4 5 TEK P6245 FET PROBE GAIN (dB) –1 –2 –3 –4 –5 –6 –7 0.1 1 FREQUENCY (MHz) VS = ±5V, ±12V VS = ±12V RL CL G = +5 RG RF G VS = ±2.5V G = +10 10 RF 0Ω 499Ω 8.06kΩ 4.99kΩ RG – 499Ω 2kΩ 549Ω 100 Figure 19. AD8130 Frequency Response vs. Supply, G = +5, G = +10, VOUT = 2 V p-p Figure 22. AD8130 Basic Frequency Response Test Circuit Rev. C | Page 12 of 40 02464-023 1 2 5 10 02464-020 02464-022 AD8129/AD8130 AD8129 FREQUENCY RESPONSE CHARACTERISTICS G = +10, RL = 1 kΩ, CL = 2 pF, VOUT = 0.3 V p-p, TA = 25°C, unless otherwise noted. 3 4 VOUT = 0.3V p-p VS = ±5V VS = ±2.5V VS = ±5V CL = 20pF CL = 10pF 2 1 0 3 2 1 GAIN (dB) GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 VS = ±12V 0 –1 –2 –3 –4 CL = 5pF CL = 2pF 02464-024 –5 –6 1 10 FREQUENCY (MHz) 100 10 FREQUENCY (MHz) 100 300 300 Figure 23. AD8129 Frequency Response vs. Supply, VOUT = 0.3 V p-p 3 VOUT = 1V p-p 2 1 0 VS = ±5V VS = ±2.5V Figure 26. AD8129 Frequency Response vs. Load Capacitance 0.5 0.4 0.3 VS = ±5V 0.2 RL = 1kΩ VS = ±2.5V GAIN (dB) –2 –3 –4 –5 02464-025 GAIN (dB) –1 VS = ±12V 0.1 0 VS = ±12V –0.1 –0.2 –0.3 –0.4 –0.5 1 10 FREQUENCY (MHz) 100 02464-028 –6 –7 1 10 FREQUENCY (MHz) 100 300 300 Figure 24. AD8129 Frequency Response vs. Supply, VOUT = 1 V p-p 3 VOUT = 2V p-p 2 1 0 VS = ±2.5V Figure 27. AD8129 Fine Scale Response vs. Supply, RL = 1 kΩ 0.3 0.2 0.1 0 GAIN (dB) RL = 150Ω VS = ±2.5V GAIN (dB) –1 –2 –3 –4 –5 VS = ±5V VS = ±12V –0.1 –0.2 –0.3 –0.4 –0.5 VS = ±5V VS = ±12V 02464-026 –6 –7 1 10 FREQUENCY (MHz) 100 –0.6 –0.7 1 10 FREQUENCY (MHz) 100 300 300 Figure 25. AD8129 Frequency Response vs. Supply, VOUT = 2 V p-p Figure 28. AD8129 Fine Scale Response vs. Supply, RL = 150 Ω Rev. C | Page 13 of 40 02464-029 02464-027 AD8129/AD8130 3 2 1 0 VS = ±2.5V RL = 150Ω 0.8 0.6 0.4 0.2 G = +10 VS = ±5V 2kΩ/221Ω 909Ω/100Ω 499Ω/54.9Ω GAIN (dB) GAIN (dB) –1 –2 –3 –4 –5 02464-030 0 –0.2 0.2 0 –0.2 –0.4 –0.6 SOIC 499Ω/54.9Ω 909Ω/100Ω VS = ±5V VS = ±12V μSOIC 2kΩ/221Ω 02464-033 –6 –7 10 100 FREQUENCY (MHz) 300 1 10 FREQUENCY (MHz) 100 300 Figure 29. AD8129 Frequency Response vs. Supply, RL = 150 Ω Figure 32. AD8129 Fine Scale Response vs. SOIC and MSOP for Various RF/RG 0.2 3 2 1 0 G = +20 VOUT = 0.3V p-p 0.1 0 G = +20 RL = 1kΩ VS = ±5V, ±12V GAIN (dB) VS = ±5V –0.1 –0.2 –0.3 –0.4 –0.5 VS = ±2.5V –0.6 02464-031 GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 10 FREQUENCY (MHz) 100 VS = ±2.5V VS = ±12V –0.7 –0.8 1 FREQUENCY (MHz) 10 30 300 Figure 30. AD8129 Frequency Response vs. Supply, G = +20, VOUT = 0.3 V p-p 0.3 G = +20 VOUT = 2V p-p Figure 33. AD8129 Fine Scale Response vs. Supply 3 2 1 0 0.2 0.1 VS = ±5V, ±12V GAIN (dB) G = +20 RL = 150Ω VS = ±5V, ±12V 0 –0.1 –0.2 –0.3 –0.4 –0.5 02464-032 GAIN (dB) –1 –2 –3 –4 –5 –6 –7 1 10 FREQUENCY (MHz) 100 VS = ±2.5V VS = ±2.5V 02464-035 –0.6 –0.7 0.1 1 FREQUENCY (MHz) 10 300 30 Figure 31. AD8129 Frequency Response vs. Supply, G = +20, VOUT = 2 V p-p Figure 34. AD8129 Fine Scale Response vs. Supply Rev. C | Page 14 of 40 02464-034 AD8129/AD8130 3 2 1 0 GAIN (dB) G = +20 RL = 150Ω 3 2 1 VS = ±5V, ±12V GAIN (dB) RL = 150Ω 0 –1 G = +100 G = +50 –1 –2 –3 –4 –5 –6 –7 1 10 FREQUENCY (MHz) 100 VS = ±2.5V 02464-036 –2 –3 –4 –5 –6 –7 0.1 1 FREQUENCY (MHz) 10 50 02464-039 VS = ±2.5V VS = ±5V VS = ±12V 300 Figure 35. AD8129 Frequency Response vs. Supply, G = +20, RL = 150 Ω 12 Figure 38. AD8129 Frequency Response vs. Supply, G = +50, G = +100, RL = 150 Ω 0.2 VOUT = 2V p-p 0.1 0 OUTPUT VOLTAGE (dBV) VS = ±12V 0dB = 1V rms 6 0 G = +100 –0.1 GAIN (dB) –6 –12 –18 –24 –30 –36 G = +50 –0.2 –0.3 –0.4 –0.5 –0.6 –0.7 –0.8 0.1 VS = ±2.5V VS = ±5V VS = ±12V 02464-037 –42 VS = ±5V –48 10 100 FREQUENCY (MHz) 1 FREQUENCY (MHz) 10 400 Figure 36. AD8129 Fine Scale Response vs. Supply, G = +50, G = +100, VOUT = 2 V p-p Figure 39. AD8129 Frequency Response for Various Output Levels 3 VOUT = 2V p-p 2 1 0 GAIN (dB) 1 TEK P6245 FET PROBE 6 4 5 RL RF CL –1 –2 –3 –4 –5 –6 –7 0.1 G = +100 G = +50 50Ω 8 VS = ±2.5V VS = ±5V VS = ±12V 02464-038 RG G 10 20 50 100 RF 2kΩ 2kΩ 2kΩ 2kΩ RG 02464-041 1 FREQUENCY (MHz) 10 50 221Ω 105Ω 41.2Ω 20Ω Figure 37. AD8129 Frequency Response vs. Supply, G = +50, G = +100, VOUT = 2 V p-p Figure 40. AD8129 Basic Frequency Response Test Circuit Rev. C | Page 15 of 40 02464-040 AD8129/AD8130 AD8130 HARMONIC DISTORTION CHARACTERISTICS RL = 1 kΩ, CL = 2 pF, TA = 25°C, unless otherwise noted. –60 –51 VOUT = 1V p-p –57 –66 –63 VS = ±12V HD2 (dBc) VOUT = 1V p-p G = +1 VS = ±5V G = +1 VS = ±12V HD3 (dBc) –72 –69 –75 VS = ±5V –81 VS = ±5V 02464-042 –78 G = +1 VS = ±12V VS = ±12V G = +1 –87 02464-045 –84 –93 G = +2 –99 1 10 FREQUENCY (MHz) 40 G = +2 –90 1 10 FREQUENCY (MHz) 40 Figure 41. AD8130 Second Harmonic Distortion vs. Frequency Figure 44. AD8130 Third Harmonic Distortion vs. Frequency –54 VOUT = 2V p-p –45 –51 VOUT = 2V p-p G = +2, VS = ±12V G = +2, VS = ±5V –60 G = +1 VS = ±5V –57 –63 HD2 (dBc) HD3 (dBc) –66 –69 VS = ±12V –75 –81 VS = ±5V G = +1 –72 –78 VS = ±12V G = +2 VS = ±5V 02464-043 G = +2 –93 1 10 FREQUENCY (MHz) 40 –84 1 10 FREQUENCY (MHz) 40 Figure 42. AD8130 Second Harmonic Distortion vs. Frequency Figure 45. AD8130 Third Harmonic Distortion vs. Frequency –46 –55 fC = 5MHz –61 VS = ±12V VS = ±5V –52 –58 fC = 5MHz VS = ±12V VS = ±5V –67 HD2 (dBc) HD3 (dBc) G = +1 –73 –64 –70 G = +1 –76 G = +2 –79 VS = ±12V G = +2 –85 VS = ±5V 02464-044 –82 –88 –94 VS = ±12V VS = ±5V 0.5 1 VOUT (V p-p) 10 02464-047 –91 0.5 1 VOUT (V p-p) 10 Figure 43. AD8130 Second Harmonic Distortion vs. Output Voltage Figure 46. AD8130 Third Harmonic Distortion vs. Output Voltage Rev. C | Page 16 of 40 02464-046 G = +1 VS = ±12V –87 AD8129/AD8130 –43 VS = ±2.5V –46 –52 –49 G = +1 –55 HD2 (dBc) VS = ±2.5V fC = 5MHz G = +1, HD3 G = +2, HD3 –58 –64 HD (dBc) VOUT = 2V p-p G = +2 G = +1, HD2 G = +2, HD2 –61 –70 –76 –82 G = +2, HD3 G = +2, HD2 –67 –73 02464-048 G = +2 –79 1 VOUT = 1V p-p 10 40 –94 0 0.5 1.0 1.5 VOUT (V p-p) 2.0 2.5 3.0 FREQUENCY (MHz) Figure 47. AD8130 Second Harmonic Distortion vs. Frequency Figure 49. AD8130 Harmonic Distortion vs. Output Voltage –42 –48 –54 –60 HD3 (dBc) VS = ±2.5V VOUT = 2V p-p G = +2 G = +1 –66 –72 –78 –84 –90 –96 1 G = +1 G = +2 VOUT = 1V p-p 10 FREQUENCY (MHz) 40 Figure 48. AD8130 Third Harmonic Distortion vs. Frequency 02464-049 Rev. C | Page 17 of 40 02464-050 G = +1 –88 AD8129/AD8130 AD8129 HARMONIC DISTORTION CHARACTERISTICS RL = 1 kΩ, CL = 2 pF, TA = 25°C, unless otherwise noted. –51 VOUT = 1V p-p –57 –54 VOUT = 1V p-p –60 –66 G = +10, VS = ±5V G = +10, VS = ±12V –63 HD2 (dBc) HD3 (dBc) –69 G = +10, VS = ±12V G = +10, VS = ±5V –72 –78 –84 –75 G = +20, VS = ±12V 02464-051 G = +20, VS = ±5V –81 G = +20, VS = ±5V –87 1 10 FREQUENCY (MHz) 40 –96 1 10 FREQUENCY (MHz) 40 Figure 50. AD8129 Second Harmonic Distortion vs. Frequency Figure 53. AD8129 Third Harmonic Distortion vs. Frequency –42 VOUT = 2V p-p –48 –54 HD2 (dBc) –45 –51 VOUT = 2V p-p G = +10, VS = ±5V G = +10, VS = ±12V G = +10 G = +10, VS = ±12V G = +20, VS = ±12V G = +20 –57 HD3 (dBc) –60 –66 –72 –78 –84 1 –63 –69 –75 G = +10, VS = ±12V G = +20, VS = ±5V 10 FREQUENCY (MHz) 02464-052 G = +20, VS = ±12V 10 FREQUENCY (MHz) –87 1 40 40 Figure 51. AD8129 Second Harmonic Distortion vs. Frequency –50 Figure 54. AD8129 Third Harmonic Distortion vs. Frequency –48 fC = 5MHz –54 fC = 5MHz –56 –60 G = +10, VS = ±12V G = +10, VS = ±5V –62 HD2 (dBc) G = +10, VS = ±12V HD3 (dBc) –66 –68 G = +10, VS = ±5V G = +20, VS = ±5V –72 –78 –84 G = +20, VS = ±5V G = +20, VS = ±12V –74 –80 02464-053 –86 0.5 1 VOUT (V p-p) 10 –96 0.5 1 10 VOUT (V p-p) Figure 52. AD8129 Second Harmonic Distortion vs. Output Voltage Figure 55. AD8129 Third Harmonic Distortion vs. Output Voltage Rev. C | Page 18 of 40 02464-056 G = +20, VS = ±12V –90 02464-055 G = +10, VS = ±5V –81 G = +10, VS = ±5V  G = +20, VS = ±5V 02464-054 –90 G = +20, VS = ±12V AD8129/AD8130 –44 VS = ±2.5V VOUT = 2V p-p –39 –45 –51 DISTORTION (dBc) G = +1 VOUT = 2V p-p VS = ±5V RL = 1kΩ fC = 5MHz –50 –56 HD2 (dBc) –57 –63 –69 HD2 –75 G = +20 –62 VOUT = 1V p-p –68 –74 02464-057 G = +10 –80 1 10 FREQUENCY (MHz) 40 –87 –5 –4 –3 –2 –1 0 1 VCM (V) 2 3 4 5 Figure 56. AD8129 Second Harmonic Distortion vs. Frequency Figure 59. AD8130 Harmonic Distortion vs. Common-Mode Voltage –42 –48 VS = ±2.5V VOUT = 2V p-p –61 G = +1 fC = 5MHz VOUT = 1V p-p HD2 VS = ±2.5V HD2 VS = ±5V, ±12V HD3 VS = ±5V –67 –54 DISTORTION (dBc) –73 –60 HD3 (dBc) G = +20 –66 –72 –78 02464-058 VOUT = 1V p-p G = +10 –79 –85 HD3 VS = ±12V HD3 VS = ±2.5V –97 100 RL (Ω) 1k 02464-061 –84 –90 1 10 FREQUENCY (MHz) 40 –91 Figure 57. AD8129 Third Harmonic Distortion vs. Frequency Figure 60. AD8130 Harmonic Distortion vs. Load Resistance –50 VS = ±2.5V fC = 5MHz –50 G = +1 fC = 5MHz HD2 VS = ±2.5V VOUT = 2V p-p –56 –56 DISTORTION (dBc) –62 HD (dBc) –62 HD2 VS = ±5V, ±12V G = +20 HD3 –68 G = +10 HD2 G = +20 HD2 –68 –74 G = +10 HD3 02464-059 –74 –80 –80 HD3 VS = ±5V, ±12V RL (Ω) –86 0 0.5 1.0 1.5 VOUT (V p-p) 2.0 2.5 3.0 –86 100 1k Figure 58. AD8129 Harmonic Distortion vs. Output Voltage Figure 61. AD8130 Harmonic Distortion vs. Load Resistance Rev. C | Page 19 of 40 02464-062 HD3 VS = ±2.5V 02464-060 –81 HD3 AD8129/AD8130 –36 G = +10 VOUT = 2V p-p VS = ±5V RL = 1kΩ fC = 5MHz –42 –48 DISTORTION (dBc) VCM –54 1:2 200Ω RL RL CL –60 –66 HD2 HD3 RG 02464-063 RF G RF 0Ω 499Ω 2kΩ 2kΩ RG 02464-066 –72 –78 –5 –4 –3 –2 –1 0 VCM (V) 1 2 3 4 5 MINI-CIRCUITS®: # T4-6T, fC ≤ 10MHz # TC4-1W, fC > 10MHz 1 2 10 20 – 499Ω 221Ω 105Ω Figure 62. AD8129 Harmonic Distortion vs. Common-Mode Voltage Figure 65. AD8129/AD8130 Basic Distortion Test Circuit, VCM = 0 V, Unless Otherwise Noted 100 –48 –54 G = +10 fC = 5MHz VOUT = 1V p-p VS = ±2.5V HD2 CURRENT NOISE (pA/√Hz) –60 DISTORTION (dBc) VS = ±12V VS = ±5V 10 –68 –72 –78 HD3 VS = ±2.5V –90 100 RL (Ω) 02464-064 VS = ±12V VS = ±5V 1.0 0.1 1k 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 63. AD8129 Harmonic Distortion vs. Load Resistance –44 Figure 66. AD8129/AD8130 Input Current Noise vs. Frequency 100 G = +10 fC = 5MHz VOUT = 2V p-p VS = ±2.5V VS = ±12V CURRENT NOISE (nV/√Hz) –50 DISTORTION (dBc) –56 VS = ±5V AD8130 10 –62 VS = ±2.5V –68 HD3 –74 02464-065 AD8129 VS = ±12V VS = ±5V –80 100 RL (Ω) 1k 1 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 64. AD8129 Harmonic Distortion vs. Load Resistance Figure 67. AD8129/AD8130 Input Voltage Noise vs. Frequency Rev. C | Page 20 of 40 02464-068 02464-067 –84 AD8129/AD8130 –30 –40 –30 –40 COMMON-MODE REJECTION (dB) –60 –70 –80 –90 –100 –110 –120 10k 02464-069 COMMON-MODE REJECTION (dB) –50 –50 –60 –70 –80 –90 –100 –110 –120 10k 02464-072 VS = ±2.5V VS = ±2.5V VS = ±5V, ±12V VS = ±5V, ±12V  10M  100k 1M FREQUENCY (Hz) 10M 100M 100k 1M FREQUENCY (Hz) 100M Figure 68. AD8130 Common-Mode Rejection vs. Frequency Figure 71. AD8139 Common-Mode Rejection vs. Frequency 0 –10 0 –10 POWER SUPPLY REJECTION (dB) –20 –30 –40 –50 –60 –70 –80 –90 02464-070 POWER SUPPLY REJECTION (dB) –20 –30 –40 –50 –60 –70 VS = ±12V –80 –90 VS = ±5V –100 1k 10k 100k 1M FREQUENCY (Hz) 10M VS = ±2.5V 02464-073 VS = ±12V VS = ±5V VS = ±2.5V 10k 100k 1M FREQUENCY (Hz) 10M –100 1k 100M 100M Figure 69. AD8130 Positive Power Supply Rejection vs. Frequency 0 –10 –20 Figure 72. AD8129 Positive Power Supply Rejection vs. Frequency 0 –10 POWER SUPPLY REJECTION (dB) –20 –30 –40 –50 –60 –70 –80 –90 VS = ±5V VS = ±12V VS = ±2.5V 10k 100k 1M 10M FREQUENCY (Hz) 02464-074 POWER SUPPLY REJECTION (dB) –30 –40 –50 –60 –70 –80 –90 VS = ±5V 10k VS = ±12V 100k 1M 10M 02464-071 VS = ±2.5V –100 1k 100M –100 1k 100M FREQUENCY (Hz) Figure 70. AD8130 Negative Power Supply Rejection vs. Frequency Figure 73. AD8129 Negative Power Supply Rejection vs. Frequency Rev. C | Page 21 of 40 AD8129/AD8130 80 70 60 GAIN 135 180 100 VS = ±5V 10 PHASE MARGIN (Degrees) OUTPUT IMPEDANCE (Ω) OPEN-LOOP GAIN (dB) 50 40 30 + 1 PHASE VOUT 1kΩ 1kΩ 90 AD8130, G = +1 100m 20 10 100Ω – + – 2pF 45 10m 02464-077 0 –10 1k VIN φM = 58° 100k 1M FREQUENCY (Hz) 10M 0 100M 300M 02464-075 AD8129, G = +10 10k 1m 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M Figure 74. AD8130 Open-Loop Gain and Phase vs. Frequency 90 80 70 OPEN-LOOP GAIN (dB) Figure 76. Closed-Loop Output Impedance vs. Frequency 180 GAIN PHASE MARGIN (Degrees) 60 50 40 30 20 100Ω 1kΩ VOUT 1kΩ 2pF 135 90 PHASE 45 φM = 56° 0 300M 10 0 1k VIN 10k 100k 1M 10M FREQUENCY (Hz) 100M Figure 75. AD8129 Open-Loop Gain and Phase vs. Frequency Rev. C | Page 22 of 40 02464-076 AD8129/AD8130 AD8130 TRANSIENT RESPONSE CHARACTERISTICS G = +1, RL = 1 kΩ, CL = 2 pF, VS = ±5 V, TA = 25°C, unless otherwise noted. VS = ±2.5V VOUT = 1V p-p VS = ±2.5V VS = ±5V VOUT = 0.2V p-p VS = ±12V 02464-078 250mV 5.00ns 50mV 5.00ns Figure 77. AD8130 Transient Response, VS = ±2.5 V, VOUT = 1 V p-p Figure 80. AD8130 Transient Response vs. Supply, VOUT = 0.2 V p-p VOUT = 1V p-p VS = ±5V VS = ±2.5V VS = ±5V VOUT = 1V p-p CL = 5pF VS = ±12V 250mV 5.00ns 02464-079 250mV 5.00ns Figure 78. AD8130 Transient Response, VS = ±5 V, VOUT = 1 V p-p Figure 81. AD8130 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF VOUT = 1V p-p VS = ±12V VS = ±2.5V VS = ±5V VOUT = 2V p-p CL = 5pF VS = ±12V 02464-080 250mV 5.00ns 500mV 5.00ns Figure 79. AD8130 Transient Response, VS = ±12 V, VOUT = 1 V p-p Figure 82. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF Rev. C | Page 23 of 40 02464-083 02464-082 02464-081 AD8129/AD8130 CL = 10pF CL = 5pF CL = 2pF VOUT = 0.2 V p-p VOUT = 1V p-p G = +2 VS = ±5V, CL = 10pF VS = ±5V, CL = 2pF 02464-084 50mV 10.00ns 250mV 5.00ns Figure 83. AD8130 Transient Response vs. Load Capacitance, VOUT = 0.2 V p-p Figure 86. AD8130 Transient Response vs. Load Capacitance, VOUT = 1 V p-p, G = +2 VOUT = 2V p-p G = +2 2V p-p 1V p-p VS = ±12V 0.5V p-p VS = ±5V 02464-085 500mV 5.00ns 500mV 5.00ns Figure 84. AD8130 Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p Figure 87. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, G = +2 VOUT = 8V p-p 4V p-p 2V p-p CL = 2pF 1V p-p CL = 10pF G = +2 VS = ±5V 02464-086 1.00V 5.00ns 2.00V 5.00ns Figure 85. AD8130 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p Figure 88. AD8130 Transient Response vs. Load Capacitance, VOUT = 8 V p-p Rev. C | Page 24 of 40 02464-089 02464-088 02464-087 AD8129/AD8130 4V p-p G = +5 VS = ±5V CL = 10pF VIN 2V p-p VOUT 1V p-p 02464-090 1.00V 5.00ns 1.00V 10.0ns Figure 89. AD8130 Transient Response with +3 V Common-Mode Input Figure 92. AD8130 Transient Response vs. Output Amplitude VOUT = 8V p-p G = +5 VS = ±5V CL = 10pF VOUT VIN 02464-091 02464-094 02464-095 1.00V 5.00ns 2.00V 10.0ns Figure 90. AD8130 Transient Response with −3 V Common-Mode Input Figure 93. AD8130 Transient Response, VOUT = 8 V p-p, G = +5, VS = ±5 V VOUT = 10V p-p G = +2 VS = ±12V VOUT = 20V p-p G = +5 VS = ±12V CL = 10pF 2.50V 5.00ns 02464-092 5.00V 10.0ns Figure 91. AD8130 Transient Response, VOUT = 10 V p-p, G = +2, VS = ±12 V Figure 94. AD8130 Transient Response, VOUT = 20 V p-p, G = +5, VS = ±12 V Rev. C | Page 25 of 40 02464-093 AD8129/AD8130 AD8129 TRANSIENT RESPONSE CHARACTERISTICS G = +10, RF = 2 kΩ, RG = 221 Ω, RL = 1 kΩ, CL = 1 pF, VS = ±5 V, TA = 25°C, unless otherwise noted. VS = ±2.5V VOUT = 1V p-p VS = ±5V VS = ±2.5V VOUT = 0.4V p-p VS = ±12V 02464-096 250mV 5.00ns 100mV 5.00ns Figure 95. AD8129 Transient Response, VS = ±2.5 V, VOUT = 1 V p-p Figure 98. AD8129 Transient Response vs. Supply, VOUT = 0.4 V p-p VS = ±5V VOUT = 1V p-p VS = ±5V VS = ±2.5V VOUT = 1V p-p CL = 5pF VS = ±12V 02464-097 250mV 5.00ns 250mV 5.00ns Figure 96. AD8129 Transient Response, VS = ±5 V, VOUT = 1 V p-p Figure 99. AD8129 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF VS = ±12V VOUT = 1V p-p VS = ±2.5V VS = ±5V VOUT = 2V p-p CL = 5pF VS = ±12V 02464-098 250mV 5.00ns 250mV 5.00ns Figure 97. AD8129 Transient Response, VS = ±12 V, VOUT = 1 V p-p Figure 100. AD8129 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF Rev. C | Page 26 of 40 02464-101 02464-100 02464-099 AD8129/AD8130 CL = 5pF CL = 10pF VOUT = 0.4V p-p VOUT = 1V p-p G = +20 CL = 20pF CL = 2pF 100mV 5.00ns 02464-102 250mV 5.00ns Figure 101 Transient Response vs. Load Capacitance, VOUT = 0.4 V p-p Figure 104. AD8129 Transient Response, VOUT = 1 V p-p, VS = ±2.5 V to ±12 V VO = 2V p-p VOUT = 2V p-p G = +20 CL = 20pF VO = 1V p-p VO = 0.5V p-p 500mV 5.00ns 02464-103 500mV 5.00ns Figure 102. Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p Figure 105. AD8129 Transient Response, VOUT = 2 V p-p, VS = ±5 V VOUT = 8V p-p VO = 4V p-p G = +20 CL = 20pF VO = 2V p-p VO = 1V p-p 1.00V 5.00ns 02464-104 2.00V 5.00ns Figure 103. Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p Figure 106. AD8129 Transient Response, VOUT = 8 V p-p, VS = ±5 V Rev. C | Page 27 of 40 02464-107 02464-106 02464-105 AD8129/AD8130 VIN 4V p-p G = +50 VS = ±5V CL = 20pF VOUT 2V p-p 1V p-p 02464-108 1.00V 5.00ns 1.00V 12.5ns Figure 107. AD8129 Transient Response with +3.5 V Common-Mode Input Figure 110. AD8129 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p VOUT = 8V p-p G = +50 VS = ±5V CL = 20pF VOUT 02464-109 2.00V 12.5ns Figure 108. AD8129 Transient Response with −3.5 V Common-Mode Input Figure 111. AD8129 Transient Response, VOUT = 8 V p-p, G = +50, VS = ±5 V VOUT = 10V p-p G = +20 VS = ±12V CL = 20pF VOUT = 20V p-p G = +50 VS = ±12V CL = 10pF 02464-110 2.50V 5.00ns 5.00V 12.5ns Figure 109. AD8129 Transient Response, VOUT = 10 V p-p, G = +20 Figure 112. AD8129 Transient Response, VOUT = 20 V p-p, G = +50, VS = ±12 V Rev. C | Page 28 of 40 02464-113 02464-112 VIN 02464-111 AD8129/AD8130 23 G = +1 VS = ±5V G = +1 VS = ±5V RL = 1kΩ SUPPLY CURRENT (mA) 20 17 14 02464-114 GAIN NONLINEARITY (0.005%/DIV) 11 –5 –4 –3 –2 –1 0 1 2 DIFFERENTIAL INPUT (V) 3 4 5 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 OUTPUT VOLTAGE (V) Figure 113. AD8130 DC Power Supply Current vs. Differential Input Voltage Figure 116. AD8130 Gain Nonlinearity, VOUT = 2 V p-p 37 G = +1 VS = ±10V G = +1 VS = ±5V RL = 1kΩ SUPPLY CURRENT (mA) 31 25 19 02464-115 GAIN NONLINEARITY (0.08%/DIV) 13 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 DIFFERENTIAL INPUT (V) 0.6 0.8 1.0 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 OUTPUT VOLTAGE (V) 1.5 2.0 2.5 Figure 114. AD8129 DC Power Supply Current vs. Differential Input Voltage Figure 117. AD8130 Gain Nonlinearity, VOUT = 5 V p-p 4 3.0 AD8130 VS = ±5V 3 2.0 DIFFERENTIAL INPUT (V) VOUT = 100mV AC @ 1kHz 1.0 AD8129 VOUT (V) 2 1 0 –1 0 AD8129 –1.0 –2 –2.0 AD8130 02464-116 02464-119 –3 –4 –3.0 –50 –35 –20 –5 10 25 40 55 70 85 100 –5 –4 –3 –2 –1 0 1 2 3 4 5 TEMPERATURE(°C) DIFFERENTIAL INPUT (V) Figure 115. AD8129/AD8130 Input Differential Voltage Range vs. Temperature, 1% Gain Compression Figure 118. AD8130 Differential Input Clipping Level Rev. C | Page 29 of 40 02464-118 02464-117 AD8129/AD8130 G = +10 VS = ±5V RL = 1kΩ 15 GAIN NONLINEARITY (0.005%/DIV) 14 SUPPLY CURRENT (mA) 02464-120 13 12 11 10 02464-123 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 9 0 5 10 15 20 TOTAL SUPPLY VOLTAGE (V) 25 30 OUTPUT VOLTAGE (V) Figure 119. AD8129 Gain Nonlinearity, VOUT = 2 V p-p Figure 122. Quiescent Power Supply Current vs. Total Supply Voltage G = +10 VS = ±12V RL = 1kΩ 17 16 15 SUPPLY CURRENT (mA) GAIN NONLINEARITY (0.2%/DIV) 14 13 VS = ±12 VS = ±5 12 11 10 9 VS = ±2.5 02464-121 8 7 –50 –35 –20 –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) –5 10 25 40 55 70 TEMPERATURE (°C) 85 100 115 125 Figure 120. AD8129 Gain Nonlinearity, VOUT = 10 V p-p 8 VS = ±10V 6 4 OUTPUT VOLTAGE (V) Figure 123. Quiescent Power Supply Current vs. Temperature 40 0.60 IB 0.45 IOS 30 2 0 –2 –4 02464-122 0.30 20 –6 –8 –1.0 INPUT OFFSET CURRENT (nA) 02464-125 INPUT BIAS CURRENT (μA) –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 DIFFERENTIAL INPUT (V) 0.6 0.8 1.0 0.15 –50 –35 –20 –5 10 25 40 55 TEMPERATURE (°C) 70 85 10 100 Figure 121. AD8129 Differential Input Clipping Level Figure 124. Input Bias Current and Input Offset Current vs. Temperature Rev. C | Page 30 of 40 02464-124 AD8129/AD8130 4.00 3.75 3.50 AD8129 VS = 5V VOUT = 100mV AC AT 1kHz AD8130 3.5 4.0 VS = 5V INPUT COMMON MODE (V) 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 –50 –35 –20 –5 10 25 40 55 TEMPERATURE (°C) 70 85 AD8129 AD8130 02464-126 OUTPUT VOLTAGE (V) SOURCING 3.0 +100°C –40°C +25°C 2.0 SINKING 1.5 VOUT = 100mV AC AT 1kHz 1.0 0 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 02464-129 100 40 Figure 125. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression Figure 128. Output Voltage Range vs. Output Current, Typical 1% Gain Compression 4.00 3.75 AD8130 3.50 INPUT COMMON MODE (V) VS =  ±5V VOUT = 100mV AC AT 1kHz 4.0 VS = ±5V 3.5 AD8129 3.00 2.75 –3.00 –3.25 AD8129 –3.50 –3.75 –4.00 –50 –35 –20 –5 10 25 40 55 TEMPERATURE (°C) 70 85 AD8130 02464-127 OUTPUT VOLTAGE (V) 3.25 3.0 +100°C –40°C +25°C –3.0 –3.5 VOUT = 100mV AC AT 1kHz –4.0 0 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 40 02464-130 100 Figure 126. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression Figure 129. Output Voltage Range vs. Output Current, Typical 1% Gain Compression 11.0 10.5 AD8130 10.0 VS = ±12V OUTPUT VOLTAGE (V) 11 VS = ±12V 10 AD8129 INPUT COMMON MODE (V) 9.5 9.0 8.5 –9.0 –9.5 –10.0 –10.5 –11.0 –50 9 +100°C –9 –40°C +25°C VOUT = 100mV AC AT 1kHz AD8129 AD8130 02464-128 –10 02464-131 –35 –20 –5 10 25 40 55 TEMPERATURE (°C) 70 85 100 –11 0 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 40 Figure 127. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression Figure 130. Output Voltage Range vs. Output Current, Typical 1% Gain Compression Rev. C | Page 31 of 40 AD8129/AD8130 THEORY OF OPERATION The AD8129/AD8130 use an architecture called active feedback, which differs from that of conventional op amps. The most obvious differentiating feature is the presence of two separate pairs of differential inputs compared with a conventional op amp’s single pair. Typically, for the active feedback architecture, one of these input pairs is driven by a differential input signal, while the other is used for the feedback. This active stage in the feedback path is where the term active feedback is derived. The active feedback architecture offers several advantages over a conventional op amp in many types of applications. Among these are excellent common-mode rejection, wide input common-mode range, and a pair of inputs that are high impedance and completely balanced in a typical application. In addition, while an external feedback network establishes the gain response as in a conventional op amp, its separate path makes it completely independent of the signal input. This eliminates any interaction between the feedback and input circuits, which traditionally causes problems with CMRR in conventional differential-input op amp circuits. Another advantage is the ability to change the polarity of the gain merely by switching the differential inputs. A high inputimpedance inverting amplifier can be made. Besides a high input impedance, a unity-gain inverter with the AD8130 has a noise gain of unity. This produces lower output noise and higher bandwidth than op amps that have noise gain equal to 2 for a unity-gain inverter. The two differential input stages of the AD8129/AD8130 are each transconductance stages that are well matched. These stages convert the respective differential input voltages to internal currents. The currents are then summed and converted to a voltage, which is buffered to drive the output. The compensation capacitor is in the summing circuit. When the feedback path is closed around the part, the output drives the feedback input to the voltage that causes the internal currents to sum to 0. This occurs when the two differential inputs are equal and opposite; that is, their algebraic sum is 0. In a closed-loop application, a conventional op amp has its differential input voltage driven to near 0 under nontransient conditions. The AD8129/AD8130 generally has differential input voltages at each of its input pairs, even under equilibrium conditions. As a practical consideration, it is necessary to limit the differential input voltage internally with a clamp circuit. Therefore, the input dynamic ranges are limited to about 2.5 V for the AD8130 and 0.5 V for the AD8129 (see the AD8129/AD8130 Specifications section for more detail). For this and other reasons, it is not recommended to reverse the input and feedback stages of the AD8129/AD8130, even though some apparently normal functionality may be observed under some conditions. A few simple circuits can illustrate how the active feedback architecture of the AD8129/AD8130 operates. OP AMP CONFIGURATION If only one of the input stages of the AD8129/AD8130 is used, it functions very much like a conventional op amp (see Figure 131). Classical inverting and noninverting op amps circuits can be created, and the basic governing equations are the same as for a conventional op amp. The unused input pins form the second input and should be shorted together and tied to ground or a midsupply voltage when they are not used. +V 0.1μF 3 1 8 6 7 10μF + PD +VS VOUT VIN 4 5 + –VS 2 RF RG –V 02464-132 0.1μF 10μF NOTES 1. THIS CIRCUIT IS PROVIDED TO DEMONSTRATE DEVICE OPERATION. IT IS NOT RECOMMENDED TO USE THIS CIRCUIT IN PLACE OF AN OP AMP. Figure 131. With Both Inputs Grounded, the Feedback Stage Functions like an Op Amp: VOUT = VIN (1 + RF/RG). With the unused pair of inputs shorted, there is no differential voltage between them. This dictates that the differential input voltage of the used inputs is also 0 for closed-loop applications. Because this is the governing principle of conventional op amp circuits, an active feedback amplifier can function as a conventional op amp under these conditions. Note that this circuit is presented only for illustration purposes to show the similarities of the active feedback architecture functionality to conventional op amp functionality. If it is desired to design a circuit that can be created from a conventional op amp, it is recommended to choose a conventional op amp with specifications that are better suited to that application. These op amp principles are the basis for offsetting the output, as described in the Output Offset/Level Translator section. Rev. C | Page 32 of 40 AD8129/AD8130 APPLICATIONS BASIC GAIN CIRCUITS The gain of the AD8129/AD8130 can be set with a pair of feedback resistors. The basic configuration is shown in Figure 132. The gain equation is the same as that of a conventional op amp: G = 1 + RF/RG. For unity-gain applications using the AD8130, RF can be set to 0 (short circuit), and RG can be removed (see Figure 133). The AD8129 is compensated to operate at gains of 10 and higher; therefore, shorting the feedback path to obtain unity gain causes oscillation. +V TWISTED-PAIR CABLE, COMPOSITE VIDEO RECEIVER WITH EQUALIZATION USING AN AD8130 The AD8130 has excellent common-mode rejection at its inputs. This makes it an ideal candidate for a receiver for signals that are transmitted over long distances on twisted-pair cables. Category 5 cables are very common in office settings and are extensively used for data transmission. These cables can also be used for the analog transmission of signals such as video. These long cables pick up noise from the environment they pass through. This noise does not favor one conductor over another and therefore is a common-mode signal. A receiver that rejects the common-mode signal on the cable can greatly enhance the signal-to-noise ratio performance of the link. The AD8130 is also very easy to use as a differential receiver, because the differential inputs and the feedback inputs are entirely separate. This means that there is no interaction between the feedback network and the termination network, as there would be in conventional op amp types of receivers. AD8129/ AD8130 3 7 0.1μF PD +VS 6 10μF VIN 1 8 4 5 + + –VS 2 VOUT RF RG –V 0.1μF 02464-133 10μF Figure 132. Basic Gain Circuit: VOUT = VIN (1 + RF/RG) +V Another issue with long cables is that there is more attenuation of the signal at longer distances. Attenuation is also a function of frequency; it increases to roughly the square root of frequency. For good fidelity of video circuits, the overall frequency response of the transmission channel should be flat vs. frequency. Because the cable attenuates the high frequencies, a frequency-selective boost circuit can be used to undo this effect. These circuits are called equalizers. An equalizer uses frequency-dependent elements (Ls and Cs) to create a frequency response that is the opposite of the rest of the channel’s response to create an overall flat response. There are many ways to create such circuits, but a common technique is to put the frequency-selective elements in the feedback path of an op amp circuit. The AD8130 in particular makes this easier than other circuits, because, once again, the feedback path is completely independent of the input path and there is no interaction. The circuit in Figure 134 was developed as a receiver/equalizer for transmitting composite video over 300 meters of Category 5 cable. This cable has an attenuation of approximately 20 dB at 10 MHz for 300 meters. At 100 MHz, the attenuation is approximately 60 dB (see Figure 135). AD8130 0.1μF 3 7 1 8 6 4 5 10μF VIN + PD +VS VOUT + –VS 2 –V 0.1μF Figure 133. An AD8130 with Unity Gain The input signal can be applied either differentially or in a single-ended fashion—all that matters is the magnitude of the differential signal between the two inputs. For single-ended input applications, applying the signal to the +IN with −IN grounded creates a noninverting gain, while reversing these connections creates an inverting gain. Because the two inputs are high impedance and matched, both of these conditions provide the same high input impedance. Thus, an advantage of the active feedback architecture is the ability to make a high input impedance inverting op amp. If conventional op amps are used, a high impedance buffer followed by an inverting stage is needed. This requires two op amps. 02464-134 10μF Rev. C | Page 33 of 40 AD8129/AD8130 +V AD8130 3 7 1 8 6 4 5 0.1μF PD +VS 10μF VIN 100Ω + + –VS 2 VOUT R1 100Ω C1 200pF –V 02464-135 RG 499Ω RF 1kΩ 0.1μF 10μF It is difficult to calculate the exact component values via strictly mathematical means, because the equations for the cable attenuation are approximate and have functions that are not simply related to the responses of RC networks. The method used in this design was to approximate the required response via graphical means from the frequency response and then select components that would approximate this response. The circuit was then built, measured, and finally adjusted to obtain an acceptable response—in this case, flat to 9 MHz to within approximately 1 dB (see Figure 137). 20 10 0 Figure 134. An Equalizer Circuit for Composite Video Transmissions over 300 Meters of Category-5 Cable 20 –10 I/O RESPONSE 10 0 –10 –20 –30 –40 –50 –60 I/O RESPONSE –20 –30 –40 –50 –60 –70 02464-136 –70 02464-138 –80 10k 100k 1M FREQUENCY (Hz) 10M 100M Figure 137. Combined Response of Cable Plus Equalizer 100k 1M FREQUENCY (Hz) 10M 100M –80 10k OUTPUT OFFSET/LEVEL TRANSLATOR The circuit in Figure 133 has the reference input (Pin 4) tied to ground, which produces a ground-referenced output signal. If it is desired to offset the output voltage from ground, the REF input can be used (see Figure 138). The level VOFFSET appears at the output with unity gain. +V Figure 135. Transmission Response of 300 Meters of Category-5 Cable The feedback network is between Pin 6 and Pin 5 and from Pin 5 to ground. C1 and RF create a corner frequency of about 800 kHz. The gain increases to provide about 15 dB of boost at 8 MHz. The response of this circuit is shown in Figure 136. 20 10 0 –10 AD8130 3 7 0.1μF PD +VS 10μF VIN VOFFSET 1 8 + I/O RESPONSE VOUT = VIN +VOFFSET 6 –20 –30 –40 –50 –60 –70 02464-137 4 5 + –VS 2 0.1μF –V 10μF –80 10k Figure 138. The Voltage Applied to Pin 4 to the Unity-Gain Output Voltage Produced by VIN 100k 1M FREQUENCY (Hz) 10M 100M Figure 136. Frequency Response of Equalizer Circuit If the circuit has a gain higher than unity, the gain must be factored in. If RG is connected to ground, the voltage applied to REF is multiplied by the gain of the circuit and appears at the output—just like a noninverting conventional op amp. This situation is not always desirable; the user may want VOFFSET to appear at the output with unity gain. Rev. C | Page 34 of 40 02464-139 AD8129/AD8130 One way to accomplish this is to drive both REF and RG with the desired offset signal (see Figure 139). Superposition can be used to solve this circuit. First, break the connection between VOFFSET and RG. With RG grounded, the gain from Pin 4 to VOUT is 1 + RF/RG. With Pin 4 grounded, the gain though RG to VOUT is −RF/RG. The sum of these is 1. If VREF is delivered from a low impedance source, this works fine. However, if the delivered offset voltage is derived from a high impedance source, such as a voltage divider, its impedance affects the gain equation. This makes the circuit more complicated because it creates an interaction between the gain and offset voltage. +V +V AD8130 0.1μF 3 7 10μF VIN 1 8 + PD +VS 6 4 5 + –VS 2 VOUT –V 0.1μF Figure 141. Gain-of-2 Connections with No Resistors 0.1μF 10μF AD8129/ AD8130 3 7 SUMMER A general summing circuit can be made by the previous technique. A unity-gain configured AD8130 has one signal applied to +IN, while the other signal is applied to REF. The output is the sum of the two input signals (see Figure 142). +V VIN VOFFSET RG 1 8 + PD +VS 6 4 5 + –VS 2 VOUT = VIN × (1 + R F/RG) + V OFFSET RF –V 0.1μF 02464-140 10μF AD8130 3 7 0.1μF + PD +VS 6 10μF Figure 139. In this Circuit, VOFFSET Appears at the Output with Unity Gain. This Circuit Works Well if the VOFFSET Source Impedance Is Low. V1 1 8 V2 4 5 VOUT = V1 + V2 + –VS 2 A way around this is to apply the offset voltage to a voltage divider whose attenuation factor matches the gain of the amplifier and then apply this voltage to the high impedance REF input. This circuit first divides the desired offset voltage by the gain, and the amplifier multiplies it back up to unity (see Figure 140). +V 0.1μF –V 10μF Figure 142. A Summing Circuit that is Noninverting with High Input Impedance AD8129/ AD8130 3 7 0.1μF 1 8 10μF VIN VOFFSET RF RG + PD +VS 6 4 5 + –VS 2 VOUT = VIN × (1 + RF/RG) + VOFFSET This circuit offers several advantages over a conventional op amp inverting summing circuit. First, the inputs are both high impedance and the circuit is noninverting. It would require significant additional circuitry to make an op amp summing circuit that has high input impedance and is noninverting. Another advantage is that the AD8130 circuit still preserves the full bandwidth of the part. In a conventional summing circuit, the noise gain is increased for each additional input, so the bandwidth response decreases accordingly. By this technique, four signals can be summed by applying them to two AD8130s and then summing the two outputs by a third AD8130. RG RF –V 0.1μF Figure 140. Adding an Attenuator at the Offset Input Causes It to Appear at the Output with Unity Gain. 02464-141 10μF RESISTORLESS GAIN OF 2 The voltage applied to the REF input (Pin 4) can also be a high bandwidth signal. If a unity-gain AD8130 has both +IN and REF driven with the same signal, there is unity gain from VIN and unity gain from VREF. Thus, the circuit has a gain of 2 and requires no resistors (see Figure 141). CABLE-TAP AMPLIFIER It is often desirable to have a video signal drive several pieces of equipment. However, the cable should only be terminated once at its endpoint; therefore, it is not appropriate to have a termination at each device. A loop-through connection allows a device to tap the video signal while not disturbing it by any excessive loading. Rev. C | Page 35 of 40 02464-143 02464-142 10μF AD8129/AD8130 Such a connection, also referred to as a cable-tap amplifier, can be simply made with an AD8130 (see Figure 143). The circuit is configured with unity gain, and if no output offset is desired, the REF pin is grounded. The negative differential input is connected directly to the shield of the cable (or an associated connector) at the point at which it wants to be tapped. +V EXTREME OPERATING CONDITIONS The AD8129/AD8130 are designed to provide high performance over a wide range of supply voltages. However, there are some extremes of operating conditions that have been observed to produce suboptimal results. One of these conditions occurs when the AD8130 is operated at unity gain with low supply voltage—less than approximately ±4 V. At unity gain, the output drives FB directly. With supplies of ±VS less than approximately ±4 V at unity gain, the output can drive FB’s voltage too close to the rail for the circuit to stay properly biased. This can lead to a parasitic oscillation. A way to prevent this is to limit the input signal swing with clamp diodes. Common silicon-junction signal diodes like the 1N4148 have a forward bias of approximately 0.7 V when about 1 mA of current flows through them. Two series pairs of such diodes connected antiparallel across the differential inputs can be used to clamp the input signal and prevent this condition. It should be noted that the REF input can also shift the output signal; therefore, this technique only works when REF is at ground or close to it (see Figure 145). +V AD8130 75Ω 3 1 8 6 4 5 7 0.1μF 10μF + PD +VS VOUT + –VS 2 0.1μF –V 75Ω Figure 143. The AD8130 Can Tap the Video Signal at Any Point Along the Cable Without Loading the Signal. The center conductor connects to the positive differential input of the AD8130. The amplitude of the video signal at this point is unity, because it is between the two termination resistors. The AD8130 provides a high impedance to this signal so that the signal is not disturbed. A buffered unity-gain version of the video signal appears at the output. 02464-144 VIDEO IN 10μF AD8130 VIN 1N4148 1 8 6 3 7 0.1μF 10μF + PD +VS VOUT POWER-DOWN The AD8129/AD8130 have a power-down pin that can be used to lower the quiescent current when the amplifier is not being used. A logic low level on the PD pin causes the part to power down. Because there is no ground pin on the AD8129/AD8130, there is no logic reference to interface to standard logic levels. For this reason, the reference level for the PD input is VS. If the AD8129/AD8130 are run with VS = 5 V, there is direct compatibility with logic families. However, if VS is higher than this, a level-shift circuit is needed to interface to conventional logic levels. A simple level-shifting circuit that is compatible with common logic families is presented in Figure 144. +VS VIN 4 5 + –VS 2 –V 0.1μF 10μF Figure 145. Clamping Diodes at the Input Limits the Input Swing Amplitude 1kΩ 4.99kΩ 3 PD 7 +VS 2N2222 OR EQ Figure 144. Circuit that Shifts the Logic Level When VS Is Not Equal to Approximately 5 V. 02464-145 LOW = POWER-DOWN AD8129/ AD8130 Rev. C | Page 36 of 40 02464-146 AD8129/AD8130 Another problem can occur with the AD8129 operating at a supply voltage of greater than or equal to ±12 V. The architecture causes the supply current to increase as the input differential voltage increases. If the AD8129 differential inputs are overdriven too far, excessive current can flow into the device and potentially cause permanent damage. A practical means to prevent this from occurring is to clamp the inputs differentially with a pair of antiparallel Schottky diodes (see Figure 146). These diodes have a lower forward voltage of approximately 0.4 V. If the differential voltage across the inputs is restricted to these conditions, no excess current is drawn by the AD8129 under these operating conditions. If the supply voltage is restricted to less than ±11 V, the internal clamping circuit limits the differential voltage and excessive supply current is not drawn. The external clamp circuit is not needed. +V The power dissipation is a function of several operating conditions, including the supply voltage, the input differential voltage, the output load, and the signal frequency. A basic starting point is to calculate the quiescent power dissipation with no signal and no differential input voltage. This is just the product of the total supply voltage and the quiescent operating current. The maximum operating supply voltage is 26.4 V, and the quiescent current is 13 mA. This causes a quiescent power dissipation of 343 mW. For the MSOP package, the θJA specification is 142°C/W. Therefore, the quiescent power causes about a 49°C rise above ambient in the MSOP package. The current consumption is also a function of the differential input voltage (see Figure 113 and Figure 114). This current should be added onto the quiescent current and then multiplied by the total supply voltage to calculate the power. The AD8129/AD8130 can directly drive loads of as low as 100 Ω, such as a terminated 50 Ω cable. The worst-case power dissipation in the output stage occurs when the output is at midsupply. As an example, for a 12 V supply with the output driving a 250 Ω load to ground, the maximum power dissipation in the output occurs when the output voltage is 6 V. The load current is 6 V/250 Ω = 24 mA. This same current flows through the output across a 6 V drop from VS. It dissipates 144 mW. For the 8-lead MSOP package, this causes a temperature rise of 20°C above ambient. Although this is a worst-case number, it is apparent that this can be a considerable additional amount of power dissipation. Several changes can be made to alleviate this. One is to use the standard 8-lead SOIC package. This lowers the thermal impedance to 121°C/W, which is a 15% improvement. Another is to use a lower supply voltage unless absolutely necessary. Finally, do not use the AD8129/AD8130 when it is operating on high supply voltages to directly drive a heavy load. It is best to use a second op amp after the output stage. Some of the gain can be shifted to this stage so that the signal swing at the output of the AD8129/AD8130 is not too large. AD8129 VIN AGILENT HSMS 2822 VIN 1 2 0.1μF 3 1 8 6 4 5 3 7 10μF + PD +VS VOUT + –VS 2 0.1μF –V Figure 146. Schottky Diodes Across the Inputs Limits the Input Differential Voltage In both circuits, the input series resistors function to limit the current through the diodes when they are forward biased. As a practical matter, these resistors must be matched so that the CMRR is preserved at high frequencies. These resistors have minimal effect on the CMRR at low frequency. POWER DISSIPATION The AD8129/AD8130 can operate with supply voltages from +5 V to ±12 V. The major reason for such a wide supply range is to provide a wide input common-mode range for systems that can require this. This would be encountered when significant common-mode noise couples into the input path. For applications that do not require a wide dynamic range for the input or output, it is recommended to operate with lower supply voltages. The AD8129/AD8130 is also available in a very small 8-lead MSOP package. This package has higher thermal impedance than larger packages and operates at a higher temperature with the same amount of power dissipation. Certain operating conditions that are within the specifications range of the parts can cause excess power dissipation. Caution should be exercised. 02464-147 10μF Rev. C | Page 37 of 40 AD8129/AD8130 LAYOUT, GROUNDING, AND BYPASSING The AD8129/AD8130 are very high speed parts that can be sensitive to the PCB environment in which they operate. Realizing their superior specifications requires attention to various details of standard high speed PCB design practice. The first requirement is for a good solid ground plane that covers as much of the board area around the AD8129/AD8130 as possible. The only exception to this is that the ground plane around the FB pin should be kept a few millimeters away, and the ground should be removed from the inner layers and the opposite side of the board under this pin. This minimizes the stray capacitance on this node and helps preserve the gain flatness vs. frequency. The power supply pins should be bypassed as close as possible to the device to the nearby ground plane. Good high frequency ceramic chip capacitors should be used, and the bypassing should be done with a capacitance value of 0.01 μF to 0.1 μF for each supply. Farther away, low frequency bypassing should be provided with 10 μF tantalum capacitors from each supply to ground. The signal routing should be short and direct to avoid parasitic effects. Where possible, signals should be run over ground planes to avoid radiating or to avoid being susceptible to other radiation sources. Rev. C | Page 38 of 40 AD8129/AD8130 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 4 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) × 45° 0.25 (0.0099) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 147. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 3.20 3.00 2.80 8 5 1 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8° 0° 0.80 0.60 0.40 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 148. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 39 of 40 AD8129/AD8130 ORDERING GUIDE Model AD8129AR AD8129AR-REEL AD8129AR-REEL7 AD8129ARZ 2 AD8129ARZ-REEL2 AD8129ARZ-REEL72 AD8129ARM AD8129ARM-REEL AD8129ARM-REEL7 AD8129ARMZ2 AD8129ARMZ-REEL2 AD8129ARMZ-REEL72 AD8130AR AD8130AR-REEL AD8130AR-REEL7 AD8130ARZ2 AD8130ARZ-REEL2 AD8130ARZ-REEL72 AD8130ARM AD8130ARM-REEL AD8130ARM-REEL7 AD8130ARMZ2 AD8130ARMZ-REEL2 AD8130ARMZ-REEL72 1 2 Temperature Range 1 −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding HQA HQA HQA HQA# HQA# HQA# HPA HPA HPA HPA# HPA# HPA# Operating temperature range for ±5 V or +5 V operation is −40°C to +125°C. Z = Pb-free part; # indicates lead-free, may be top or bottom marked. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02464–0–11/05(C) Rev. C | Page 40 of 40