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AD818ANZ

AD818ANZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    DIP8

  • 描述:

    IC VIDEO OPAMP 130MHZ LP 8-DIP

  • 数据手册
  • 价格&库存
AD818ANZ 数据手册
Low Cost, Low Power Video Op Amp AD818 FEATURES Low Cost Excellent Video Performance 55 MHz 0.1 dB Bandwidth (Gain = +2) 0.01% and 0.05ⴗ Differential Gain and Phase Errors High Speed 130 MHz Bandwidth (3 dB, G = +2) 100 MHz Bandwidth (3 dB, G+ = –1) 500 V/␮s Slew Rate 80 ns Settling Time to 0.01% (VO = 10 V Step) High Output Drive Capability 50 mA Minimum Output Current Ideal for Driving Back Terminated Cables Flexible Power Supply Specified for Single (+5 V) and Dual (ⴞ5 V to ⴞ15 V) Power Supplies Low Power: 7.5 mA Max Supply Current Available in 8-Lead SOIC and 8-Lead PDIP GENERAL DESCRIPTION The AD818 is a low cost video op amp optimized for use in video applications that require gains equal to or greater than +2 or –1. The AD818’s low differential gain and phase errors, single supply functionality, low power, and high output drive make it ideal for cable driving applications such as video cameras and professional video equipment. With video specs like 0.1 dB flatness to 55 MHz and low differential gain and phase errors of 0.01% and 0.05∞, along with 50 mA of output current, the AD818 is an excellent choice for CONNECTION DIAGRAM 8-Lead Plastic Mini-DIP (N) and SOIC (R) Packages NULL 1 –IN 8 NULL 2 7 +VS +IN 3 6 OUTPUT –VS 4 5 NC AD818 TOP VIEW NC = NO CONNECT any video application. The 130 MHz 3 dB bandwidth (G = +2) and 500 V/ms slew rate make the AD818 useful in many high speed applications including video monitors, CATV, color copiers, image scanners, and fax machines. The AD818 is fully specified for operation with a single +5 V power supply and with dual supplies from ± 5 V to ± 15 V. This power supply flexibility, coupled with a very low supply current of 7.5 mA and excellent ac characteristics under all power supply conditions, make the AD818 the ideal choice for many demanding yet power sensitive applications. The AD818 is a voltage feedback op amp and excels as a gain stage in high speed and video systems (gain ≥ 2, or gain £ –1). It achieves a settling time of 45 ns to 0.1%, with a low input offset voltage of 2 mV max. +15V 0.01␮F 0.02 2.2␮F DIFF GAIN 0.01 AD818 75⍀ RT 75⍀ 0.1␮F 2.2␮F –15V 1k⍀ 1k⍀ DIFFERENTIAL PHASE (Degrees) RBT 75⍀ VIN 0.00 0.06 DIFFERENTIAL GAIN (%) The AD818 is available in low cost, small 8-lead PDIP and SOIC packages. 0.05 DIFF PHASE 0.04 0.03 5 10 SUPPLY VOLTAGE (ⴞV) 15 Figure 1. Video Line Driver Figure 2. Differential Gain and Phase vs. Supply Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781.461-3113 ©2010 Analog Devices, Inc. All rights reserved. REV. D AD818–SPECIFICATIONS (@ TA = 25ⴗC, unless otherwise noted.) Parameter Conditions VS Min DYNAMIC PERFORMANCE –3 dB Bandwidth Gain = +2 ±5 V ± 15 V 0 V, +5 V ±5 V ± 15 V 0 V, +5 V ±5 V ± 15 V 0 V, +5 V ±5 V ± 15 V 0 V, +5 V 70 100 40 50 70 30 20 40 10 18 40 10 Gain = –1 Bandwidth for 0.1 dB Flatness Gain = +2 CC = 2 pF Gain = –1 CC = 2 pF Full Power Bandwidth* Slew Rate Settling Time to 0.1% VOUT = 5 V p-p RLOAD = 500 W VOUT = 20 V p-p RLOAD = 1 kW RLOAD = 1 kW Gain = –1 Total Harmonic Distortion Differential Gain Error (RL = 150 W) –2.5 V to +2.5 V 0 V–10 V Step, AV = –1 –2.5 V to +2.5 V 0 V–10 V Step, AV = –1 FC = 1 MHz NTSC Gain = +2 Differential Phase Error (RL = 150 W) NTSC Gain = +2 Settling Time to 0.01% ±5 V ± 15 V ±5 V ± 15 V 0 V, +5 V ±5 V ± 15 V ±5 V ± 15 V ± 15 V ± 15 V ±5 V 0 V, +5 V ± 15 V ±5 V 0 V, +5 V 350 450 250 Cap Load Drive ± 5 V to ± 15 V INPUT OFFSET VOLTAGE AD818A Typ MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz 25.5 MHz 8.0 400 500 300 45 45 80 80 63 0.005 0.01 0.08 0.045 0.06 0.1 10 MHz V/ms V/ms V/ms ns ns ns ns dB % % % Degrees Degrees Degrees pF 0.5 INPUT OFFSET CURRENT 2 3 mV mV mV/∞C 3.3 6.6 10 4.4 mA mA mA ± 5 V, ± 15 V 25 300 500 nA nA nA/∞C TMIN to TMAX Offset Current Drift COMMON-MODE REJECTION 0.09 0.09 ± 5 V, ± 15 V TMIN TMAX OPEN-LOOP GAIN 0.01 0.02 10 INPUT BIAS CURRENT Unit 95 130 55 70 100 50 43 55 18 34 72 19 TMIN to TMAX Offset Drift Max 0.3 VOUT = ± 2.5 V RLOAD = 500 W TMIN to TMAX RLOAD = 150 W VOUT = ± 10 V RLOAD = 1 kW TMIN to TMAX VOUT = ± 7.5 V RLOAD = 150 W (50 mA Output) ±5 V VCM = ± 2.5 V VCM = ± 12 V TMIN to TMAX ±5 V ± 15 V ± 15 V ± 15 V ± 15 V –2– 3 2 2 5 6 3 9 V/mV V/mV 3 5 V/mV 82 86 84 100 120 100 dB dB dB 4 V/mV V/mV V/mV REV. D AD818 Parameter Conditions POWER SUPPLY REJECTION VS = ± 5 V to ± 15 V TMIN to TMAX INPUT VOLTAGE NOISE f = 10 kHz INPUT CURRENT NOISE f = 10 kHz VS Min Max Unit 90 dB dB ± 5 V, ± 15 V 10 nV/÷Hz ± 5 V, ± 15 V 1.5 pA/÷Hz +3.8 –2.7 +13 –12 +3.8 +1.2 +4.3 –3.4 +14.3 –13.4 +4.3 +0.9 V V V V V V 3.3 3.2 13.3 12.8 1.5, 3.5 50 50 30 3.8 3.6 13.7 13.4 90 ±V ±V ±V ±V V mA mA mA mA INPUT RESISTANCE 300 kW INPUT CAPACITANCE 1.5 pF 8 W INPUT COMMON-MODE VOLTAGE RANGE 80 80 AD818A Typ ±5 V ± 15 V 0 V, +5 V OUTPUT VOLTAGE SWING RLOAD = 500 W RLOAD = 150 W RLOAD = 1 kW RLOAD = 500 W RLOAD = 500 W Output Current Short-Circuit Current OUTPUT RESISTANCE POWER SUPPLY Operating Range ±5 V ±5 V ± 15 V ± 15 V 0 V, +5 V ± 15 V ±5 V 0 V, +5 V ± 15 V Open Loop Dual Supply Single Supply Quiescent Current TMIN to TMAX TMIN to TMAX ±5 V ±5 V ± 15 V ± 15 V *Full power bandwidth = slew rate/(2p VPEAK). Specifications subject to change without notice. REV. D –3– ± 2.5 +5 7.0 7.0 ± 18 +36 7.5 7.5 7.5 7.5 V V mA mA mA mA AD818 ABSOLUTE MAXIMUM RATINGS 1 2.0 TJ = 150 C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V Output Short-Circuit Duration . . . . . . . . See Derating Curves Storage Temperature Range (N, R) . . . . . . . . –65∞C to +125∞C Operating Temperature Range . . . . . . . . . . . . –40∞C to +85∞C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300∞C MAXIMUM POWER DISSIPATION (W) 8-LEAD MINI-DIP PACKAGE NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-lead plastic package, ␪JA = 90∞C/W; 8-lead SOIC package, ␪JA = 155∞C/W. 1.5 1.0 0.5 8-LEAD SOIC PACKAGE 0 –50 –40 –30 –20 –10 10 0 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE (ⴗC) Figure 3. Maximum Power Dissipation vs. Temperature for Different Package Types CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD818 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. METALLIZATION PHOTOGRAPH Dimensions shown in inches and (mm) OFFSET OFFSET NULL NULL 1 8 +VS 7 –INPUT 2 0.0523 (1.33) 6 OUTPUT +INPUT 3 4 –VS 0.0559 (1.42) –4– REV. D Typical Performance Characteristics–AD818 20 OUTPUT VOLTAGE SWING (ⴞV) INPUT COMMON-MODE RANGE (ⴞV) 20 15 +VCM 10 –VCM 5 0 15 RL = 500⍀ 10 RL = 150⍀ 5 0 0 5 10 15 20 0 5 SUPPLY VOLTAGE (ⴞV) TPC 1. Common-Mode Voltage Range vs. Supply 8.0 QUIESCENT SUPPLY CURRENT (mA) OUTPUT VOLTAGE SWING (V p-p) 25 VS = ⴞ15V 20 15 10 VS = ⴞ5V 5 0 10 7.5 +85ⴗC +25ⴗC 7.0 –40ⴗC 6.5 6.0 100 1k LOAD RESISTANCE (⍀) 10k 0 5 10 15 20 SUPPLY VOLTAGE (ⴞV) TPC 2. Output Voltage Swing vs. Load Resistance TPC 5. Quiescent Supply Current vs. Supply Voltage 600 CLOSED-LOOP OUTPUT IMPEDANCE (⍀) 100 500 SLEW RATE (V/␮s) 20 15 TPC 4. Output Voltage Swing vs. Supply 30 400 300 200 0 5 10 15 10 1 0.1 0.01 1k 20 SUPPLY VOLTAGE (ⴞV) 10k 100k 1M 10M 100M FREQUENCY (Hz) TPC 3. Slew Rate vs. Supply Voltage REV. D 10 SUPPLY VOLTAGE (ⴞV) TPC 6. Closed-Loop Output Impedance vs. Frequency –5– AD818 7 130 SHORT CIRCUIT CURRENT (mA) 5 4 3 2 1 –60 –40 –20 0 20 40 60 TEMPERATURE (ⴗC) 80 100 120 SOURCE CURRENT 90 SINK CURRENT 70 50 30 –60 140 –40 –20 0 20 40 60 80 100 70 140 TPC 10. Short-Circuit Current vs. Temperature 100 100 95 PHASE ⴞ5V OR ⴞ15V SUPPLIES 80 80 50 75 GAIN/BANDWIDTH 40 65 –3dB BANDWIDTH (MHz) 85 OPEN-LOOP GAIN (dB) PHASE MARGIN 60 ⴞ15V SUPPLIES RL = 1k⍀ 60 60 40 40 ⴞ5V SUPPLIES RL = 1k⍀ 20 20 0 0 30 –60 120 TEMPERATURE (ⴗC) TPC 7. Input Bias Current vs. Temperature –20 55 140 TEMPERATURE (ⴗC) 100k 1M 10M FREQUENCY (Hz) TPC 8. –3 dB Bandwidth and Phase Margin vs. Temperature, Gain = +2 TPC 11. Open-Loop Gain and Phase Margin vs. Frequency –40 –20 0 20 40 60 80 100 120 1k 8 10k 100M 1G 100 9 90 ⴞ15V 80 +SUPPLY 7 70 ⴞ5V PSR (dB) OPEN-LOOP GAIN (V/mV) PHASE MARGIN (Degrees) 110 PHASE MARGIN (Degrees) INPUT BIAS CURRENT (␮A) 6 6 60 –SUPPLY 50 40 5 30 4 20 3 100 1k 10 100 10k LOAD RESISTANCE (⍀) 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M TPC 12. Power Supply Rejection vs. Frequency TPC 9. Open-Loop Gain vs. Load Resistance –6– REV. D AD818 30 120 OUTPUT VOLTAGE (V p-p) RL = 1k⍀ CMR (dB) 100 80 60 10k 100k FREQUENCY (Hz) 10M 1M RL = 150⍀ 10 0 100k 40 1k 20 TPC 13. Common-Mode Rejection vs. Frequency 1M 100M TPC 16. Output Voltage vs. Frequency 10 –40 RL = 150⍀ 2V p-p 8 –50 6 HARMONIC DISTORTION (dB) OUTPUT SWING FROM 0 TO ⴞV (V) 10M FREQUENCY (Hz) 4 1% 0.1% 0.01% 2 0 –2 1% 0.01% 0.1% –4 –6 –60 –70 SECOND HARMONIC –80 THIRD HARMONIC –90 –8 –10 0 20 40 60 80 100 SETTLING TIME (ns) 120 140 –100 100 160 10k 100k 1M 10M FREQUENCY (Hz) TPC 14. Output Swing and Error vs. Settling Time TPC 17. Harmonic Distortion vs. Frequency 50 650 40 550 SLEW RATE (V/␮s) INPUT VOLTAGE NOISE (nV/ Hz) 1k 30 20 350 10 0 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 250 –60 10M TPC 15. Input Voltage Noise Spectral Density vs. Frequency REV. D 450 –40 –20 0 20 40 60 80 TEMPERATURE (ⴗC) 100 120 TPC 18. Slew Rate vs. Temperature –7– 140 AD818 CF 0.02 1k⍀ 0.01 +VS 3.3␮F 0.00 0.06 0.05 DIFF PHASE 0.04 DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE (Degrees) DIFF GAIN 0.01␮F HP VIN 1k⍀ PULSE (LS) OR FUNCTION (SS) GENERATOR 50⍀ AD818 VOUT TEKTRONIX P6201 FET PROBE TEKTRONIX 7A24 PREAMP 0.01␮F RL 0.03 5 10 SUPPLY VOLTAGE (ⴞV) 15 3.3␮F –VS TPC 19. Differential Gain and Phase vs. Supply Voltage 10 VS CC 0.1dB FLATNESS 2V ⴞ15V 2pF 55MHz ⴞ5V 1pF 43MHz +5V 1pF 18MHz 9 8 GAIN (dB) CC TPC 22. Inverting Amplifier Connection 1k⍀ 1k⍀ VOUT 100 90 AD818 VIN 50ns 150⍀ 7 6 5 ⴞ15V ⴞ5V 4 10 3 0% +5V 2 2V 1 1M 10M 100M FREQUENCY (Hz) 1G TPC 20. Closed-Loop Gain vs. Frequency (G = +2) TPC 23. Inverter Large Signal Pulse Response; VS = ± 5 V, CF = 1 pF, RL = 1 kW 10 8 6 4 VS 0.1dB FLATNESS ⴞ15V ⴞ5V +5V 72MHz 34MHz 19MHz 2pF 200mV 1k⍀ 1k⍀ VIN GAIN (dB) 100 90 VOUT AD818 2 10ns 150⍀ 0 –2 ⴞ15V +5V –4 10 –6 0% ⴞ5V –8 200mV –10 1M 10M 100M FREQUENCY (Hz) 1G TPC 24. Inverter Small Signal Pulse Response; VS = ± 5 V, CF = 1 pF, RL = 150 W TPC 21. Closed-Loop Gain vs. Frequency (G = –1) –8– REV. D AD818 CF 1k⍀ 5V 50ns 1k⍀ +VS 3.3␮F 100 90 0.01␮F HP VIN 100⍀ PULSE (LS) OR FUNCTION (SS) GENERATOR 50⍀ 10 0% AD818 VOUT TEKTRONIX P6201 FET PROBE TEKTRONIX 7A24 PREAMP 0.01␮F 5V RL 3.3␮F –VS TPC 25. Inverter Large Signal Pulse Response; VS = ± 15 V, CF = 1 pF, RL = 1 kW 200mV TPC 28. Noninverting Amplifier Connection 10ns 1V 100 100 90 90 10 10 0% 0% 200mV 2V TPC 26. Inverter Small Signal Pulse Response; VS = ± 15 V, CF = 1 pF, RL = 150 W 200mV TPC 29. Noninverting Large Signal Pulse Response; VS = ± 5 V, CF = 1 pF, RL = 1 kW 10ns 100mV 100 10ns 100 90 90 10 10 0% 0% 200mV 200mV TPC 27. Inverter Small Signal Pulse Response; VS = ± 5 V, CF = 0 pF, RL = 150 W REV. D 50ns TPC 30. Noninverting Small Signal Pulse Response; VS = ± 5 V, CF = 1 pF, RL = 150 W –9– AD818 5V 50ns 100mV 100 100 90 90 10 10 0% 0% 5V 200mV TPC 31. Noninverting Large Signal Pulse Response; VS = ± 15 V, CF = 1 pF, RL = 1 kW 100mV 10ns TPC 33. Noninverting Small Signal Pulse Response; VS = ± 5 V, CF = 0 pF, RL = 150 W 10ns 100 90 10 0% 200mV TPC 32. Noninverting Small Signal Pulse Response; VS = ± 15 V, CF = 1 pF, RL = 150 W –10– REV. D AD818 may result in peaking. A small capacitance (1 pF–5 pF) may be used in parallel with the feedback resistor to neutralize this effect. +VS Power supply leads should be bypassed to ground as close as possible to the amplifier pins. Ceramic disc capacitors of 0.1 mF are recommended. OUTPUT +VS –IN AD818 +IN 10k⍀ –VS NULL 1 VOS ADJUST –VS NULL 8 Figure 5. Offset Null Configuration Figure 4. AD818 Simplified Schematic OFFSET NULLING THEORY OF OPERATION The AD818 is a low cost video operational amplifier designed to excel in high performance, high output current video applications. The AD818 (Figure 4) consists of a degenerated NPN differential pair driving matched PNPs in a folded-cascode gain stage. The output buffer stage employs emitter followers in a class AB amplifier that delivers the necessary current to the load, while maintaining low levels of distortion. The input offset voltage of the AD818 is inherently very low. However, if additional nulling is required, the circuit shown in Figure 5 can be used. The null range of the AD818 in this configuration is ± 10 mV. SINGLE SUPPLY OPERATION Another exciting feature of the AD818 is its ability to perform well in a single supply configuration. The AD818 is ideally suited for applications that require low power dissipation and high output current. The AD818 will drive terminated cables and capacitive loads of 10 pF or less. As the closed-loop gain is increased, the AD818 will drive heavier capacitive loads without oscillating. Referring to Figure 6, careful consideration should be given to the proper selection of component values. The choices for this particular circuit are: R1 + R3储R2 combine with C1 to form a low frequency corner of approximately 10 kHz. C4 was inserted in series with R4 to maintain amplifier stability at high frequency. INPUT CONSIDERATIONS An input protection resistor (RIN in TPC 28) is required in circuits where the input to the AD818 will be subjected to transients of continuous overload voltages exceeding the ± 6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current. Combining R3 with C2 forms a low-pass filter with a corner frequency of approximately 500 Hz. This is needed to maintain amplifier PSRR, since the supply is connected to VIN through the input divider. The values for R2 and C2 were chosen to demonstrate the AD818’s exceptional output drive capability. In this configuration, the output is centered around 2.5 V. In order to eliminate the static dc current associated with this level, C3 was inserted in series with R L. For high performance circuits, it is recommended that a “balancing” resistor be used to reduce the offset errors caused by bias current flowing through the input and feedback resistors. The balancing resistor equals the parallel combination of RIN and RF and thus provides a matched impedance at each input terminal. The offset voltage error will then be reduced by more than an order of magnitude. VS R3 100⍀ GROUNDING AND BYPASSING When designing high frequency circuits, some special precautions are in order. Circuits must be built with short interconnect leads. When wiring components, care should be taken to provide a low resistance, low inductance path to ground. Sockets should be avoided, since their increased interlead capacitance can degrade circuit bandwidth. Feedback resistors should be of low enough value (£1 kW) to ensure that the time constant formed with the inherent stray capacitance at the amplifier’s summing junction will not limit performance. This parasitic capacitance, along with the parallel resistance of RF储RIN, forms a pole in the loop transmission, which REV. D –11– C2 3.3␮F R4 1k⍀ 1k⍀ 3.3␮F SELECT C1, R1, R2 FOR DESIRED LOW FREQUENCY CORNER. C4 0.001␮F 0.01␮F R1 3.3k⍀ C1 0.01␮F AD818 VIN R2 3.3k⍀ VOUT C3 0.1␮F RL 150⍀ Figure 6. Single-Supply Amplifier Configuration AD818 2ⴛ HP2835 ERROR SIGNAL OUTPUT 1M⍀ 2ⴛ HP2835 ERROR AMPLIFIER VERROR OUTPUT ⴛ 10 100⍀ AD829 15pF SHORT, DIRECT CONNECTION TO TEKTRONIX TYPE 11402 OSCILLOSCOPE PREAMP INPUT SECTION 0.47␮F 0 TO ⴞ10V POWER SUPPLY 0.01␮F EI&S DL1A05GM MERCURY RELAY NULL ADJUST 7, 8 TTL LEVEL SIGNAL GENERATOR 50Hz OUTPUT 1, 14 1k⍀ 50⍀ COAX CABLE FALSE SUMMING NODE 100⍀ +VS 1.9k⍀ NOTE USE CIRCUIT BOARD WITH GROUND PLANE 100⍀ 5pF–18pF 500⍀ DEVICE UNDER TEST AD818 50⍀ 2.2␮F 2.2␮F –VS 1k⍀ 500⍀ DIGITAL GROUND ANALOG GROUND 0.01␮F 0.47␮F 0.01␮F 10pF SCOPE PROBE CAPACITANCE TEKTRONIX P6201 FET PROBE TO TEKTRONIX TYPE 11402 OSCILLOSCOPE PREAMP INPUT SECTION –VS 0.01␮F +VS Figure 7. Settling Time Test Circuit AD818 SETTLING TIME A High Performance Video Line Driver Settling time primarily comprises two regions. The first is the slew time in which the amplifier is overdriven, where the output voltage rate of change is at its maximum. The second is the linear time period required for the amplifier to settle to within a specified percentage of the final value. The buffer circuit shown in Figure 8 will drive a back-terminated 75 W video line to standard video levels (1 V p-p) with 0.1 dB gain flatness to 55 MHz with only 0.05∞ and 0.01% differential phase and gain at the 3.58 MHz NTSC subcarrier frequency. This level of performance, which meets the requirements for high definition video displays and test equipment, is achieved using only 7 mA quiescent current. Measuring the rapid settling time of the AD818 (45 ns to 0.1% and 80 ns to 0.01%—10 V step) requires applying an input pulse with a very fast edge and an extremely flat top. With the AD818 configured in a gain of –1, a clamped false summing junction responds when the output error is within the sum of two diode voltages (approximately 1 V). The signal is then amplified 20 times by a clamped amplifier whose output is connected directly to a sampling oscilloscope. +15V 0.01␮F 2.2␮F RBT 75⍀ VIN RT 75⍀ AD818 75⍀ RT 75⍀ 0.01␮F 2.2␮F –15V 1k⍀ 1k⍀ Figure 8. Video Line Driver –12– REV. D AD818 DIFFERENTIAL LINE RECEIVER A HIGH SPEED, 3-OP AMP IN AMP The differential receiver circuit of Figure 9 is useful for many applications—from audio to video. It allows extraction of a low level signal in the presence of common-mode noise, as shown in Figure 10. The circuit of Figure 11 uses three high speed op amps: two AD818s and an AD817. This high speed circuit lends itself well to CCD imaging and other video speed applications. It has the optional flexibility of both dc and ac trims for common-mode rejection, plus the ability to adjust for minimum settling time. 2pF 1k⍀ 1k⍀ VB +15V +5V +VS 10␮F 0.1␮F 10␮F 0.1␮F EACH AMPLIFIER PIN 7 EACH AMPLIFIER 1␮F 0.1␮F 2.2␮F 0.01␮F COMMON AD818 DIFFERENTIAL INPUT OUTPUT VOUT 0.01␮F –15V PIN 4 EACH AMPLIFIER –VS 2.2␮F –5V 1k⍀ 0.1␮F 1␮F –VIN A1 1k⍀ AD818 VA 2pF–8pF SETTLING TIME AC CMR ADJUST 2pF 1k⍀ 1k⍀ Figure 9. Differential Line Receiver 1k⍀ 5pF 90 RL 2k⍀ 1k⍀ 1V AD818 1k⍀ 5pF 100 VOUT A3 RG 2pF 3pF 20ns 970⍀ A2 50⍀ DC CMR ADJUST AD818 VA +VIN BANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN 10 2V 0% OUTPUT Figure 10. Performance of Line Receiver, RL = 150 W, G = +2 REV. D CADJ (pF) GAIN RG 3 10 100 1k⍀ 2–8 222⍀ 2–8 20⍀ 2–8 SMALL SIGNAL BANDWIDTH SETTLING TIME TO 0.1% THD + NOISE BELOW INPUT LEVEL @ 10kHz 14.7MHz 4.5MHz 960kHz 200ns 370ns 2.5␮s 82dB 81dB 71dB Figure 11. High Speed 3-Op Amp In Amp –13– AD818 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 1 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) BSC 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.210 (5.33) MAX 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX 0.005 (0.13) MIN 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 070606-A COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 12. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 1 5 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 13. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) –14– REV. D AD818 ORDERING GUIDE Model1 AD818AN AD818ANZ AD818AR AD818ARZ AD818AR-REEL AD818ARZ-REEL AD818AR-REEL7 AD818ARZ-REEL7 AD818AR-EBZ 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Plastic PDIP 8-Lead Plastic PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N, 13’’ Tape and Reel 8-Lead SOIC_N, 13’’ Tape and Reel 8-Lead SOIC_N, 7’’ Tape and Reel 8-Lead SOIC_N, 7’’ Tape and Reel Evaluation Board for 8-lead SOIC_N Z = RoHS Compliant Part. REVISION HISTORY 10/10—Rev. C to Rev. D Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 5/03—Rev. B to Rev. C Renumbered Figures and TPCs ........................................ Universal Changes to Specifications ................................................................ 2 Changes to Ordering Guide ............................................................ 4 Changes to Figures 9 and 10 ......................................................... 12 Updated Outline Dimensions ....................................................... 14 ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00872-0-10/10(D) REV. D –15– Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8
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