AD8231

Zero Drift, Digitally Programmable Instrumentation Amplifier AD8231 FEATURES Digitally/pin programmable gain G = 1, 2, 4, 8, 16, 32, 64, 128 Specified from −40°C to +125°C 50 nV/°C maximum input offset drift 10 ppm/°C maximum gain drift Excellent dc performance 80 dB minimum CMR, G = 1 15 μV maximum input offset voltage 500 pA maximum bias current 0.7 μV p-p noise (0.1 Hz to 10 Hz) Good ac performance 2.7 MHz bandwidth, G = 1 1.1 V/μs slew rate Rail-to-rail input and output Shutdown/multiplex Extra op amp Single supply range: 3 V to 6 V Dual supply range: ±1.5 V to ±3 V FUNCTIONAL BLOCK DIAGRAM 16 15 14 13 CS A2 A1 A0 NC –INA +INA NC 1 2 3 4 LOGIC 12 11 10 9 +VS –VS OUTA REF IN-AMP AD8231 5 6 SDN OP AMP 7 8 OUTB +INB –INB Figure 1. Table 1. Instrumentation/Difference Amplifiers by Category High Performance AD8221 AD82201 AD8222 AD82241 Low Cost AD623 1 AD85531 High Voltage AD628 AD629 Mil Grade AD620 AD621 AD524 AD526 AD624 Low Power AD6271 Digital Gain AD82311 AD8250 AD8251 AD85551 AD85561 AD85571 APPLICATIONS Pressure and strain transducers Thermocouples and RTDs Programmable instrumentation Industrial controls Weigh scales 1 Rail-to-rail output. GENERAL DESCRIPTION The AD8231 is a low drift, rail-to-rail, instrumentation amplifier with software programmable gains of 1, 2, 4, 8, 16, 32, 64, or 128. The gains are programmed via digital logic or pin strapping. The AD8231 is ideal for applications that require precision performance over a wide temperature range, such as industrial temperature sensing and data logging. Because the gain setting resistors are internal, maximum gain drift is only 10 ppm/°C. Because of the auto-zero input stage, maximum input offset is 15 μV and maximum input offset drift is just 50 nV/°C. CMRR is also guaranteed over temperature at 80 dB for G = 1, increasing to 110 dB at higher gains. The AD8231 also includes an uncommitted op amp that can be used for additional gain, differential signal driving or filtering. Like the in-amp, the op amp has an auto-zero architecture, railto-rail input, and rail-to-rail output. The AD8231 includes a shutdown feature that reduces current to a maximum of 1 μA. In shutdown, both amplifiers also have a high output impedance. This allows easy multiplexing of multiple amplifiers without additional switches. The AD8231 is specified over the extended industrial temperature range of −40°C to +125°C. It is available in a 4 mm × 4 mm 16-lead LFCSP (chip scale). Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. 06586-001 AD8231 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ............................................. 9 Instrumentation Amplifier Performance Curves..................... 9 Operational Amplifier Performance Curves .......................... 12 Performance Curves Valid for Both Amplifiers ..................... 13 Theory of Operation ...................................................................... 14 Amplifier Architecture .............................................................. 14 Gain Selection............................................................................. 14 Reference Terminal .................................................................... 14 Layout .......................................................................................... 15 Input Bias Current Return Path ............................................... 15 RF Interference ........................................................................... 15 Common-Mode Input Voltage Range ..................................... 16 Applications Information .............................................................. 17 Differential Output .................................................................... 17 Multiplexing................................................................................ 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18 REVISION HISTORY 5/07—Revision 0: Initial Version Rev. 0 | Page 2 of 20 AD8231 SPECIFICATIONS VS = 5 V, VREF = 2.5 V, G = 1, RL = 10 kΩ, TA = 25°C, unless otherwise noted. Table 2. Parameter INSTRUMENTATION AMPLIFIER OFFSET VOLTAGE Input Offset, VOSI Average Temperature Drift Output Offset, VOSO Average Temperature Drift INPUT CURRENTS Input Bias Current Input Offset Current GAINS Gain Error G=1 G = 2 to 128 Gain Drift G=1 G = 2 to 128 CMRR G=1 G=2 G=4 G=8 G = 16 G = 32 G = 64 G = 128 NOISE Input Voltage Noise, eni TA = −40°C to +125°C 1, 2, 4, 8, 16, 32, 64, 128 Conditions VOS RTI = VOSI + VOSO/G TA = −40°C to +125°C TA = −40°C to +125°C 4 0.01 15 0.05 250 TA = −40°C to +125°C 20 15 0.05 30 0.5 500 5 100 0.5 μV μV/°C μV μV/°C pA nA pA nA Min Typ Max Unit 0.05 0.8 3 3 80 86 92 98 104 110 110 110 en = √(eni2 + (eno/G)2), VIN+, VIN− = 2.5 V f = 1 kHz f = 1 kHz, TA = −40°C f = 1 kHz, TA = 125°C f = 0.1 Hz to 10 Hz, f = 1 kHz f = 1 kHz, TA = −40°C f = 1 kHz, TA = 125°C f = 0.1 Hz to 10 Hz 32 27 39 0.7 58 50 70 1.1 10||5 110 4.95 28 −0.2 +5.2 10 10 % % ppm/°C ppm/°C dB dB dB dB dB dB dB dB nV/√Hz nV/√Hz nV/√Hz μV p-p nV/√Hz nV/√Hz nV/√Hz μV p-p GΩ||pF dB V kΩ V Output Voltage Noise, eno OTHER INPUT CHARACTERISTICS Common-Mode Input Impedance Power Supply Rejection Ratio Input Operating Voltage Range REFERENCE INPUT Input Impedance Voltage Range 100 0.05 Rev. 0 | Page 3 of 20 AD8231 Parameter DYNAMIC PERFORMANCE Bandwidth G=1 G=2 Gain Bandwidth Product G = 4 to 128 Slew Rate OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current DIGITAL INTERFACE Input Voltage Low Input Voltage High Setup Time to CS high Hold Time after CS high OPERATIONAL AMPLIFIER INPUT CHARACTERISTICS Offset Voltage, VOS Temperature Drift Input Bias Current Input Offset Current TA = −40°C to +125°C Input Voltage Range Open-Loop Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Voltage Noise Density Voltage Noise DYNAMIC PERFORMANCE Gain Bandwidth Product Slew Rate OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current BOTH AMPLIFIERS POWER SUPPLY Quiescent Current Quiescent Current (Shutdown) 0.05 100 100 100 f = 0.1 Hz to 10 Hz 120 120 115 20 0.4 1 0.5 RL = 100 kΩ to ground RL = 10 kΩ to ground RL = 100 kΩ to 5 V RL = 10 kΩ to 5 V 4.9 4.8 4.96 4.92 60 80 70 Conditions Min Typ Max Unit 2.7 2.5 7 1.1 RL = 100 kΩ to ground RL = 10 kΩ to ground RL = 100 kΩ to 5 V RL = 10 kΩ to 5 V 4.9 4.8 4.94 4.88 60 80 70 MHz MHz MHz V/μs V V mV mV mA V V ns ns 100 200 TA = −40°C to +125°C TA = −40°C to +125°C TA = −40°C to +125°C TA = −40°C to +125°C 1.0 4.0 50 20 TA = −40°C to +125°C TA = −40°C to +125°C 5 0.01 250 20 15 0.06 500 5 100 0.5 4.95 μV uV/°C pA nA pA nA V V/mV dB dB nV/√Hz μV p-p MHz V/μs V V mV mV mA 100 200 4 0.01 5 1 mA μA Rev. 0 | Page 4 of 20 AD8231 VS = 3.0 V, VREF = 1.5 V, TA = 25°C, G = 1, RL = 10 kΩ, unless otherwise noted. Table 3. Parameter INSTRUMENTATION AMPLIFIER OFFSET VOLTAGE Input Offset, VOSI Average Temperature Drift Output Offset, VOSO Average Temperature Drift INPUT CURRENTS Input Bias Current Input Offset Current GAINS Gain Error G=1 G = 2 to 128 Gain Drift G=1 G = 2 to 128 CMRR G=1 G=2 G=4 G=8 G = 16 G = 32 G = 64 G = 128 NOISE Input Voltage Noise, eni TA = −40°C to +125°C 1, 2, 4, 8, 16, 32, 64, 128 Conditions VOS RTI = VOSI + VOSO/G 4 0.01 15 0.05 250 TA = −40°C to +125°C 20 15 0.05 30 0.5 500 5 100 0.5 μV μV/°C μV μV/°C pA nA pA nA Min Typ Max Unit 0.05 0.8 3 3 80 86 92 98 104 110 110 110 en = √(eni2 + (eno/G)2) VIN+, VIN− = 2.5 V, TA = 25°C f = 1 kHz f = 1 kHz, TA = −40°C f = 1 kHz, TA = 125°C f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz, TA = −40°C f = 1 kHz, TA = 125°C f = 0.1 Hz to 10 Hz 10 10 % % ppm/°C ppm/°C dB dB dB dB dB dB dB dB Output Voltage Noise, eno 40 35 48 0.8 72 62 83 1.4 10||5 110 2.95 28 −0.2 +3.2 nV/√Hz nV/√Hz nV/√Hz μV p-p nV/√Hz nV/√Hz nV/√Hz μV p-p GΩ||pF dB V kΩ||pF V OTHER INPUT CHARACTERISTICS Common-Mode Input Impedance Power Supply Rejection Ratio Input Operating Voltage Range REFERENCE INPUT Input Impedance Voltage Range 100 0.05 Rev. 0 | Page 5 of 20 AD8231 Parameter DYNAMIC PERFORMANCE Bandwidth G=1 G=2 Gain Bandwidth Product G = 4 to 128 Slew Rate OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current DIGITAL INTERFACE Input Voltage Low Input Voltage High Setup Time to CS high Hold Time after CS high OPERATIONAL AMPLIFIER INPUT CHARACTERISTICS Offset Voltage, VOS Temperature Drift Input Bias Current Input Offset Current TA = −40°C to +125°C Input Voltage Range Open-Loop Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Voltage Noise Density Voltage Noise DYNAMIC PERFORMANCE Gain Bandwidth Product Slew Rate OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current BOTH AMPLIFIERS POWER SUPPLY Quiescent Current Quiescent Current (Shutdown) 0.05 100 100 100 f = 0.1 Hz to 10 Hz 120 120 115 27 0.6 1 0.5 RL = 100 kΩ to ground RL = 10 kΩ to ground RL = 100 kΩ to 3 V RL = 10 kΩ to 3 V 2.9 2.8 2.96 2.82 60 80 70 Conditions Min Typ Max Unit 2.7 2.5 7 1.1 RL = 100 kΩ to ground RL = 10 kΩ to ground RL = 100 kΩ to 3 V RL = 10 kΩ to 3 V 2.9 2.8 2.94 2.88 60 80 70 MHz MHz MHz V/μs V V mV mV mA V V ns ns 100 200 TA = −40°C to +125°C TA = −40°C to +125°C TA = −40°C to +125°C TA = −40°C to +125°C 0.7 2.3 60 20 TA = −40°C to +125°C TA = −40°C to +125°C 5 0.01 250 20 15 0.06 500 5 100 0.5 2.95 μV μV/°C pA nA pA nA V V/mV dB dB nV/√Hz μV p-p MHz V/μs V V mV mV mA 100 200 3.5 0.01 4.5 1 mA μA Rev. 0 | Page 6 of 20 AD8231 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage Output Short-Circuit Current Input Voltage (Common-Mode) Differential Input Voltage Storage Temperature Range Operational Temperature Range Package Glass Transition Temperature ESD (Human Body Model) ESD (Charged Device Model) ESD (Machine Model) 1 THERMAL RESISTANCE Rating 6V Indefinite1 −VS − 0.3 V to +VS + 0.3 V −VS − 0.3 V to +VS + 0.3 V –65°C to +150°C –40°C to +125°C 130°C 1.5 kV 1.5 kV 0.2 kV Table 5. Thermal Pad Soldered to Board Not Soldered to Board θJA 54 96 Unit °C/W °C/W The θJA values in Table 5 assume a 4-layer JEDEC standard board. If the thermal pad is soldered to the board, then it is also assumed it is connected to a plane. θJC at the exposed pad is 6.3°C/W. Maximum Power Dissipation The maximum safe power dissipation for the AD8231 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 130°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 130°C for an extended period can result in a loss of functionality. For junction temperatures between 105°C and 130°C, short-circuit operation beyond 1000 hours may impact part reliability. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. 0 | Page 7 of 20 AD8231 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 16 A2 15 A1 13 CS 14 A0 NC 1 (IN-AMP –IN) –INA 2 (IN-AMP +IN) +INA 3 NC 4 NC = NO CONNECT PIN 1 INDICATOR 12 +VS 11 –VS 10 OUTA (IN-AMP OUT) 9 REF AD8231 TOP VIEW (Not to Scale) (OP AMP OUT) OUTB 8 +INB 6 –INB 7 SDN 5 Figure 2. 16-Lead LFCSP (Chip Scale) Table 6. Pin Function Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic NC −INA +INA NC SDN +INB −INB OUTB REF OUTA −VS +VS CS A0 A1 A2 Description No Connect. In-Amp Negative Input. In-Amp Positive Input. No Connect. Shutdown. Op Amp Positive Input. Op Amp Negative Input. Op Amp Output. In-Amp Reference Pin. It should be driven with a low impedance. Output is referred to this pin. In-Amp Output. Negative Power Supply. Connect to ground in single supply applications. Positive Power Supply. Chip Select. Enables digital logic interface. Gain Setting Bit (LSB). Gain Setting Bit. Gain Setting Bit (MSB). Rev. 0 | Page 8 of 20 06586-002 AD8231 TYPICAL PERFORMANCE CHARACTERISTICS INSTRUMENTATION AMPLIFIER PERFORMANCE CURVES 6 0V, 4.96V INPUT COMMON-MODE VOLTAGE (V) 50 40 G = +128 G = +64 G = +32 G = +16 G = +8 G = +4 G = +2 G = +1 5 30 4 GAIN (dB) 06586-003 20 5V SINGLE SUPPLY 4.92V, 2.5V 10 0 –10 –20 2.92V, 1.5V –30 –40 100 3 2 0V, 2.96V 3V SINGLE SUPPLY 1 0V, 0.04V 0 1 2 3 4 5 6 1k 10k 100k 1M 10M OUTPUT VOLTAGE (V) FREQUENCY (Hz) Figure 3. Input Common-Mode Range vs. Output Voltage, VREF = 0 V 6 140 1.5V, 4.96V 120 Figure 6. Gain vs. Frequency G = +128 INPUT COMMON-MODE VOLTAGE (V) 5 4 0.02V, 4.22V 5V SINGLE SUPPLY 1.5V, 2.96V 4.98V, 3.22V G = +8 3 2 0.02V, 2.22V CMRR (dB) 100 G = +1 80 2.98V, 2.22V 3V SINGLE SUPPLY 4.98V, 1.78V 60 1 0.02V, 0.78V 2.98V, 0.78V 1.5V, 0.04V 06586-004 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 100 1k FREQUENCY (Hz) 10k 100k OUTPUT VOLTAGE (V) Figure 4. Input Common-Mode Range vs. Output Voltage, VREF = 1.5 V 6 INPUT COMMON-MODE VOLTAGE (V) Figure 7. CMRR vs. Frequency 5 2.5V, 4.96V 5V SINGLE SUPPLY G = +128, 0.4µV/DIV 4 0.02V, 3.72V 3 2.5V, 2.96V 2 0.02V, 1.72V 1 0.02V, 1.28V 0 0 0.5 1.0 1.5 2.0 2.5 2.5V, 0.04V 2.98V, 0.28V 3.0 3.5 4.0 4.5 5.0 06586-005 4.98V, 3.72V 2.98V, 2.72V G = +1, 1µV/DIV 3V SINGLE SUPPLY 4.98V,1.28V 06586-012 1s/DIV OUTPUT VOLTAGE (V) Figure 5. Input Common-Mode Range vs. Output Voltage, VREF = 2.5 V Figure 8. 0.1 Hz to 10 Hz Noise Rev. 0 | Page 9 of 20 06586-010 0 40 10 06586-009 0 AD8231 100 90 80 G = +1 G = +8 G = +128 1.0 0.8 0.6 BIAS CURRENT (nA) 70 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 +VS = +1.5V –VS = –1.5V VREF = 0V 06586-007 NOISE (nV/ Hz) 60 50 40 30 20 10 1 10 100 FREQUENCY (Hz) 1k 06586-011 0 –1.0 –1.5 –1.2 –0.9 –0.6 –0.3 0 VCM (V) 0.3 0.6 0.9 1.2 1.5 Figure 9. Voltage Noise Spectral Density vs. Frequency, 5 V, 1 Hz to 1000 Hz 1000 900 800 700 Figure 12. Bias Current vs. Common-Mode Voltage, 3 V G = +1 G = +8 G = +128 NOISE (nV/ Hz) 600 500 400 300 200 100 1 10 100 1k 10k 100k 06586-008 20mV/DIV 5µs/DIV 0 FREQUENCY (Hz) Figure 10. Voltage Noise Spectral Density vs. Frequency, 5V, 1 Hz to 1 MHz 2.0 1.5 1.0 BIAS CURRENT (nA) Figure 13. Small Signal Pulse Response, G = 1, RL = 2 kΩ, CL = 500 pF 300pF NO LOAD 500pF 800pF 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 +VS = +2.5V –VS = –2.5V VREF = 0V 06586-006 06586-014 20mV/DIV 4µs/DIV –2.0 –1.5 –1.0 –0.5 0 VCM (V) 0.5 1.0 1.5 2.0 2.5 Figure 11. Bias Current vs. Common-Mode Voltage, 5 V Figure 14. Small Signal Pulse Response for Various Capacitive Loads, G = 1 Rev. 0 | Page 10 of 20 06586-013 AD8231 G = +8 G = +32 G = +128 2V/DIV 17.6µs TO 0.01% 21.4µs TO 0.001% 06586-015 20mV/DIV 10µs/DIV 0.001%/DIV 100µs/DIV Figure 15. Small Signal Pulse Response, G = 8, 32, 128, RL = 2 kΩ, CL = 500 pF Figure 18. Large Signal Pulse Response, G = 128, VS = 5 V 25 20 SETTLING TIME (µs) 2V/DIV 0.001% 15 0.01% 10 3.95µs TO 0.01% 4µs TO 0.001% 5 0.001%/DIV 10µs/DIV 06586-016 1 10 GAIN (V/V) 100 1k Figure 16. Large Signal Pulse Response, G = 1, VS = 5 V Figure 19. Settling Time vs. Gain for a 4 V p-p Step, VS = 5 V 25 0.001% 20 SETTLING TIME (µs) 2V/DIV 15 0.01% 10 3.75µs TO 0.01% 3.8µs TO 0.001% 5 0.001%/DIV 10µs/DIV 06586-017 1 10 GAIN (V/V) 100 1k Figure 17. Large Signal Pulse Response, G = 8, VS = 5 V Figure 20. Settling Time vs. Gain for a 2 V p-p Step, VS = 3 V Rev. 0 | Page 11 of 20 06586-020 0 06586-019 0 06586-018 AD8231 OPERATIONAL AMPLIFIER PERFORMANCE CURVES 100 –90 NO LOAD 80 –100 60 –110 OPEN-LOOP PHASE SHIFT (Degrees) OPEN-LOOP GAIN (dB) 300pF 800pF 1nF 1.5nF 20mV/DIV 5µs/DIV 06586-024 40 76° PHASE MARGIN 20 –120 –130 0 RL = 10kΩ CL = 200pF 100 1k 10k 100k 1M –140 FREQUENCY (Hz) Figure 21. Open Loop Gain and Phase vs. Frequency, VS = 5 V 100 –90 06586-021 –20 10 –150 10M Figure 24. Small Signal Response for Various Capacitive Loads, VS = 3 V OPEN-LOOP PHASE SHIFT (Degrees) OUTPUT VOLTAGE (0.5V/DIV) 80 –100 NO LOAD 1nF║2kΩ OPEN-LOOP GAIN (dB) 60 –110 1.5nF║2kΩ 40 72° PHASE MARGIN 20 –120 –130 0 RL = 10kΩ CL = 200pF 100 1k 10k 100k 1M –140 06586-022 –20 10 –150 10M TIME (5µs/DIV) FREQUENCY (Hz) Figure 22. Open Loop Gain and Phase vs. Frequency, VS = 3 V Figure 25. Large Signal Transient Response, VS = 5 V 800pF NO LOAD 1nF 2nF NO LOAD OUTPUT VOLTAGE (0.5V/DIV) 1nF║2kΩ 1.5nF║2kΩ 1.5nF 20mV/DIV 5µs/DIV 06586-023 TIME (5µs/DIV) Figure 23. Small Signal Response for Various Capacitive Loads, VS = 5 V Figure 26. Large Signal Transient Response, VS = 3 V Rev. 0 | Page 12 of 20 06586-026 06586-025 AD8231 PERFORMANCE CURVES VALID FOR BOTH AMPLIFIERS 7 6 5 ISUPPLY (mA) 5 +125°C +85°C OUTPUT VOLTAGE (V) 4 –40°C SOURCE +25°C SOURCE +85°C SOURCE +125°C SOURCE –40°C SINK +25°C 4 –40°C 3 2 1 0 2.7 3 2 +25°C SINK +85°C SINK +125°C SINK 1 VSUPPLY (V) 06586-028 3.1 3.5 3.9 4.3 4.7 5.1 5.5 5.9 0 5 10 15 20 25 OUTPUT CURRENT (mA) Figure 27. Supply Current vs. Supply Voltage 3.0 Figure 29. Output Voltage Swing vs. Output Current, VS = 5 V 2.5 –40°C SOURCE OUTPUT VOLTAGE (V) 2.0 +25°C SOURCE +85°C SOURCE +125°C SOURCE 1.5 –40°C SINK +25°C SINK +85°C SINK +125°C SINK 1.0 0.5 0 5 10 15 20 25 OUTPUT CURRENT (mA) Figure 28. Output voltage Swing vs. Output Current, VS = 3 V 06586-029 0 Rev. 0 | Page 13 of 20 06586-030 0 AD8231 THEORY OF OPERATION CS A0 A1 A2 SDN OUTB –INA A1 14kΩ 14kΩ A4 +INB A3 14kΩ 14kΩ OUTA –INB A2 +INA AD8231 +VS –VS REF 06586-031 Figure 30. Simplified Schematic AMPLIFIER ARCHITECTURE The AD8231 is based on the classic 3-op amp topology. This topology has two stages: a preamplifier to provide amplification, followed by a difference amplifier to remove the common-mode voltage. Figure 30 shows a simplified schematic of the AD8231. The preamp stage is composed of Amplifier A1, Amplifier A2, and a digitally controlled resistor network. The second stage is a gain of 1 difference amplifier composed of A3 and four 14 kΩ resistors. Amplifier A1, Amplifier A2, and Amplifier A3 are all zero drift, rail-to-rail input, rail-to rail-output amplifiers. The AD8231 design makes it extremely robust over temperature. The AD8231 uses an internal thin film resistor to set the gain. Since all of the resistors are on the same die, gain temperature drift performance and CMRR drift performance are better than can be achieved with topologies using external resistors. The AD8231 also uses an auto-zero topology to null the offsets of all its internal amplifiers. Since this topology continually corrects for any offset errors, offset temperature drift is nearly nonexistent. The AD8231 also includes a free operational amplifier. Like the other amplifiers in the AD8231, it is a zero drift, rail-to-rail input, rail-to-rail output architecture. Table 7. Truth Table for AD8231 Gain Settings CS Low Low Low Low Low Low Low Low High A2 Low Low Low Low High High High High X A1 Low Low High High Low Low High High X A0 Low High Low High Low High Low High X Gain 1 2 4 8 16 32 64 128 No change REFERENCE TERMINAL The output voltage of the AD8231 is developed with respect to the potential on the reference terminal. This is useful when the output signal needs to be offset to a midsupply level. For example, a voltage source can be tied to the REF pin to levelshift the output so that the AD8231 can drive a single-supply ADC. The REF pin is protected with ESD diodes and should not exceed either +VS or −VS by more than 0.3 V. For best performance, source impedance to the REF terminal should be kept below 1 Ω. As shown in Figure 30, the reference terminal, REF, is at one end of a 14 kΩ resistor. Additional impedance at the REF terminal adds to this 14 kΩ resistor and results in amplification of the signal connected to the positive input, causing a CMRR error. GAIN SELECTION The AD8231’s gain is set by voltages applied to the A0, A1, and A2 pins. To change the gain, the CS pin must be driven low. When the CS pin is driven high, the gain is latched, and voltages at the A0 to A2 pins have no effect. Table 7 shows the different gain settings. The time required for a gain change is dominated by the settling time of the amplifier. The AD8231 takes about 200 ns to switch gains, after which the amplifier begins to settle. Refer to Figure 16 through Figure 20 to determine the settling time for different gains. Rev. 0 | Page 14 of 20 AD8231 INCORRECT CORRECT INPUT BIAS CURRENT RETURN PATH The input bias current of the AD8231 must have a return path to common. When the source, such as a thermocouple, cannot provide a return current path, one should be created, as shown in Figure 32. INCORRECT +VS 06586-032 AD8231 IN-AMP VREF VREF + AD8231 IN-AMP CORRECT +VS AD8231 OP AMP – Figure 31. Driving the Reference Pin AD8231 REF AD8231 REF LAYOUT The AD8231 is a high precision device. To ensure optimum performance at the PC board level, care must be taken in the design of the board layout. The AD8231 pinout is arranged in a logical manner to aid in this task. –VS TRANSFORMER +VS –VS TRANSFORMER +VS Power Supplies The AD8231 should be decoupled with a 0.1 μF bypass capacitor between the two supplies. This capacitor should be placed as close as possible to Pin 11 and Pin 12, either directly next to the pins or beneath the pins on the backside of the board. The AD8231’s autozero architecture requires a low ac impedance between the supplies. Long trace lengths to the bypass capacitor increase this impedance, which results in a larger input offset voltage. A stable dc voltage should be used to power the instrumentation amplifier. Noise on the supply pins can adversely affect performance. AD8231 REF 10MΩ –VS THERMOCOUPLE +VS C C AD8231 REF –VS THERMOCOUPLE +VS Package Considerations The AD8231 comes in a 4 mm × 4 mm LFCSP. Beware of blindly copying the footprint from another 4 mm × 4 mm LFCSP part; it may not have the same thermal pad size and leads. Refer to the Outline Dimensions section to verify that the PCB symbol has the correct dimensions. Space between the leads and thermal pad should be kept as wide as possible for the best bias current performance. C AD8231 REF fHIGH-PASS = 2π1 RC C R AD8231 REF R 06586-033 –VS CAPACITIVELY COUPLED –VS CAPACITIVELY COUPLED Figure 32. Creating an IBIAS Path RF INTERFERENCE RF rectification is often a problem when amplifiers are used in applications where there are strong RF signals. The disturbance can appear as a small dc offset voltage. High frequency signals can be filtered with a low-pass, RC network placed at the input of the instrumentation amplifier, as shown in Figure 33. The filter limits the input signal bandwidth according to the following relationship: FilterFreq Diff = 1 2π R(2C D + C C ) Thermal Pad The AD8231 4 mm × 4 mm LFCSP comes with a thermal pad. This pad is connected internally to −VS. The pad can either be left unconnected or connected to the negative supply rail. For high vibration applications, a landing is recommended. Because the AD8231 dissipates little power, heat dissipation is rarely an issue. If improved heat dissipation is desired (for example, when ambient temperatures are near 125°C or when driving heavy loads), connect the thermal pad to the negative supply rail. For the best heat dissipation performance, the negative supply rail should be a plane in the board. See the Thermal Resistance section for thermal coefficients with and without the pad soldered. FilterFreqCM = where CD ≥ 10CC. 1 2π RCC Rev. 0 | Page 15 of 20 AD8231 +VS 0.1µF CC 1nF R 4.02kΩ CD 10nF R 4.02kΩ CC 1nF 0.1µF –VS 10µF 06586-034 COMMON-MODE INPUT VOLTAGE RANGE 10µF +INA AD8231 REF –INA VOUT The 3-op amp architecture of the AD8231 applies gain and then removes the common-mode voltage. Therefore, internal nodes in the AD8231 experience a combination of both the gained signal and the common-mode signal. This combined signal can be limited by the voltage supplies even when the individual input and output signals are not. To determine whether the signal could be limited, refer to Figure 3 through Figure 5 or use the following formula: − VS + 0.04 V < VCM ± VDIFF × Gain 2 < + VS − 0.04 V Figure 33. RFI Suppression Figure 33 shows an example where the differential filter frequency is approximately 2 kHz, and the common-mode filter frequency is approximately 40 kHz. Values of R and CC should be chosen to minimize RFI. Mismatch between the R × CC at the positive input and the R × CC at negative input degrades the CMRR of the AD8231. By using a value of CD ten times larger than the value of CC, the effect of the mismatch is reduced and performance is improved. If more common mode range is required, the simplest solution is to apply less gain in the instrumentation amplifier. The extra op amp can be used to provide another gain stage after the in-amp. Because the AD8231 has good offset and noise performance at low gains, applying less gain in the instrumentation amplifier generally has a limited impact on the overall system performance. Rev. 0 | Page 16 of 20 AD8231 APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT Figure 34 shows how to create a differential output in-amp using the AD8231 uncommitted op amp. Errors from the op amp are common to both outputs and are thus common-mode. Errors from mismatched resistors also create a common-mode dc offset. Because these errors are common-mode, they will likely be rejected by the next device in the signal chain. +IN 3 10 MULTIPLEXING SDN0 SDN1 IN-AMP –IN 2 REF 9 +OUT SDN2 4.99kΩ 7 4.99kΩ VREF 6 + – OP AMP SDN3 8 06586-035 –OUT Figure 35. Figure 34. Differential Output Using Op Amp The outputs of both the AD8231 in-amp and op amp are high impedance in the shutdown state. This feature allows several AD8231s to be multiplexed together without any external switches. Figure 35 shows an example of such a configuration. All the outputs are connected together and only one amplifier is turned on at a time. This feature is analogous to the high Z mode of digital tristate logic. Because the output impedance in shutdown is multiple megaohms, several thousand AD8231s can theoretically be multiplexed in such a way. The AD8231 can enter and leave shutdown mode very quickly. However, when the amplifier wakes up and reconnects its input circuitry, the voltage at its internal input nodes changes dramatically. It will take time for the output of the amplifier to settle. Refer to Figure 16 through Figure 20 to determine the settling time for different gains. This settling time limits how quickly the user can multiplex the AD8231 with the SDN pin. Rev. 0 | Page 17 of 20 06586-036 AD8231 OUTLINE DIMENSIONS 4.00 BSC SQ 0.60 MAX 0.60 MAX 0.65 BSC 3.75 BSC SQ 0.75 0.60 0.50 (BOTTOM VIEW) PIN 1 INDICATOR 13 12 16 PIN 1 INDICATOR 1 TOP VIEW 2.25 2.10 SQ 1.95 5 4 9 8 0.25 MIN 1.95 BSC 12° MAX 1.00 0.85 0.80 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 36. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-4) Dimensions shown in millimeters ORDERING GUIDE Model AD8231ACPZ-R7 1 AD8231ACPZ-RL1 AD8231ACPZ-WP1 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 16-Lead LFCSP_VQ, 7” Tape and Reel 16-Lead LFCSP_VQ, 13” Tape and Reel 16-Lead LFCSP_VQ, Waffle Pack 021207-A SEATING PLANE 0.35 0.30 0.25 0.20 REF COPLANARITY 0.08 Package Option CP-16-4 CP-16-4 CP-16-4 Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 AD8231 NOTES Rev. 0 | Page 19 of 20 AD8231 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06586-0-5/07(0) Rev. 0 | Page 20 of 20