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AD824_03

AD824_03

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD824_03 - Single Supply, Rail-to-Rail Low Power, FET-Input Op Amp - Analog Devices

  • 数据手册
  • 价格&库存
AD824_03 数据手册
Single Supply, Rail-to-Rail Low Power, FET-Input Op Amp AD824 FEATURES Single Supply Operation: 3 V to 30 V Very Low Input Bias Current: 2 pA Wide Input Voltage Range Rail-to-Rail Output Swing Low Supply Current: 500 A/Amp Wide Bandwidth: 2 MHz Slew Rate: 2 V/ s No Phase Reversal APPLICATIONS Photo Diode Preamplifier Battery Powered Instrumentation Power Supply Control and Protection Medical Instrumentation Remote Sensors Low Voltage Strain Gage Amplifiers DAC Output Amplifier PIN CONFIGURATIONS 14-Lead Epoxy SOIC (R Suffix) 16-Lead Epoxy SOIC (R Suffix) OUT A 1 –IN A +IN A V+ +IN B –IN B OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 –IN B 6 OUT B 7 14 OUT D 13 –IN D 16 OUT D 15 –IN D 2 3 4 5 6 AD824 12 +IN D 14 +IN D 11 V– TOP VIEW (Not to Scale) 10 +IN C 9 –IN C 8 OUT C AD824 13 V– 12 +IN C 11 –IN C 10 OUT C 9 NC OUT B 7 NC 8 NC = NO CONNECT GENERAL DESCRIPTION The AD824 is a quad, FET input, single supply amplifier, featuring rail-to-rail outputs. The combination of FET inputs and rail-to-rail outputs makes the AD824 useful in a wide variety of low voltage applications where low input current is a primary consideration. The AD824 is guaranteed to operate from a 3 V single supply up to ± 15 V dual supplies. AD824AR-3V Parametric Performance at 3 V is fully guaranteed. Fabricated on ADI’s complementary bipolar process, the AD824 has a unique input stage that allows the input voltage to safely extend beyond the negative supply and to the positive supply without any phase inversion or latchup. The output voltage swings to within 15 mV of the supplies. Capacitive loads to 350 pF can be handled without oscillation. The FET input combined with laser trimming provides an input that has extremely low bias currents with guaranteed offsets below 1 mV. This enables high accuracy designs even with high source impedances. Precision is combined with low noise, making the AD824 ideal for use in battery powered medical equipment. Applications for the AD824 include portable medical equipment, photo diode preamplifiers and high impedance transducer amplifiers. The ability of the output to swing rail-to-rail enables designers to build multistage filters in single supply systems and maintain high signal-to-noise ratios. The AD824 is specified over the extended industrial (–40∞C to +85∞C) temperature range and is available in narrow 14-lead and 16-lead SOIC packages. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. AD824–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V = 5.0 V, V S CM = 0 V, VOUT = 0.2 V, TA = 25 C unless otherwise noted) Min Typ 0.1 Max 1.0 1.5 12 4000 10 3.0 80 74 1013 3.3 Unit mV mV pA pA pA pA V dB dB dB W pF V/mV V/mV V/mV V/mV mV/∞C V V V V mV mV mV mV mA mA W dB dB mA V/ms kHz ms MHz Degrees dB mV p-p nV/÷Hz fA/÷Hz % Parameter INPUT CHARACTERISTICS Offset Voltage AD824A Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Symbol VOS Conditions TMIN to TMAX IB TMIN to TMAX IOS TMIN to TMAX CMRR VCM = 0 V to 2 V VCM = 0 V to 3 V TMIN to TMAX VO = 0.2 V to 4.0 V RL = 2 kW RL = 10 kW RL = 100 kW TMIN to TMAX, RL = 100 kW –0.2 66 60 60 2 300 2 300 Input Impedance Large Signal Voltage Gain AVO Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High DVOS/DT VOH 20 50 250 180 40 100 1000 400 2 4.988 4.985 4.85 4.82 15 20 120 140 ± 12 ± 10 100 80 500 2 150 2.5 2 50 –123 2 16 0.8 0.005 600 Output Voltage Low VOL Short Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Total Harmonic Distortion ISC ZOUT PSRR ISY SR BWP tS GBP fo CS en p-p en in THD ISOURCE = 20 mA TMIN to TMAX ISOURCE = 2.5 mA TMIN to TMAX ISINK = 20 mA TMIN to TMAX ISINK = 2.5 mA TMIN to TMAX Sink/Source TMIN to TMAX f = 1 MHz, AV = 1 VS = 2.7 V to 12 V TMIN to TMAX TMIN to TMAX RL = 10 kW, AV = 1 1% Distortion, VO = 4 V p-p VOUT = 0.2 V to 4.5 V, to 0.01% No Load f = 1 kHz, RL = 2 kW 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 10 kHz, RL = 0, AV = +1 4.975 4.97 4.80 4.75 25 30 150 200 70 66 –2– REV. C AD824 ELECTRICAL SPECIFICATIONS (@ V = S 15.0 V, VOUT = 0 V, TA = 25 C unless otherwise noted) Conditions Min Typ 0.5 0.6 4 500 25 3 500 –15 70 66 80 1013 3.3 12 50 300 200 50 200 2000 1000 2 14.988 14.985 14.85 14.82 –14.985 –14.98 –14.88 –14.86 ± 20 100 80 560 625 675 Max 2.5 4.0 35 4000 20 13 Unit mV mV pA pA pA pA pA V dB dB W pF V/mV V/mV V/mV V/mV mV/∞C V V V V V V V V mA W dB dB mA mA V/ms kHz ms MHz Degrees dB mV p-p nV/÷Hz fA/÷Hz % Parameter INPUT CHARACTERISTICS Offset Voltage AD824A Input Bias Current Symbol VOS IB IB IOS CMRR TMIN to TMAX VCM = 0 V TMIN to TMAX VCM = –10 V TMIN to TMAX Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Input Impedance Large Signal Voltage Gain VCM = –15 V to 13 V TMIN to TMAX Vo = –10 V to +10 V; RL = 2 kW RL = 10 kW RL = 100 kW TMIN to TMAX, RL = 100 kW AVO Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High DVOS/DT VOH Output Voltage Low VOL Short Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Total Harmonic Distortion ISC ZOUT PSRR ISY ISOURCE = 20 mA TMIN to TMAX ISOURCE = 2.5 mA TMIN to TMAX ISINK = 20 mA TMIN to TMAX ISINK = 2.5 mA TMIN to TMAX Sink/Source, TMIN to TMAX f = 1 MHz, AV = 1 VS = 2.7 V to 15 V TMIN to TMAX VO = 0 V TMIN to TMAX RL = 10 kW, AV = 1 1% Distortion, VO = 20 V p-p VOUT = 0 V to 10 V, to 0.01% f = 1 kHz, RL =2 kW 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f =10 kHz, VO = 3 V rms, RL = 10 kW 14.975 14.970 14.80 14.75 ±8 –14.975 –14.97 –14.85 –14.8 70 68 SR BWP tS GBP fo CS en p-p en in THD 2 33 6 2 50 –123 2 16 1.1 0.005 REV. C –3– AD824–SPECIFICATIONS ELECTRICAL SPECIFICATIONS Parameter INPUT CHARACTERISTICS Offset Voltage AD824A -3 V Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Input Impedance Large Signal Voltage Gain VOS TMIN to TMAX IB TMIN to TMAX IOS TMIN to TMAX CMRR VCM = 0 V to 1 V TMIN to TMAX VO = 0.2 V to 2.0 V RL = 2 kW RL = 10 kW RL = 100 kW TMIN to TMAX, RL = 100 kW 0 58 56 2 250 2 250 74 1013 3.3 10 30 180 90 20 65 500 250 2 2.988 2.985 2.85 2.82 15 20 120 140 ±8 ±6 100 (@ VS = 3.0 V, VCM = 0 V, VOUT = 0.2 V, TA = 25 C unless otherwise noted) Conditions Min Typ 0.2 Max 1.0 1.5 12 4000 10 1 Unit mV mV pA pA pA pA V dB dB W pF V/mV V/mV V/mV V/mV mV/∞C V V V V mV mV mV mV mA mA W dB dB mA V/ms kHz ms MHz Degrees dB mV p-p nV/÷Hz fA/÷Hz % Symbol AVO Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High DVOS/DT VOH Output Voltage Low VOL Short Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Total Harmonic Distortion ISC ISC ZOUT PSRR ISY SR BWP tS GBP fo CS en p-p en in THD ISOURCE = 20 mA TMIN to TMAX ISOURCE = 2.5 mA TMIN to TMAX ISINK = 20 mA TMIN to TMAX ISINK = 2.5 mA TMIN to TMAX Sink/Source Sink/Source, TMIN to TMAX f = 1 MHz, AV = 1 VS = 2.7 V to 12 V, TMIN to TMAX VO = 0.2 V, TMIN to TMAX RL =10 kW, AV = 1 1% Distortion, VO = 2 V p-p VOUT = 0.2 V to 2.5 V, to 0.01% f = 1 kHz, RL = 2 kW 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz, RL = 0, AV = +1 2.975 2.97 2.8 2.75 25 30 150 200 70 66 500 2 300 2 2 50 –123 2 16 0.8 0.01 600 –4– REV. C AD824 WAFER TEST LIMITS (@ V = 5.0 V, V S CM = 0 V, TA = 25 C unless otherwise noted) Conditions Limit 1.0 12 20 –0.2 to 3.0 66 70 15 4.975 25 600 Unit mV max pA max pA V min dB min mV/V V/mV min V min mV max mA max Parameter Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Output Voltage High Output Voltage Low Supply Current/Amplifier Symbol VOS IB IOS VCM CMRR PSRR AVO VOH VOL ISY VCM = 0 V to 2 V V = + 2.7 V to +12 V RL = 2 kW ISOURCE = 20 mA ISINK = 20 mA VO = 0 V, RL = • NOTE Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . –VS – 0.2 V to +VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V Output Short Circuit Duration to GND . . . . . . . . . Indefinite Storage Temperature Range R-14, R-16 Packages . . . . . . . . . . . . . . . . –65∞C to +150∞C Operating Temperature Range AD824A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C Junction Temperature Range R-14, R-16 Packages . . . . . . . . . . . . . . . . –65∞C to +150∞C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300∞C Package Type 14-Lead SOIC (R) 16-Lead SOIC (R) qJA2 120 92 qJC 36 27 Unit ∞C/W ∞C/W VCC I5 R1 R2 R9 I6 Q18 Q29 Q21 Q27 Q4 +IN J1 J2 Q5 Q6 C3 Q19 Q7 R13 –IN R15 C2 Q22 R7 Q23 C4 VOUT Q20 Q24 Q25 Q8 C1 Q2 Q3 Q31 R12 I1 R14 I2 R17 I3 VEE I4 Q28 Q26 NOTES 1 Absolute maximum ratings apply to packaged parts unless otherwise noted. 2 qJA is specified for the worst case conditions, i.e., qJA is specified for device in socket for P-DIP packages; qJA is specified for device soldered in circuit board for SOIC package. ORDERING GUIDE Model AD824AR-14 AD824AR-14-3V AD824AR-16 Temperature Range Package Description Package Option R-14 R-14 R-16 Figure 1. Simplified Schematic of 1/4 AD824 –40∞C to +85∞C 14-Pin SOIC –40∞C to +85∞C 14-Pin SOIC –40∞C to +85∞C 16-Pin SOIC CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD824 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. C –5– AD824 –Typical Performance Characteristics 80 VS = 15V NO LOAD 80 VS = 5V NO LOAD 60 GAIN – dB GAIN – dB 60 40 PHASE – Degrees 45 20 90 135 0 100 1k 10k 100k 1M 180 10M 40 PHASE – Degrees PHASE – Degrees 45 20 90 135 0 100 1k 10k 100k 1M 180 10M 100 90 100 90 10 0% 10 0% 50mV 1µs 50mV 1µs TPC 1. Open-Loop Gain/Phase and Small Signal Response, VS = ± 15 V, No Load TPC 3. Open-Loop Gain/Phase and Small Signal Response, VS = 5 V, No Load 80 VS = 15V CL = 100pF 60 VS = 5V CL = 220pF 60 40 GAIN – dB GAIN – dB 45 20 90 135 0 180 40 20 90 135 0 100 1k 10k 100k 1M 180 10M PHASE – Degrees 45 –20 1k 10k 100k 1M 10M 100 90 100 90 10 0% 10 0% 50mV 1µs 50mV 1µs TPC 2. Open-Loop Gain/Phase and Small Signal Response, VS = ± 15 V, CL = 100 pF TPC 4. Open-Loop Gain/Phase and Small Signal Response, VS = 5 V, CL = 220 pF –6– REV. C AD824 60 VS = 3V NO LOAD 40 PHASE – Degrees GAIN – dB 45 20 90 135 0 180 100 90 t 9.950µs 10 0% –20 1k 10k 100k 1M 10M 5V 2µs t 100 90 100 90 10.810µs 10 0% 10 0% 50mV 1µs 5V 2µs TPC 5. Open-Loop Gain/Phase and Small Signal Response, VS = 3 V, No Load TPC 7. Slew Rate, RL = 10k 60 VS = 3V CL = 220pF 100 90 40 PHASE – Degrees GAIN – dB 45 20 90 135 0 180 VOUT 10 0% 5V 100µs –20 1k 10k 100k 1M 10M TPC 8. Phase Reversal with Inputs Exceeding Supply by 1 V 0.8 0.7 OUTPUT TO RAIL – Volts 0.6 0.5 0.4 0.3 0.2 SINK 0.1 0 1 100 90 SOURCE 10 0% 50mV 1µs 5 10 50 100 500 LOAD CURRENT – A 1m 5m 10m TPC 6. Open-Loop Gain/Phase and Small Signal Response, VS = 3 V, CL = 220 pF TPC 9. Output Voltage to Supply Rail vs. Sink and Source Load Currents REV. C –7– AD824 14 COUNT = 60 12 NOISE DENSITY – nV/ Hz 3V 60 VS 15V 10 NUMBER OF UNITS 8 6 4 2 40 20 5 10 15 FREQUENCY – kHz 20 0 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 OFFSET VOLTAGE DRIFT 2.0 2.5 TPC 10. Voltage Noise Density TPC 13. TC VOS Distribution, –55∞C to +125∞C, VS = 5, 0 0.1 RL = 0 AV = +1 150 VS = 5, 0 125 INPUT OFFSET CURRENT – pA 10k 20k 0.010 VS = +3 100 75 50 25 0 –25 –60 THD+N – % VS = +5 0.001 VS = 15 0.0001 20 100 1k FREQUENCY – Hz –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE – C TPC 11. Total Harmonic Distortion TPC 14. Input Offset Current vs. Temperature 280 COUNT = 860 240 200 160 120 80 40 0 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 OFFSET VOLTAGE – mV 100k VS = 5 , 0 10k INPUT BIAS CURRENT – pA NUMBER OF UNITS 1k 100 10 1 0.3 0.4 0.5 20 40 60 80 100 TEMPERATURE – C 120 140 TPC 12. Input Offset Distribution, VS = 5, 0 TPC 15. Input Bias Current vs. Temperature –8– REV. C AD824 120 1k COMMON-MODE REJECTION – dB 100 80 60 40 INPUT VOLTAGE NOISE – nV/÷Hz 100 10 20 0 10 100 1k 10k 100k FREQUENCY – Hz 1M 10M 1 1 10 100 1k FREQUENCY – Hz 10k 100k TPC 16. Common-Mode Rejection vs. Frequency TPC 19. Input Voltage Noise Spectral Density vs. Frequency –40 120 –60 POWER SUPPLY REJECTION – dB 1k 10k FREQUENCY – Hz 100k 100 80 THD – dB –80 60 40 –100 20 –120 100 0 10 100 1k 10k 100k FREQUENCY – Hz 1M 10M TPC 17. THD vs. Frequency, 3 V rms TPC 20. Power Supply Rejection vs. Frequency 100 100 30 80 OPEN-LOOP GAIN – dB 80 PHASE MARGIN – Degrees 25 60 15V 40 3, 0V 20 60 OUTPUT VOLTAGE – Volts 20 40 15 20 10 0 0 5 –20 10 100 1k 10k 100k FREQUENCY – Hz 1M –20 10M 0 1k 3k 10k 30k 100k INPUT FREQUENCY – Hz 300k 1M TPC 18. Open-Loop Gain and Phase vs. Frequency TPC 21. Large Signal Frequency Response REV. C –9– AD824 –80 –90 5V 5µs CROSSTALK – dB –100 100 90 –110 1 TO 4 –120 1 TO 2 –130 1 TO 3 10 0% –140 10 100 1k FREQUENCY – Hz 10k 100k TPC 22. Crosstalk vs. Frequency TPC 25. Large Signal Response 10k 2750 2500 VS = 15V 1k SUPPLY CURRENT – µA OUTPUT IMPEDANCE – 2250 2000 1750 1500 1250 1000 –60 VS = 3, 0 100 10 1 .1 .01 10 100 1k 10k 100k FREQUENCY – Hz 1M 10M –40 –20 0 20 40 60 80 TEMPERATURE – C 100 120 140 TPC 23. Output Impedance vs. Frequency, Gain = +1 TPC 26. Supply Current vs. Temperature 1000 OUTPUT SATURATION VOLTAGE – mV VS = 15V VS = 3 , 0 20mV 100 90 500ns 100 VOL – VS 10 VS – VOH 10 0% 0 0.01 0.10 1.0 LOAD CURRENT – mA 10.0 TPC 24. Small Signal Response, Unity Gain Follower, 10k 100 pF Load TPC 27. Output Saturation Voltage –10– REV. C AD824 APPLICATION NOTES INPUT CHARACTERISTICS In the AD824, n-channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input common-mode voltage extends from 0.2 V below –VS to 1 V less than +VS. Driving the input voltage closer to the positive rail will cause a loss of amplifier bandwidth. The AD824 does not exhibit phase reversal for input voltages up to and including +VS. Figure 2a shows the response of an AD824 voltage follower to a 0 V to 5 V (+VS) square wave input. The input and output are superimposed. The output tracks the input up to +VS without phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output wave form. For input voltages greater than +VS, a resistor in series with the AD824’s noninverting input will prevent phase reversal at the expense of greater input voltage noise. This is illustrated in Figure 2b. 1V 100 90 A current-limiting resistor should be used in series with the input of the AD824 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV or if an input voltage will be applied to the AD824 when ± VS = 0. The amplifier will be damaged if left in that condition for more than 10 seconds. A 1 kW resistor allows the amplifier to withstand up to 10 V of continuous overvoltage and increases the input voltage noise by a negligible amount. Input voltages less than –VS are a completely different story. The amplifier can safely withstand input voltages 20 V below the minus supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 V. In addition, the input stage typically maintains picoamp level input currents across that input voltage range. OUTPUT CHARACTERISTICS 2µs The AD824’s unique bipolar rail-to-rail output stage swings within 15 mV of the positive and negative supply voltages. The AD824’s approximate output saturation resistance is 100 W for both sourcing and sinking. This can be used to estimate output saturation voltage when driving heavier current loads. For instance, the saturation voltage will be 0.5 V from either supply with a 5 mA current load. For load resistances over 20 kW, the AD824’s input error voltage is virtually unchanged until the output voltage is driven to 180 mV of either supply. 10 GND 0% 1V (a) 1V +VS 100 90 If the AD824’s output is overdriven so as to saturate either of the output devices, the amplifier will recover within 2 ms of its input returning to the amplifier’s linear operating region. 10µs 1V 10 GND 0% 1V Direct capacitive loads will interact with the amplifier’s effective output impedance to form an additional pole in the amplifier’s feedback loop, which can cause excessive peaking on the pulse response or loss of stability. Worst case is when the amplifier is used as a unity gain follower. TPC 4 and 6 show the AD824’s pulse response as a unity gain follower driving 220 pF. Configurations with less loop gain, and as a result less loop bandwidth, will be much less sensitive to capacitance load effects. Noise gain is the inverse of the feedback attenuation factor provided by the feedback network in use. Figure 3 shows a method for extending capacitance load drive capability for a unity gain follower. With these component values, the circuit will drive 5,000 pF with a 10% overshoot. VOUT +VS 8 0.01 F 100 0.01 F 4 –VS 20pF 20k CL VOUT (b) +5V RP VIN Figure 2. (a) Response with RP = 0; VIN from 0 to +VS (b) VIN = 0 to + VS + 200 m V VOUT = 0 to + VS RP = 49.9 kW VIN 1/4 AD824 Since the input stage uses n-channel JFETs, input current during normal operation is positive; the current flows out from the input terminals. If the input voltage is driven more positive than +VS – 0.4 V, the input current will reverse direction as internal device junctions become forward biased. This is illustrated in TPC 8. Figure 3. Extending Unity Gain Follower Capacitive Load Capability Beyond 350 pF REV. C –11– AD824 APPLICATIONS Single Supply Voltage-to-Frequency Converter Table I. AD824 In Amp Performance The circuit shown in Figure 4 uses the AD824 to drive a low power timer, which produces a stable pulse of width t1. The positive going output pulse is integrated by R1-C1 and used as one input to the AD824, which is connected as a differential integrator. The other input (nonloading) is the unknown voltage, VIN. The AD824 output drives the timer trigger input, closing the overall feedback loop. 10V C5 0.1 F U4 REF02 2 6 3 4 5 VREF = 5V RSCALE** 10k CMOS 74HCO4 U3B 4 3 U3A 2 1 U2 CMOS 555 R3* 116k 4 R 6 THR 2 TR 7 DIS C6 390pF 5% (NPO) GND 1 C4 0.1 F CV 5 8 V+ OUT 3 OUT2 C3 0.1 F OUT1 Parameters CMRR Common-Mode Voltage Range 3 dB BW, G = 10 G = 100 tSETTLING 2 V Step (VS = 0 V, 3 V) 5 V (VS = ± 5 V) Noise @ f = 1 kHz, G = 10 G = 100 VS = 3 V, 0 V 74 dB VS = 80 dB 5V –0.2 V to +2 V –5.2 V to +4 V 180 kHz 180 kHz 18 kHz 18 kHz 2 ms 270 nV/÷Hz 2.2 mV/÷Hz 5 ms 270 nV/÷Hz 2.2 mV/÷Hz 5µs 100 90 0.01 F, 2% R2 499k , 1% U1 1/4 R1 499k , 1% 0V TO 2.5V FULL SCALE C2 0.01 F, 2% C1 AD824 10 0% 1V Figure 5a. Pulse Response of In Amp to a 500 mV p-p Input Signal; VS = 5 V, 0 V; Gain = 10 R1 VREF 90k R2 9k R3 1k R4 1k R5 9k R6 90k NOTES fOUT = V IN/(VREF t1), t1 = 1.1 = 25kHz fS AS SHOWN. R3 C6 OHMTEK PART # 1043 * = 1% METAL FILM,
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