AD828AN

a FEATURES Excellent Video Performance Differential Gain and Phase Error of 0.01% and 0.05 High Speed 130 MHz 3 dB Bandwidth (G = +2) 450 V/ s Slew Rate 80 ns Settling Time to 0.01% Low Power 15 mA Max Power Supply Current High Output Drive Capability 50 mA Minimum Output Current per Amplifier Ideal for Driving Back Terminated Cables Flexible Power Supply Specified for +5 V, 5 V, and 15 V Operation 3.2 V Min Output Swing into a 150 Load (VS = 5 V) Excellent DC Performance 2.0 mV Input Offset Voltage Available in 8-Lead SOIC and 8-Lead Plastic Mini-DIP GENERAL DESCRIPTION OUT1 –IN1 +IN1 V– 1 2 3 4 Dual, Low Power Video Op Amp AD828 FUNCTIONAL BLOCK DIAGRAM 8 7 6 5 V+ OUT2 –IN2 +IN2 AD828 The AD828 is a low cost, dual video op amp optimized for use in video applications that require gains of +2 or greater and high output drive capability, such as cable driving. Due to its low power and single-supply functionality, along with excellent differential gain and phase errors, the AD828 is ideal for powersensitive applications such as video cameras and professional video equipment. With video specs like 0.1 dB flatness to 40 MHz and low differential gain and phase errors of 0.01% and 0.05°, along with 50 mA of output current per amplifier, the AD828 is an excellent choice for any video application. The 130 MHz gain bandwidth and 450 V/µs slew rate make the AD828 useful in many high speed applications, including video monitors, CATV, color copiers, image scanners, and fax machines. +V 0.1 F The AD828 is fully specified for operation with a single 5 V power supply and with dual supplies from ± 5 V to ± 15 V. This power supply flexibility, coupled with a very low supply current of 15 mA and excellent ac characteristics under all power supply conditions, make the AD828 the ideal choice for many demanding yet power-sensitive applications. The AD828 is a voltage feedback op amp that excels as a gain stage (gains > +2) or active filter in high speed and video systems and achieves a settling time of 45 ns to 0.1%, with a low input offset voltage of 2 mV max. The AD828 is available in low cost, small 8-lead plastic mini-DIP and SOIC packages. DIFFERENTIAL GAIN – Percent 0.03 0.02 DIFF GAIN DIFFERENTIAL PHASE – Degrees VIN RT 75 1/2 AD828 0.1 F R BT 75 75 RT 75 0.07 0.01 0.06 DIFF PHASE 0.05 –V 1k 1k Figure 1. Video Line Driver 0.04 5 10 SUPPLY VOLTAGE – 15 V Figure 2. Differential Phase vs. Supply Voltage R EV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD828–SPECIFICATIONS Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth (@ TA = 25 C, unless otherwise noted.) VS ±5 V ± 15 V 0, +5 V ±5 V ± 15 V 0, +5 V ±5 V ± 15 V 0, +5 V ±5 V ± 15 V 0, +5 V ±5 V ± 15 V ±5 V ± 15 V 0, +5 V ±5 V ± 15 V ±5 V ± 15 V ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 15 V ±5 V 0, +5 V ± 15 V ±5 V 0, +5 V ± 5 V, ± 15 V 300 400 200 Min 60 100 30 35 60 20 30 30 10 15 30 10 Typ 85 130 45 55 90 35 43 40 18 25 50 19 22.3 7.2 350 450 250 45 45 80 80 –78 10 1.5 0.01 0.02 0.08 0.05 0.07 0.1 0.5 10 3.3 25 0.3 3 2 2 5.5 2.5 3 5 4 9 5 300 1.5 +4.3 –3.4 +14.3 –13.4 +4.3 +0.9 100 120 100 Max Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz V/µs V/µs V/µs ns ns ns ns dB nV/√Hz pA/√Hz % % % Degrees Degrees Degrees mV mV µV/°C µA µA µA nA nA nA/°C V/mV V/mV V/mV V/mV V/mV V/mV kΩ pF V V V V V V dB dB dB Conditions Gain = +2 Gain = –1 Bandwidth for 0.1 dB Flatness Gain = +2 CC = 1 pF Gain = –1 CC = 1 pF Full Power Bandwidth* Slew Rate Settling Time to 0.1% Settling Time to 0.01% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain Error (RL = 150 Ω) Differential Phase Error (RL = 150 Ω) DC PERFORMANCE Input Offset Voltage VOUT = 5 V p-p RLOAD = 500 Ω VOUT = 20 V p-p RLOAD = 1 kΩ RLOAD = 1 kΩ Gain = –1 –2.5 V to +2.5 V 0 V–10 V Step, AV = –1 –2.5 V to +2.5 V 0 V–10 V Step, AV = –1 FC = 1 MHz f = 10 kHz f = 10 kHz NTSC Gain = +2 NTSC Gain = +2 0.02 0.03 0.09 0.1 TMIN to TMAX Offset Drift Input Bias Current TMIN TMAX Input Offset Current TMIN to TMAX Offset Current Drift Open-Loop Gain VOUT = ± 2.5 V RLOAD = 500 Ω TMIN to TMAX RLOAD = 150 Ω VOUT = ± 10 V RLOAD = 1 kΩ TMIN to TMAX VOUT = ± 7.5 V RLOAD = 150 Ω (50 mA Output) ±5 V ± 5 V, ± 15 V ± 5 V, ± 15 V 2 3 6.6 10 4.4 300 500 ± 15 V ± 15 V INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range ±5 V ± 15 V 0, +5 V Common-Mode Rejection Ratio VCM = +2.5 V, TMIN to TMAX VCM = ± 12 V TMIN to TMAX ±5 V ± 15 V ± 15 V +3.8 –2.7 +13 –12 +3.8 +1.2 82 86 84 –2– R EV. C AD828 Parameter OUTPUT CHARACTERISTICS Output Voltage Swing Conditions RLOAD = 500 Ω RLOAD = 150 Ω RLOAD = 1 kΩ RLOAD = 500 Ω RLOAD = 500 Ω Output Current Short Circuit Current Output Resistance MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match Skew Rate Match DC Input Offset Voltage Match Input Bias Current Match Open-Loop Gain Match Common-Mode Rejection Ratio Match Power Supply Rejection Ratio Match POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX TMIN to TMAX VS = ± 5 V to ± 15 V, TMIN to TMAX VS ±5 V ±5 V ± 15 V ± 15 V 0, +5 V ± 15 V ±5 V 0, +5 V ± 15 V Min 3.3 3.2 13.3 12.8 1.5 3.5 50 40 30 Typ 3.8 3.6 13.7 13.4 Max Unit ±V ±V ±V ±V ±V mA mA mA mA Ω Open-Loop 90 8 f = 5 MHz G = +1, f = 40 MHz G = –1 TMIN to TMAX TMIN to TMAX VO = ± 10 V, RL = 1 kΩ, TMIN to TMAX VCM = ± 12 V, TMIN to TMAX ± 5 V to ± 15 V, TMIN to TMAX Dual Supply Single Supply ± 15 V ± 15 V ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V ± 15 V ± 15 V –80 0.2 10 0.5 0.06 0.01 100 100 2 0.8 0.15 dB dB V/µs mV µA mV/V dB dB V V mA mA mA dB 80 80 ± 2.5 +5 ±5 V ±5 V ±5 V 14.0 14.0 80 90 ± 18 +36 15 15 15 Power Supply Rejection Ratio *Full power bandwidth = slew rate/2 π VPEAK. Specifications subject to change without notice. ORDERING GUIDE Model Temperature Range Package Description 8-Lead Plastic DIP 8-Lead Plastic SOIC 7" Tape and Reel 13" Tape and Reel TJ = 150 C MAXIMUM POWER DISSIPATION – Watts Package Option N-8 SO-8 SO-8 SO-8 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic DIP (N) . . . . . . . . . . . . . . . . . . See Derating Curves Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V Output Short Circuit Duration . . . . . . . . See Derating Curves Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic DIP Package: θJA = 100°C/W 8-Lead SOIC Package: θJA = 155°C/W AD828AN –40°C to +85°C AD828AR –40°C to +85°C AD828AR-REEL7 –40°C to +85°C AD828AR-REEL –40°C to +85°C 2.0 8-LEAD MINI-DIP PACKAGE 1.5 1.0 0.5 8-LEAD SOIC PACKAGE 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE – C 80 90 Figure 3. Maximum Power Dissipation vs. Temperature for Different Package Types CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD828 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. C –3– AD828—Typical Performance Characteristics QUIESCENT SUPPLY CURRENT PER AMP – mA 20 7.7 INPUT COMMON-MODE RANGE – V 15 +VCM 10 –V CM 7.2 +85 C 6.7 –40 C +25 C 5 6.2 0 0 5 10 SUPPLY VOLTAGE – 15 V 20 5.7 0 5 10 SUPPLY VOLTAGE – 15 V 20 TPC 1. Common-Mode Voltage Range vs. Supply Voltage TPC 4. Quiescent Supply Current per Amp vs. Supply Voltage for Various Temperatures 20 500 V OUTPUT VOLTAGE SWING – 15 SLEW RATE – V/ s 450 RL = 500 10 RL = 150 5 400 350 0 300 0 5 10 SUPPLY VOLTAGE – 15 V 20 0 5 10 SUPPLY VOLTAGE – 15 V 20 TPC 2. Output Voltage Swing vs. Supply Voltage TPC 5. Slew Rate vs. Supply Voltage 30 100 CLOSED-LOOP OUTPUT IMPEDANCE – OUTPUT VOLTAGE SWING – V p-p 25 Vs = 20 15V 10 15 1 10 Vs = 5 5V 0.1 0 10 100 1k LOAD RESISTANCE – 10k 0.01 1k 10k 100k 1M FREQUENCY – Hz 10M 100M TPC 3. Output Voltage Swing vs. Load Resistance TPC 6. Closed-Loop Output Impedance vs. Frequency –4– R EV. C AD828 7 100 PHASE 5V OR 15V SUPPLIES 100 15V SUPPLIES INPUT BIAS CURRENT – OPEN-LOOP GAIN – dB 5 60 60 4 40 5V SUPPLIES 20 40 3 20 2 0 RL = 1k 0 1 –60 –40 –20 0 20 40 60 80 100 120 140 –20 1k 10k TEMPERATURE – C 100k 1M 10M FREQUENCY – Hz 100M 1G TPC 7. Input Bias Current vs. Temperature TPC 10. Open-Loop Gain and Phase Margin vs. Frequency 9 15V 130 SHORT CIRCUIT CURRENT – mA 8 110 SOURCE CURRENT 90 SINK CURRENT 70 OPEN-LOOP GAIN – V/mV 7 5V 6 5 50 4 30 –60 –40 –20 0 20 40 60 80 100 120 140 3 100 TEMPERATURE – C 1k LOAD RESISTANCE – 10k TPC 8. Short Circuit Current vs. Temperature TPC 11. Open-Loop Gain vs. Load Resistance 80 80 100 90 PHASE MARGIN – Degrees –3dB BANDWIDTH – MHz 70 PHASE MARGIN 80 70 +SUPPLY 70 PSRR – dB 60 50 –SUPPLY 40 30 20 60 60 GAIN BANDWIDTH 50 50 40 –60 –40 –20 0 20 40 60 80 TEMPERATURE – C 100 120 40 140 10 100 1k 10k 100k 1M FREQUENCY – Hz 10M 100M TPC 9. –3 dB Bandwidth and Phase Margin vs. Temperature, Gain = +2 TPC 12. Power Supply Rejection vs. Frequency R EV. C –5– PHASE MARGIN – Degrees 6 A 80 80 AD828 140 –40 VIN = 1V p-p GAIN = +2 –50 120 HARMONIC DISTORTION – dB –60 CMR – dB 100 –70 –80 2ND HARMONIC –90 3RD HARMONIC 80 60 1k 10k 100k FREQUENCY – Hz 1M 10M –100 100 1k 10k 100k FREQUENCY – Hz 1M 10M TPC 13. Common-Mode Rejection vs. Frequency TPC 16. Harmonic Distortion vs. Frequency 30 50 Hz 20 INPUT VOLTAGE NOISE – nV/ 40 OUTPUT VOLTAGE – V p-p RL = 1k 30 20 10 RL = 150 10 0 100k 0 1M 10M FREQUENCY – Hz 100M 0 10 100 1k 10k FREQUENCY – Hz 100k 1M 10M TPC 14. Large Signal Frequency Response TPC 17. Input Voltage Noise Spectral Density vs. Frequency 650 10 8 V 6 550 OUTPUT SWING FROM 0 TO 1% 2 0 2 4 6 8 10 0 20 1% 0.1% 0.01% SLEW RATE – V/ s 4 450 0.1% 0.01% 350 40 60 80 100 SETTLING TIME ns 120 140 160 250 –60 –40 –20 0 20 40 60 80 TEMPERATURE – C 100 120 140 TPC 15. Output Swing and Error vs. Settling Time TPC 18. Slew Rate vs. Temperature –6– R EV. C AD828 10 8 6 4 VIN GAIN – dB 5 1pF 1k 1k AD828 150 VS = VS 15V 5V +5V 15V 0.1dB FLATNESS 40MHz 43MHz 18MHz GAIN – dB 1pF 4 3 2 1 0 –1 –2 VS = VIN 1k 1k VOUT AD828 150 VS 15V 5V +5V 0.1dB FLATNESS 50MHz 25MHz 19MHz VS = 15V VOUT 2 0 –2 –4 VS = +5V VS = 5V 5V –6 –8 –10 100k –3 –4 –5 100k VS = +5V 1M 10M FREQUENCY – Hz 100M 1M 10M FREQUENCY – Hz 100M TPC 19. Closed-Loop Gain vs. Frequency TPC 22. Closed-Loop Gain vs. Frequency, G = –1 DIFFERENTIAL GAIN – Percent 0.03 1.0 0.8 0.6 0.4 0.02 DIFF GAIN DIFFERENTIAL PHASE – Degrees GAIN – dB 0.07 0.01 0.2 0 –0.2 –0.4 VS = 5V VS = 15V 0.06 DIFF PHASE 0.05 –0.6 –0.8 VS = 5V 0.04 5 10 SUPPLY VOLTAGE – 15 V –1.0 100k 1M 10M FREQUENCY – Hz 100M TPC 20. Differential Gain and Phase vs. Supply Voltage TPC 23. Gain Flatness Matching vs. Supply, G = +2 –30 5V –40 –50 CROSSTALK – dB –60 0.1 F 1F 3 VIN 1/2 8 VOUT 5 1/2 1 7 –70 –80 –90 –100 –110 10k AD828 2 AD828 4 6 RL = 150 RL = 1k RL RL 0.1 F 1F 5V 100k 1M FREQUENCY – Hz 10M 100M USE GROUND PLANE PINOUT SHOWN IS FOR MINI-DIP PACKAGE TPC 21. Crosstalk vs. Frequency TPC 24. Crosstalk Test Circuit R EV. C –7– AD828 CF 5V 1k +VS 100 50ns 3.3 F 90 0.01 F HP PULSE (LS) VIN 1k OR FUNCTION (SS) GENERATOR 50 3 8 2 1/2 AD828 4 VOUT 1 0.01 F TEKTRONIX P6201 FET PROBE RL TEKTRONIX 7A24 PREAMP 10 0% 3.3 F –VS 5V TPC 25. Inverting Amplifier Connection TPC 28. Inverter Large Signal Pulse Response CF = 1 pF, RL = 1 kΩ 10ns 1 5 V S, 2V 100 90 50ns 100 90 200mV 10 0% 10 0% 2V 200mV TPC 26. Inverter Large Signal Pulse Response CF = 1 pF, RL = 1 kΩ 5 VS, TPC 29. Inverter Small Signal Pulse Response CF = 1 pF, RL = 1500 Ω 1 5 VS , 200mV 100 90 10ns 100 90 200mV 10ns 10 0% 10 0% 200mV 200mV TPC 27. Inverter Small Signal Pulse Response CF = 1 pF, RL = 150 Ω 5 V S, TPC 30. Inverter Small Signal Pulse Response CF = 0 pF, RL = 150 Ω 5 VS, –8– R EV. C AD828 CF 5V 1k 1k 100 50ns +VS 3.3 F 90 0.01 F 8 2 HP PULSE (LS) OR FUNCTION (SS) GENERATOR RIN VIN 100 3 50 1/2 AD828 4 VOUT 1 0.01 F TEKTRONIX P6201 FET PROBE RL TEKTRONIX 7A24 PREAMP 10 0% 3.3 F –VS 5V TPC 31. Noninverting Amplifier Connection TPC 34. Noninverting Large Signal Pulse Response 15 VS, CF = 1 pF, RL = 1 kΩ 1V 100 90 50ns 100 90 100mV 10ns 10 0% 10 0% 2V 200mV TPC 32. Noninverting Large Signal Pulse Response 5 VS, CF = 1 pF, RL = 1 kΩ TPC 35. Noninverting Small Signal Pulse Response 15 VS, CF = 1 pF, RL = 150 Ω 100mV 100 90 10ns 100 90 100mV 10ns 10 0% 10 0% 200mV 200mV TPC 33. Noninverting Small Signal Pulse Response 5 VS, CF = 1 pF, RL = 150 Ω TPC 36. Noninverting Small Signal Pulse Response 5 VS, CF = 0 pF, RL = 150 Ω R EV. C –9– AD828 THEORY OF OPERATION Circuit Board Layout The AD828 is a low cost, dual video operational amplifier designed to excel in high performance, high output current video applications. The AD828 consists of a degenerated NPN differential pair driving matched PNPs in a folded-cascade gain stage (Figure 4). The output buffer stage employs emitter followers in a class AB amplifier that delivers the necessary current to the load while maintaining low levels of distortion. The AD828 will drive terminated cables and capacitive loads of 10 pF or less. As the closed-loop gain is increased, the AD828 will drive heavier cap loads without oscillating. +VS Input and output runs should be laid out so as to physically isolate them from remaining runs. In addition, the feedback resistor of each amplifier should be placed away from the feedback resistor of the other amplifier, since this greatly reduces interamp coupling. Choosing Feedback and Gain Resistors To prevent the stray capacitance present at each amplifier’s summing junction from limiting its performance, the feedback resistors should be ≤ 1 kΩ. Since the summing junction capacitance may cause peaking, a small capacitor (1 pF to 5 pF) may be paralleled with RF to neutralize this effect. Finally, sockets should be avoided, because of their tendency to increase interlead capacitance. Power Supply Bypassing OUTPUT –IN Proper power supply decoupling is critical to preserve the integrity of high frequency signals. In carefully laid out designs, decoupling capacitors should be placed in close proximity to the supply pins, while their lead lengths should be kept to a minimum. These measures greatly reduce undesired inductive effects on the amplifier’s response. Though two 0.1 µF capacitors will typically be effective in decoupling the supplies, several capacitors of different values can be paralleled to cover a wider frequency range. +IN –VS PARALLEL AMPS PROVIDE 100 mA TO LOAD Figure 4. Simplified Schematic INPUT CONSIDERATIONS An input protection resistor (RIN in TPC 31) is required in circuits where the input to the AD828 will be subjected to transient or continuous overload voltages exceeding the ± 6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current. For high performance circuits, the “balancing” resistor should be used to reduce the offset errors caused by bias current flowing through the input and feedback resistors. The balancing resistor equals the parallel combination of RIN and RF and thus provides a matched impedance at each input terminal. The offset voltage error will then be reduced by more than an order of magnitude. APPLYING THE AD828 By taking advantage of the superior matching characteristics of the AD828, enhanced performance can easily be achieved by employing the circuit in Figure 5. Here, two identical cells are paralleled to obtain even higher load driving capability than that of a single amplifier (100 mA min guaranteed). R1 and R2 are included to limit current flow between amplifier outputs that would arise in the presence of any residual mismatch. 1k +VS 1F 0.1 F 1k 2 8 R1 5 1 1/2 AD828 3 VIN 5 VOUT R2 5 7 0.1 F 1F RL The AD828 is a breakthrough dual amp that delivers precision and speed at low cost with low power consumption. The AD828 offers excellent static and dynamic matching characteristics, combined with the ability to drive heavy resistive loads. As with all high frequency circuits, care should be taken to maintain overall device performance as well as their matching. The following items are presented as general design considerations. 1/2 1k 6 AD828 4 1k –VS Figure 5. Parallel Amp Configuration –10– R EV. C AD828 AIN 5 10 2 5 10 5 10 5 36 100FT RG59A/U RZ = 75 5 10 5 10 5 36 3 1/2 AD828 RZ 1 RZ 1 3 BIN 5 10 1/2 AD828 2 6 BOUT 7 6 1/2 AD828 5 5 1/2 AD828 7 AOUT Figure 6. Bidirectional Transmission CKT Full-Duplex Transmission Superior load handling capability (50 mA min/amp), high bandwidth, wide supply voltage range, and excellent crosstalk rejection makes the AD828 an ideal choice for even the most demanding high speed transmission applications. The schematic below shows a pair of AD828s configured to drive 100 feet of coaxial cable in a full-duplex fashion. Two different NTSC video signals are simultaneously applied at AIN and BIN and are recovered at AOUT and BOUT, respectively. This situation is illustrated in Figures 7 and 8. These pictures clearly show that each input signal appears undisturbed at its output, while the unwanted signal is eliminated at either receiver. The transmitters operate as followers, while the receivers’ gain is chosen to take full advantage of the AD828’s unparalleled CMRR. In practice, this gain is adjusted slightly from its theoretical value to compensate for cable nonidealities and losses. R Z i s chosen to match the characteristic impedance of the cable employed. Finally, although a coaxial cable was used, the same topology applies unmodified to a variety of cables (such as twisted pairs often used in telephony). 500mV 100 500mV 100 AIN 90 BIN 90 BOUT 10 0% AOUT 10 0% 500mV 10µs 500mV 10µs Figure 7. A Transmission/B Reception Figure 8. B Transmission/A Reception A High Performance Video Line Driver +15V 0.1 F VIN RT 75 3 8 1.0 F 75 1 R BT 75 RT 75 The buffer circuit shown in Figure 9 will drive a back-terminated 75 Ω video line to standard video levels (1 V p-p) with 0.1 dB gain flatness to 40 MHz with only 0.05° and 0.01% differential phase and gain at the 3.58 MHz NTSC subcarrier frequency. This level of performance, which meets the requirements for high definition video displays and test equipment, is achieved using only 7 mA quiescent current/amplifier. 1/2 AD828 2 4 –15V 1k 1k 0.1 F 1.0 F Figure 9. Video Line Driver R EV. C –11– AD828 LOW DISTORTION LINE DRIVER 1.1k +VS 1k 1F 0.1 F 2 1/2 8 The AD828 can quickly be turned into a powerful, low distortion line driver (see Figure 10). In this arrangement, the AD828 can comfortably drive a 75 Ω back-terminated cable with a 5 MHz, 2 V p-p input, while achieving the harmonic distortion performance outlined in the following table. Configuration 1. No Load 2. 150 Ω RL Only 3. 150 Ω RL 7.5 Ω RC 2nd Harmonic AD828 3 1k 1k 6 –78.5 dBm –63.8 dBm –70.4 dBm VIN RC 7.5 In this application, one half of the AD828 operates at a gain of +2.1 and supplies the current to the load, while the other provides the overall system gain of +2. This is important for two reasons: the first is to keep the bandwidth of both amplifiers the same, and the second is to preserve the AD828’s ability to operate from low supply voltage. RC varies with the load and must be chosen to satisfy the following equation: RC = MRL where M is defined by [(M + 1) GS = GD] and GD = Driver’s Gain, GS = System Gain. 1/2 75 7 1F 0.1 F RL AD828 5 75 4 75 –VS Figure 10. Low Distortion Amplifier OUTLINE DIMENSIONS 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) 8-Lead Standard Small Outline Package [SOIC] (R-8) Dimensions shown in millimeters and (inches) 0.4299 (10.92) 0.3480 (8.84) 8 5 5.00 (0.1968) 4.80 (0.1890) 0.2799 (7.11) 0.2402 (6.10) 8 5 4 1 4 0.1574 (4.00) 0.1497 (3.80) 0.3248 (8.25) 0.3000 (7.62) PIN 1 1 6.20 (0.2440) 5.80 (0.2284) PIN 1 0.1000 (2.54) BSC 0.2098 (5.33) MAX 0.1598 (4.06) 0.1154 (2.93) 0.0220 (0.56) 0.0142 (0.36) 0.0697 (1.77) 0.0453 (1.15) 0.0598 (1.52) 0.0150 (0.38) 0.1299 (3.30) MIN SEATING PLANE 1.27 (0.0500) BSC 0.1949 (4.95) 0.1154 (2.93) 0.0150 (0.38) 0.0079 (0.20) COPLANARITY 0.25 (0.0098) 0.10 (0.0040) SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.33 (0.0130) 8 0.25 (0.0098) 0 0.19 (0.0075) 0.50 (0.0196) 0.25 (0.0099) 45 1.27 (0.0500) 0.41 (0.0160) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012 AA Revision History Location 6/02–Data Sheet changed from REV. B to REV. C. Page Renumbered Figures and TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Changes to Figure 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 –12– REV. C PRINTED IN U.S.A. C00879–0–6/02(C) 1