AD829JR-REEL

High Speed, Low Noise Video Op Amp AD829 FEATURES High Speed 120 MHz Bandwidth, Gain = –1 230 V/ s Slew Rate 90 ns Settling Time to 0.1% Ideal for Video Applications 0.02% Differential Gain 0.04 Differential Phase Low Noise 1.7 nV/√Hz Input Voltage Noise 1.5 pA/√Hz Input Current Noise Excellent DC Precision 1 mV Max Input Offset Voltage (Over Temp) 0.3 mV/ C Input Offset Drift Flexible Operation Specified for 5 V to 15 V Operation 3 V Output Swing into a 150 Load External Compensation for Gains 1 to 20 5 mA Supply Current Available in Tape and Reel in Accordance with EIA-481A Standard GENERAL DESCRIPTION CONNECTION DIAGRAMS 8-Lead PDIP(N), Cerdip (Q), and SOIC (R) Packages OFFSET NULL 1 –IN +IN 2 3 AD829 8 7 6 OFFSET NULL +VS OUTPUT –VS 4 TOP VIEW 5 CCOMP (Not to Scale) 20-Lead LCC Pinout NC OFFSET NULL NC OFFSET NULL NC 3 NC 4 –IN 5 NC 6 +IN 7 NC 8 2 1 20 19 18 NC AD829 TOP VIEW (Not to Scale) 17 +V 16 NC 15 OUTPUT 14 NC 9 10 11 12 13 The AD829 is a low noise (1.7 nV/√Hz), high speed op amp with custom compensation that provides the user with gains of ± 1 to ± 20 while maintaining a bandwidth greater than 50 MHz. The AD829’s 0.04° differential phase and 0.02% differential gain performance at 3.58 MHz and 4.43 MHz, driving reverseterminated 50 Ω or 75 Ω cables, makes it ideally suited for professional video applications. The AD829 achieves its 230 V/µs uncompensated slew rate and 750 MHz gain bandwidth while requiring only 5 mA of current from power supplies. The AD829’s external compensation pin gives it exceptional versatility. For example, compensation can be selected to optimize the bandwidth for a given load and power supply voltage. As a gain-of-two line driver, the –3 dB bandwidth can be increased to 95 MHz at the expense of 1 dB of peaking. The AD829’s output can also be clamped at its external compensation pin. The AD829 exhibits excellent dc performance. It offers a minimum open-loop gain of 30 V/mV into loads as low as 500 Ω, low input voltage noise of 1.7 nV/√Hz, and a low input offset voltage of 1 mV maximum. Common-mode rejection and power supply rejection ratios are both 120 dB. This op amp is also useful in multichannel, high speed data conversion where its fast (90 ns to 0.1%) settling time is important. In such applications, the AD829 serves as an input buffer for 8-bit to 10-bit A/D converters and as an output I/V converter for high speed DACs. R EV. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. NC = NO CONNECT Operating as a traditional voltage feedback amplifier, the AD829 provides many of the advantages a transimpedance amplifier offers. A bandwidth greater than 50 MHz can be maintained for a range of gains through the replacement of the external compensation capacitor. The AD829 and the transimpedance amplifier are both unity gain stable and provide similar voltage noise performance (1.7 nV/√Hz); however, the current noise of the AD829 (1.5 pA/√Hz) is less than 10% of the noise of transimpedance amps. The inputs of the AD829 are symmetrical. PRODUCT HIGHLIGHTS 1. Input voltage noise of 2 nV/√Hz, current noise of 1.5 pA/√Hz, and 50 MHz bandwidth, for gains of 1 to 20, make the AD829 an ideal preamp. 2. Differential phase error of 0.04° and a 0.02% differential gain error, at the 3.58 MHz NTSC and 4.43 MHz PAL and SECAM color subcarrier frequencies, make the op amp an outstanding video performer for driving reverse-terminated 50 Ω and 75 Ω cables to ± 1 V (at their terminated end). 3. The AD829 can drive heavy capacitive loads. 4. Performance is fully specified for operation from ± 5 V to ± 15 V supplies. 5. The AD829 is available in plastic, CERDIP, and small outline packages. Chips and MIL-STD-883B parts are also available. The SOIC-8 package is available for the extended temperature range of –40°C to +125°C. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved. NC CCOMP NC NC –V AD829–SPECIFICATIONS (@ T = 25 C and V = A S 15 V dc, unless otherwise noted.) Min AD829JR Typ Max 0.2 0.3 3.3 50 0.5 30 20 65 40 30 20 7 8.2 500 500 1 1 AD829AR Min Typ Max 0.2 0.3 3.3 50 0.5 65 40 50 20 100 85 600 750 25 3.6 150 230 65 90 60 0.02 0.04 100 100 96 98 94 2 120 120 120 1.7 1.5 +4.3 –3.8 +14.3 –13.8 ± 3.6 ± 3.0 ± 1.4 ± 12 ± 13.3 ± 10 ± 12.2 32 13 5 1.5 2 ± 3.0 ± 2.5 ± 3.0 ± 2.5 ± 12 ± 10 2 100 100 96 98 94 50 20 30 20 7 9.5 500 500 1 1 AD829AQ/S Min Typ Max 0.1 0.3 3.3 50 0.5 65 40 100 85 600 750 25 3.6 150 230 65 90 60 0.02 0.04 120 120 120 1.7 1.5 +4.3 –3.8 +14.3 –13.8 ± 3.6 ± 3.0 ± 1.4 ± 13.3 ± 12.2 32 13 5 1.5 2 2 7 9.5 500 500 0.5 0.5 Unit mV mV µV/°C µA µA nA nA nA/°C V/mV V/mV V/mV V/mV V/mV V/mV MHz MHz MHz MHz V/µs V/µs ns ns Degrees Model INPUT OFFSET VOLTAGE Conditions TMIN to TMAX VS ± 5 V, ± 15 V ± 5 V, ± 15 V ± 5 V, ± 15 V Offset Voltage Drift INPUT BIAS CURRENT TMIN to TMAX INPUT OFFSET CURRENT TMIN to TMAX Offset Current Drift OPEN-LOOP GAIN VO = ± 2.5 V RLOAD = 500 Ω TMIN to TMAX RLOAD = 150 Ω VOUT = ± 10 V RLOAD = 1 kΩ TMIN to TMAX RLOAD = 500 Ω ± 5 V, ± 15 V ± 5 V, ± 15 V ±5 V ± 15 V 50 20 100 85 ±5 V ± 15 V 600 750 25 3.6 150 230 65 90 60 ± 15 V 0.02 ± 15 V 0.04 ±5 V ± 15 V 100 100 96 98 94 ± 15 V ± 15 V ±5 V ± 15 V 120 120 120 1.7 1.5 +4.3 –3.8 +14.3 –13.8 ± 3.0 ± 2.5 ± 12 ± 10 ± 3.6 ± 3.0 ± 1.4 ± 13.3 ± 12.2 32 13 5 1.5 Degrees dB dB dB dB dB nV/√Hz pA/√Hz V V V V V V V V V mA kΩ pF pF mΩ DYNAMIC PERFORMANCE Gain Bandwidth Product Full Power Bandwidth1, 2 VO = 2 V p-p RLOAD = 500 Ω VO = 20 V p-p RLOAD = 1 kΩ RLOAD = 500 Ω RLOAD = 1 kΩ AV = –19 –2.5 V to +2.5 V 10 V Step CLOAD = 10 pF RLOAD = 1 kΩ 3 ±5 V ± 15 V ±5 V ± 15 V ±5 V ± 15 V ± 15 V Slew Rate2 Settling Time to 0.1% Phase Margin2 DIFFERENTIAL GAIN ERROR RLOAD = 100 Ω CCOMP = 30 pF 3 % DIFFERENTIAL PHASE ERROR COMMON-MODE REJECTION RLOAD = 100 Ω CCOMP = 30 pF VCM = ± 2.5 V VCM = ± 12 V TMIN to TMAX VS = ± 4.5 V to ± 18 V TMIN to TMAX f = 1 kHz f = 1 kHz POWER SUPPLY REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE OUTPUT VOLTAGE SWING RLOAD = 500 Ω RLOAD = 150 Ω RLOAD = 50 Ω RLOAD = 1 kΩ RLOAD = 500 Ω Short Circuit Current INPUT CHARACTERISTICS Input Resistance (Differential) Input Capacitance (Differential)4 Input Capacitance (Common Mode) CLOSED-LOOP OUTPUT RESISTANCE AV = +1, f = 1 kHz ±5 V ±5 V ±5 V ± 15 V ± 15 V ± 5 V, ± 15 V 2 –2– R EV. G AD829 Model POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX TMIN to TMAX TRANSISTOR COUNT Number of Transistors 46 Conditions VS Min ± 4.5 5 5.3 AD829JR Typ Max ± 18 6.5 8.0 6.8 8.3 Min ± 4.5 5 5.3 46 AD829AR Typ Max ± 18 6.5 8.0 6.8 9.0 AD829AQ/S Min Typ Max ± 4.5 5 5.3 46 ± 18 6.5 8.2/8.7 6.8 8.5/9.0 Unit V mA mA mA mA ± 15 V ± 15 V NOTES 1 Full Power Bandwidth = Slew Rate/2 π VPEAK. 2 Tested at Gain = +20, C COMP = 0 pF. 3 3.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM). 4 Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair. Specifications subject to change without notice. R EV. G –3– AD829 ABSOLUTE MAXIMUM RATINGS 1 METALLIZATION PHOTO Contact factory for latest dimensions. Dimensions shown in inches and (mm). Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 PDIP (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 W CERDIP (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 W Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± V Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . ± 6 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (Q, E) . . . . . . . . –65°C to +150°C Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C Operating Temperature Range AD829J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C AD829A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C AD829S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Maximum internal power dissipation is specified so that T J does not exceed 150°C at an ambient temperature of 25 °C. Thermal characteristics: 8-lead PDIP package: θJA = 100°C/W (derate at 8.7 mW/ °C) 8-lead CERDIP package: θJA = 110°C/W (derate at 8.7 mW/ °C) 20-lead LCC package: θJA = 77°C/W 8-lead SOIC package: θJA = 125°C/W (derate at 6 mW/ °C). 3 If the differential voltage exceeds 6 V, external series protection resistors should be added to limit the input current. SUBSTRATE CONNECTED TO +V S 2.5 MAXIMUM POWER DISSIPATION (W) 2.0 PDIP LCC 1.5 1.0 CERDIP 0.5 SOIC 0 –55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125 AMBIENT TEMPERATURE ( C) Figure 1. Maximum Power Dissipation vs. Temperature CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD829 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– R EV. G AD829 ORDERING GUIDE Model AD829AR AD829AR-REEL AD829AR-REEL7 AD829ARZ* AD829ARZ-REEL* AD829ARZ-REEL7* AD829JN AD829JR AD829JR-REEL AD829JR-REEL7 AD829AQ AD829SQ AD829SQ/883B 5962-9312901MPA AD829SE/883B 5962-9312901M2A AD829JCHIPS AD829SCHIPS *Z = Pb-free part. Temperature Range –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –40°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C Package Description 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic PDIP 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead Plastic SOIC 8-Lead CERDIP 8-Lead CERDIP 8-Lead CERDIP 8-Lead CERDIP 20-Lead LCC 20-Lead LCC Die Die Package Option R-8 R-8 R-8 R-8 R-8 R-8 N-8 R-8 R-8 R-8 Q-8 Q-8 Q-8 Q-8 E-20A E-20A R EV. G –5– AD829–Typical Performance Characteristics 20 INPUT COMMON-MODE RANGE (V) 20 30 OUTPUT VOLTAGE SWING (V p–p) MAGNITUDE OF THE OUTPUT VOLTAGE (V) 25 15 V SUPPLIES 15 +VOUT 10 –VOUT 5 15 +VOUT 20 10 –VOUT 15 10 5 0 10 5V SUPPLIES 5 RLOAD = 1k 0 0 0 5 10 15 SUPPLY VOLTAGE ( V) 20 0 5 10 15 SUPPLY VOLTAGE (±V) 20 1k 100 LOAD RESISTANCE ( ) 10k TPC 1. Input Common-Mode Range vs. Supply Voltage TPC 2. Output Voltage Swing vs. Supply Voltage TPC 3. Output Voltage Swing vs. Resistive Load 6.0 –5 100 CLOSED-LOOP OUTPUT IMPEDANCE ( ) QUIESCENT CURRENT (mA) INPUT BIAS CURRENT ( A) 5.5 10 –4 AV = +20 CCOMP = 0pF 1 5.0 VS = –3 5V, 15V 0.1 AV = +1 CCOMP = 68pF 0.01 4.5 4.0 0 5 10 15 SUPPLY VOLTAGE ( V) 20 –2 – 60 – 40 – 20 0 20 40 60 80 100 120 140 TEMPERATURE ( C) 0.001 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) TPC 4. Quiescent Current vs. Supply Voltage TPC 5. Input Bias Current vs. Temperature TPC 6. Closed-Loop Output Impedance vs. Frequency 7 40 SHORT CIRCUIT CURRENT LIMIT (mA) 65 NEGATIVE CURRENT LIMIT –3 dB BANDWIDTH (MHz) QUIESCENT CURRENT (mA) 35 POSITIVE CURRENT LIMIT VS = ±15V AV = +20 CCOMP = 0pF 60 6 VS = 15V 30 5 VS = 4 5V 55 25 VS = 5V 50 20 3 – 60 – 40 – 20 0 20 40 60 80 100 120 140 TEMPERATURE ( C) 15 – 60 – 40 – 20 0 20 40 60 80 100 120 140 AMBIENT TEMPERATURE ( C) 45 – 60 – 40 – 20 0 20 40 60 80 100 120 140 TEMPERATURE ( C) TPC 7. Quiescent Current vs. Temperature TPC 8. Short-Circuit Current Limit vs. Temperature TPC 9. –3 dB Bandwidth vs. Temperature –6– R EV. G AD829 120 PHASE 100 80 100 100 105 120 +SUPPLY VS = 15V 100 OPEN-LOOP GAIN (dB) OPEN-LOOP GAIN (dB) PHASE (Degrees) 80 PSRR (dB) GAIN 15V SUPPLIES 1k LOAD GAIN 5V SUPPLIES 500 LOAD CCOMP = 0pF 60 95 80 – SUPPLY 60 40 90 VS = 5V 60 40 20 85 20 0 100 0 –20 100M 80 40 CCOMP = 0pF 1k 10k 100k 1M FREQUENCY (Hz) 10M 75 10 20 1k 100 LOAD RESISTANCE ( ) 10k 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M TPC 10. Open-Loop Gain and Phase Margin vs. Frequency TPC 11. Open-Loop Gain vs. Resistive Load TPC 12. Power Supply Rejection Ratio (PSRR) vs. Frequency 120 30 25 10 8 V OUTPUT SWING FROM 0 TO VS = ±15V RL = 1k AV = +20 CCOMP = 0pF VS = ±5V RL = 500 AV = +20 CCOMP = 0pF OUTPUT VOLTAGE (V p–p) 100 6 4 2 1% 0 1% –2 –4 –6 –8 0.1% 0.1% ERROR AV = –19 CCOMP = 0pF 20 CMRR (dB) 80 15 60 CCOMP = 0pF 40 10 5 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 1 20 –10 10 INPUT FREQUENCY (MHz) 100 0 20 40 60 80 100 120 140 160 SETTLING TIME (ns) TPC 13. Common-Mode Rejection Ratio vs. Frequency TPC 14. Large Signal Frequency Response TPC 15. Output Swing and Error vs. Settling Time –70 –75 –80 THD (dB) –20 VIN = 3V RMS AV = –1 CCOMP = 30pF CLOAD = 100pF THD (dB) 5 INPUT VOLTAGE NOISE (nV/ Hz) VIN = 2.24V RMS AV = –1 RL = 250 CLOAD = 0 CCOMP = 30pF THIRD HARMONIC –30 4 –85 –90 –95 RL = 500 –40 3 –50 SECOND HARMONIC 2 –100 RL = 2k –105 –110 100 –60 1 –70 300 1k 3k 10k FREQUENCY (Hz) 30k 100k 0 500k 1.5M 1.0M FREQUENCY (Hz) 2.0M 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M TPC 16. Total Harmonic Distortion (THD) vs. Frequency TPC 17. Second and Third Harmonic Distortion vs. Frequency TPC 18. Input Voltage Noise Spectral Density R EV. G –7– AD829 400 AV = +20 SLEW RATE 10% to 90% RISE 0.03 0.02 DIFFERENTIAL PHASE (Degrees) DIFFERENTIAL GAIN (Percent) 350 CCOMP (EXTERNAL) +VS 0.1 F SLEW RATE (V/ s) 300 DIFF GAIN 0.01 250 200 VS = 15V FALL RISE FALL AD829 0.1 F 20k 0.043 0.05 DIFF PHASE 0.04 0.03 5 10 SUPPLY VOLTAGE (V) 15 150 VS = 100 – 60 – 40 – 20 5V 0 20 40 60 80 100 120 140 TEMPERATURE ( C) OFFSET NULL ADJUST –VS TPC 19. Slew Rate vs. Temperature TPC 20. Differential Gain and Phase vs. Supply Figure 2. Offset Null and External Shunt Compensation Connections 0.1 F +15V CCOMP 15pF 50 CABLE HP8130A 5ns RISE TIME 50 50 50 CABLE AD829 TEKTRONIX TYPE 7A24 PREAMP 50 0.1 F 5pF 300 –15V 300 Figure 3a. Follower Connection. Gain = +2 Figure 3b. Gain-of-2 Follower Large Signal Pulse Response Figure 3c. Gain-of-2 Follower Small Signal Pulse Response –8– R EV. G AD829 +15V 0.1 F 50 CABLE HP8130A 5ns RISE TIME 45 5 100 FET PROBE AD829 TEKTRONIX TYPE 7A24 PREAMP 1pF 2k 0.1 F –15V CCOMP = 0pF 105 Figure 4a. Follower Connection. Gain = +20 Figure 4b. Gain-of-20 Follower Large Signal Pulse Response 5pF 300 +15V 0.1 F 50 CABLE HP8130A 5ns RISE TIME 300 Figure 4c. Gain-of-20 Follower Small Signal Pulse Response 50 AD829 CCOMP 15pF 50 50 CABLE TEKTRONIX TYPE 7A24 PREAMP 50 0.1 F –15V Figure 5a. Unity Gain Inverter Connection Figure 5b. Unity Gain Inverter Large Signal Pulse Response Figure 5c. Unity Gain Inverter Small Signal Pulse Response R EV. G –9– AD829 THEORY OF OPERATION +VS The AD829 is fabricated on Analog Devices’ proprietary complementary bipolar (CB) process, which provides PNP and NPN transistors with similar fTs of 600 MHz. As shown in Figure 6, the AD829 input stage consists of an NPN differential pair in which each transistor operates at 600 µA collector current. This gives the input devices a high transconductance, which in turn gives the AD829 a low noise figure of 2 nV/√Hz @ 1 kHz. The input stage drives a folded cascode that consists of a fast pair of PNP transistors. These PNPs drive a current mirror that provides a differential-input-to-single-ended-output conversion. The high speed PNPs are also used in the current-amplifying output stage, which provides high current gain of 40,000. Even under conditions of heavy loading, the high fTs of the NPN and PNPs, produced using the CB process, permits cascading two stages of emitter followers while maintaining 60° phase margin at closed-loop bandwidths greater than 50 MHz. Two stages of complementary emitter followers also effectively buffer the high impedance compensation node (at the CCOMP pin) from the output so the AD829 can maintain a high dc open-loop gain, even into low load impedances: 92 dB into a 150 Ω load and 100 dB into a 1 kΩ load. Laser trimming and PTAT biasing ensure low offset voltage and low offset voltage drift, enabling the user to eliminate ac coupling in many applications. For added flexibility, the AD829 provides access to the internal frequency compensation node. This allows the user to customize frequency response characteristics for a particular application. Unity gain stability requires a compensation capacitance of 68 pF (Pin 5 to ground), which will yield a small signal bandwidth of 66 MHz and slew rate of 16 V/µs. The slew rate and gain bandwidth product will vary inversely with compensation capacitance. Table I and Figure 8 show the optimum compensation capacitance and the resulting slew rate for a desired noise gain. For gains between 1 and 20, CCOMP can be chosen to keep the small signal bandwidth relatively constant. The minimum gain that will still provide stability depends on the value of external compensation capacitance. An RC network in the output stage (Figure 6) completely removes the effect of capacitive loading when the amplifier is compensated for closed-loop gains of 10 or higher. At low frequencies, and with low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case, C is bootstrapped and does not contribute to the compensation capacitance of the device. As the capacitive load is increased, a pole is formed with the output impedance of the output stage this reduces the gain, and subsequently, C is incompletely bootstrapped. Therefore, some fraction of C contributes to the compensation capacitance, and the unity gain bandwidth falls. As the load capacitance is further increased, the bandwidth continues to fall and the amplifier remains stable. Externally Compensating the AD829 +IN –IN 15 OUTPUT C 12.5pF R 500 15 1.2mA –VS OFFSET NULL CCOMP Figure 6. Simplified Schematic Shunt Compensation Figures 7 and 8 show that shunt compensation has an external compensation capacitor, CCOMP, connected between the compensation pin and ground. This external capacitor is tied in parallel with approximately 3 pF of internal capacitance at the compensation node. In addition, a small capacitance, CLEAD, in parallel with resistor R2, compensates for the capacitance at the amplifier’s inverting input. R2 CLEAD +VS 50 COAX CABLE VIN 50 0.1 F R1 AD829 CCOMP 0.1 F 1k VOUT –VS Figure 7. Inverting Amplifier Connection Using External Shunt Compensation +VS 0.1 F 50 CABLE VIN 50 AD829 R2 CCOMP –VS 0.1 F 1k VOUT The AD829 is stable with no external compensation for noise gains greater than 20. For lower gains, two different methods of frequency compensating the amplifier can be used to achieve closed-loop stability: shunt and current feedback compensation. CLEAD R1 Figure 8. Noninverting Amplifier Connection Using External Shunt Compensation –10– R EV. G AD829 Table I. Component Selection for Shunt Compensation Follower Gain 1 2 5 10 20 25 100 Inverter Gain –1 –4 –9 –19 –24 –99 R1 () Open 1k 511 226 105 105 20 R2 () 100 1k 2.0 k 2.05 k 2k 2.49 2k CL (pF) 0 5 1 0 0 0 0 CCOMP (pF) 68 25 7 3 0 0 0 Slew Rate (V/ s) 16 38 90 130 230 230 230 –3 dB Small Signal Bandwidth (MHz) 66 71 76 65 55 39 7.5 Table I gives the recommended CCOMP and CLEAD values, as well as the corresponding slew rates and bandwidth. The capacitor values were selected to provide a small signal frequency response with less than 1 dB of peaking and less than 10% overshoot. For this table, supply voltages of ± 15 V should be used. Figure 9 is a graphical extension of the table that shows the slew rate/gain trade-off for lower closed-loop gains, when using the shunt compensation scheme. 100 1k then Slew Rate kT =4π q fT This shows that the slew rate will be only 0.314 V/µs for every MHz of bandwidth. The only way to increase slew rate is to increase the fT, and that is difficult because of process limitations. Unfortunately, an amplifier with a bandwidth of 10 MHz can only slew at 3.1 V/µs, which is barely enough to provide a full power bandwidth of 50 kHz. The AD829 is especially suited to a new form of compensation that allows for the enhancement of both the full power bandwidth and slew rate of the amplifier. The voltage gain from the inverting input pin to the compensation pin is large; therefore, if a capacitance is inserted between these pins, the amplifier’s bandwidth becomes a function of its feedback resistor and the capacitance. The slew rate of the amplifier is now a function of its internal bias (2I) and the compensation capacitance. Since the closed-loop bandwidth is a function of RF and CCOMP (Figure 10), it is independent of the amplifier closed-loop gain, as shown in Figure 12. To preserve stability, the time constant of RF and CCOMP needs to provide a bandwidth of less than 65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the small signal bandwidth of the AD829 is 10 MHz. Figure 11 shows that the slew rate is in excess of 60 V/µs. As shown in Figure 12, the closed-loop bandwidth is constant for gains of –1 to –4; this is a property of current feedback amplifiers. RF CCOMP 0.1 F +V S 50 COAX CABLE VIN 50 0.1 F *RECOMMENDED VALUE OF CCOMP FOR C1