700 MHz to 1000 MHz
RF Vector Modulator
AD8340
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VPRF
QBBP QBBM
VPS2
90°
RFIP
RFOP
RFIM
RFOM
0°
CMOP
IBBP IBBM
DSOP
04699-001
Cartesian amplitude and phase modulation
700 MHz to 1.0 GHz frequency range
Continuous magnitude control of −2 dB to −32 dB
Continuous phase control of 0° to 360°
Output third-order intercept 24 dBm
Output 1 dB compression point 11 dBm
Output noise floor −149 dBm/Hz at full gain
Adjustable modulation bandwidth up to 230 MHz
Fast output power disable
4.75 V to 5.25 V single-supply voltage
Figure 1.
APPLICATIONS
RF PA linearization/RF predistortion
Amplitude and phase modulation
Variable attenuators and phase shifters
CDMA2000, GSM/EDGE linear power amplifiers
Smart antennas
GENERAL DESCRIPTION
The AD8340 vector modulator performs arbitrary amplitude
and phase modulation of an RF signal. Because the RF signal
path is linear, the original modulation is preserved. This part
can be used as a general-purpose RF modulator, a variable
attenuator/phase shifter, or a remodulator. The amplitude can
be controlled from a maximum of −2 dB to less than −32 dB,
and the phase can be shifted continuously over the entire 360°
range. For maximum gain, the AD8340 delivers an OP1dB
of 11 dBm, an OIP3 of 24 dBm, and an output noise floor of
−149 dBm/Hz, independent of phase. It operates over a frequency range of 700 MHz to 1.0 GHz.
The baseband inputs in Cartesian I and Q format control the
amplitude and phase modulation imposed on the RF input
signal. Both I and Q inputs are dc-coupled with a ±500 mV
differential full-scale range. The maximum modulation bandwidth is 230 MHz, which can be reduced by adding external
capacitors to limit the noise bandwidth on the control lines.
Rev. C
Both the RF inputs and outputs can be used differentially or
single-ended and must be ac-coupled. The RF input and output
impedances are nominally 50 Ω over the operating frequency
range. The DSOP pin allows the output stage to be disabled
quickly to protect subsequent stages from overdrive. The
AD8340 operates off supply voltages from 4.75 V to 5.25 V
while consuming approximately 130 mA.
The AD8340 is fabricated using the Analog Devices, Inc.
proprietary, high performance 25 GHz SOI complementary
bipolar IC process. It is available in a 24-lead RoHS-compliant
LFCSP package and operates over a −40°C to +85°C temperature range. Evaluation boards are available.
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AD8340
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Noise and Distortion.................................................................. 11
Applications ....................................................................................... 1
Gain and Phase Accuracy.......................................................... 11
Functional Block Diagram .............................................................. 1
RF Frequency Range .................................................................. 11
General Description ......................................................................... 1
Applications Information .............................................................. 12
Revision History ............................................................................... 2
Using the AD8340 ...................................................................... 12
Specifications..................................................................................... 3
RF Input and Matching ............................................................. 12
Absolute Maximum Ratings............................................................ 4
RF Output and Matching .......................................................... 13
ESD Caution .................................................................................. 4
Driving the I-Q Baseband Controls......................................... 13
Pin Configuration and Function Descriptions ............................. 5
Interfacing to High Speed DACs .............................................. 14
Typical Performance Characteristics ............................................. 6
CDMA2000 Application ........................................................... 14
Theory of Operation ...................................................................... 10
Evaluation Board ............................................................................ 16
RF Quadrature Generator ......................................................... 10
Schematic and Artwork ............................................................. 18
I-Q Attenuators and Baseband Amplifiers.............................. 11
Outline Dimensions ....................................................................... 20
Output Amplifier ........................................................................ 11
Ordering Guide .......................................................................... 20
REVISION HISTORY
3/14—Rev. B to Rev. C
Added Exposed Pad Notation, Figure 2 and Table 3 ................... 5
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 20
8/07—Rev. A to Rev B
Replaced Pin Configuration and Function
Descriptions Section ........................................................................ 5
Changes to Figure 30 ...................................................................... 12
Changes to Figure 39 ...................................................................... 18
7/07—Rev. 0 to Rev. A
Replaced Pin Configuration and Function
Descriptions Section ........................................................................ 5
Changes to Ordering Guide .......................................................... 20
6/04—Revision 0: Initial Version
Rev. C | Page 2 of 20
Data Sheet
AD8340
SPECIFICATIONS
VS = 5 V, TA = 25°C, ZO = 50 Ω, f = 880 MHz, single-ended, ac-coupled source drive to RFIP through 5.6 nH series inductor, RFIM
ac-coupled through 5.6 nH series inductor to common, differential-to-single-ended conversion at output using 1:1 balun.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
Maximum Gain
Minimum Gain
Gain Control Range
Phase Control Range
Gain Flatness
Group Delay Flatness
RF INPUT STAGE
Input Return Loss
CARTESIAN CONTROL INTERFACE (I and Q)
Gain Scaling
Modulation Bandwidth
Second Harmonic Distortion
Third Harmonic Distortion
Step Response
RF OUTPUT STAGE
Output Return Loss
f = 880 MHz
Gain
Output Noise Floor
Output IP3
ACPR
Output 1 dB Compression Point
POWER SUPPLY
Positive Supply Voltage
Total Supply Current
OUTPUT DISABLE
Disable Threshold
Maximum Attenuation
Enable Response Time
Disable Response Time
Conditions
Min
Typ
Max
Unit
1000
−2
−32
30
360
0.25
10
MHz
dB
dB
dB
Degrees
dB
ps
20
dB
2
230
47
45
45
1/V
MHz
dBc
dBc
ns
47
ns
7.5
dB
−2
−149
−147
24
62
dB
dBm/Hz
dBm/Hz
dBm
dBc
11
dBm
700
Maximum gain setpoint for all phase setpoints
VBBI = VBBQ = 0 V
Relative to maximum gain
Over 30 dB control range
Over any 60 MHz bandwidth
Over any 60 MHz bandwidth
RFIM, RFIP (Pin 21 and Pin 22)
From RFIP to CMRF (with 5.6 nH series inductors)
IBBP, IBBM, QBBP, QBBM (Pin 16, Pin 15, Pin 3, Pin 4)
250 mV p-p sinusoidal baseband input single-ended
250 mV p-p, 1 MHz, sinusoidal baseband input differential
250 mV p-p, 1 MHz, sinusoidal baseband input differential
For gain setpoint from 0.1 to 0.9
(VBBP = 0.5 V, VBBM = 0.55 V to 0.95 V)
For gain setpoint from 0.9 to 0.1
(VBBP = 0.5 V, VBBM = 0.95 V to 0.55 V)
RFOP, RFOM (Pin 9 and Pin 10)
Measured through balun
Maximum gain setpoint
Maximum gain setpoint, no input
PIN = 0 dBm, frequency offset = 20 MHz
f1 = 880 MHz, f2 = 877.5 MHz, maximum gain setpoint
IS-95, single carrier, POUT = 0 dBm, maximum gain,
phase setpoint = 45°
Maximum gain
VPS2 (Pin 5, Pin 6, Pin 14); RFOP, RFOM (Pin 9 and Pin 10)
Includes load current
DSOP (Pin 13)
DSOP = 5 V
Delay following high-to-low transition until device
meets full specifications
Delay following low-to-high transition until device
produces full attenuation
Rev. C | Page 3 of 20
4.75
110
5
130
5.25
150
V
mA
2.5
40
15
V
dB
ns
10
ns
AD8340
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 2.
Parameter
Supply Voltage VPRF, VPS2
DSOP
IBBP, IBBM, QBBP, QBBM
RFOP, RFOM
RF Input Power at Maximum Gain (50 Ω)
(RFIP or RFIM, Single-Ended Drive)
Equivalent Voltage
Internal Power Dissipation
θJA (with Pad Soldered to Board)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
5.5 V
5.5 V
2.5 V
5.5 V
13 dBm
2.8 V p-p
825 mW
59°C/W
125°C
−40°C to +85°C
−65°C to +150°C
300°C
ESD CAUTION
Rev. C | Page 4 of 20
Data Sheet
AD8340
QFLP 1
18 IFLP
QFLM 2
17 IFLM
AD8340
QBBP 3
16 IBBP
TOP VIEW
(Not to Scale)
QBBM 4
15 IBBM
CMOP 12
CMOP 11
RFOP 9
RFOM 10
CMOP 8
14 VPS2
13 DSOP
CMOP 7
VPS2 5
VPS2 6
04699-002
20 CMRF
19 VPRF
22 RFIP
21 RFIM
24 VPRF
23 CMRF
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO GROUND
VIA A LOW IMPEDANCE PATH.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1; 2
Mnemonic
QFLP; QFLM
3; 4
5, 6, 14; 19, 24
7, 8, 11, 12; 20, 23
9; 10
13
15; 16
17; 18
QBBP; QBBM
VPS2; VPRF
CMOP; CMRF
RFOP; RFOM
DSOP
IBBM; IBBP
IFLM; IFLP
21; 22
RFIM; RFIP
EPAD
Description
Q Baseband Input Filter Pins. Connect optional capacitor to reduce Q baseband channel low-pass
corner frequency.
Q Channel Differential Baseband Inputs.
Positive Supply Voltage, 4.75 V to 5.25 V.
Device Common. Connect via lowest possible impedance to external circuit common.
Differential RF Outputs. Must be ac-coupled. Differential impedance 50 Ω nominal.
Output Disable. Pull high to disable output stage.
I Channel Differential Baseband Inputs.
I Baseband Input Filter Pins. Connect optional capacitor to reduce I baseband channel low-pass
corner frequency.
Differential RF Inputs. Must be ac-coupled. Differential impedance 50 Ω nominal.
Exposed Pad. The exposed pad must be connected to ground via a low impedance path.
Rev. C | Page 5 of 20
AD8340
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0
0.4
PHASE SETPOINT = 0°
0.2
GAIN CONFORMANCE ERROR (dB)
PHASE SETPOINT = 90°
–15
PHASE SETPOINT = 270°
–20
–25
–30
PHASE SETPOINT = 180°
–40
0
0.1
0.2
0.3
–0.8
0.4
0.6
0.5
GAIN SETPOINT
0.7
0.8
0.9
–1.2
–1.4
–1.6
–2.0
0
180
225
270
315
360
330
PHASE SETPOINT = 90°
300
PHASE SETPOINT = 0°
270
–2
PHASE SETPOINT = 270°
–3
GAIN SETPOINT = 1.0
240
210
180
GAIN SETPOINT = 0.1
150
GAIN SETPOINT = 0.5
120
90
PHASE SETPOINT = 180°
–5
04699-004
–7
0
0.1
0.2
0.3
0.4
0.5 0.6
GAIN SETPOINT
0.7
0.8
0.9
04699-007
60
PHASE SETPOINT = 225°
–6
30
0
1.0
0
Figure 4. Gain Conformance Error vs. Gain Setpoint at
Different Phase Setpoints
30
60
90 120 150 180 210 240 270 300 330 360
PHASE SETPOINT (Degrees)
Figure 7. Phase vs. Phase Setpoint at Different Gain Setpoints
6
0
–2
4
GAIN SETPOINT = 1.0
–4
PHASE ERROR (Degrees)
–6
–8
GAIN (dB)
135
360
PHASE SETPOINT = 315°
–4
90
Figure 6. Gain Conformance Error vs. Phase Setpoint at Different Gain
Setpoints
0
–1
45
PHASE SETPOINT (Degrees)
PHASE (Degrees)
1
GAIN SETPOINT = 0.1
1.0
PHASE SETPOINT = 45°
2
GAIN SETPOINT = 0.5
–1.0
PHASE SETPOINT = 135°
3
GAIN CONFORMANCE ERROR (dB)
–0.6
–1.8
Figure 3. Gain Magnitude vs. Gain Setpoint at Different Phase Setpoints,
RF Frequency = 880 MHz
4
–0.4
04699-003
–35
–0.2
GAIN SETPOINT = 0.5
–10
–12
–14
–16
–18
GAIN SETPOINT = 0.1
2
0
–2
GAIN SETPOINT = 1.0
–4
GAIN SETPOINT = 0.5
–6
–8
–20
–22
–24
0
45
90
135
180
225
–10
04699-005
GAIN SETPOINT = 0.1
270
315
04699-008
GAIN (dB)
–10
GAIN SETPOINT = 1.0
0.0
04699-006
–5
–12
0
360
PHASE SETPOINT (Degrees)
Figure 5. Gain Magnitude vs. Phase Setpoint at Different Gain Setpoints
Rev. C | Page 6 of 20
45
90
135
180
225
270
PHASE SETPOINT (Degrees)
315
360
Figure 8. Phase Error vs. Phase Setpoint at Different Gain Setpoints
Data Sheet
AD8340
–142
0
–143
–0.5
–145
GAIN FLATNESS (dB)
RF PIN = +5dBm
–146
–147
RF PIN = –5dBm
–148
RF PIN = 0dBm
–149
–1.0
–1.5
–150
–2.0
04699-009
NO RF INPUT
–151
–152
0
0.1
0.2
0.4
0.3
0.5
0.6
0.7
0.8
–2.5
700
1.0
0.9
04699-012
NOISE FLOOR (dBm/Hz)
–144
750
800
GAIN SETPOINT
Figure 9. Output Noise Floor vs. Gain, Noise in dBm/Hz, No Carrier,
With Carrier (20 MHz Offset) PIN = −5 dBm, 0 dBm, and +5 dBm
0
1000
0
RF OUTPUT AM SIDEBAND POWER (dBm)
–6
–8
GAIN SETPOINT = 0.5
–10
–12
–14
–16
–18
GAIN SETPOINT = 0.1
04699-010
–20
–22
750
800
850
900
950
–10
–20
–30
–40
–50
SECOND BASEBAND HARMONIC PRODUC T,
878MHz, 882MHz
–60
–70
THIRD BASEBAND HARMONIC PRODUC T,
877MHz, 883MHz
–80
–90
–100
100
1000
FUNDAMENTAL POWER, 879MHz, 881MHz
04699-013
GAIN SETPOINT = 1.0
–4
GAIN (dB)
950
Figure 12. Gain Flatness vs. Frequency, Maximum Gain, Phase Setpoint = 0°
–2
–24
700
850
900
FREQUENCY (MHz)
FREQUENCY (MHz)
200
300
400
500
600
700
800
900
1000
DIFFERENTIAL BASEBAND INPUT LEVEL (mV p-p)
(I OR Q CHANNEL DRIVEN AT 1MHz)
Figure 10. Gain vs. Frequency at Different Gain Setpoints
(700 MHz to 1000 MHz), Phase Setpoint = 0°
Figure 13. Baseband Harmonic Distortion
(I and Q Channel, RF Input = 0 dBm,
Balun and Cable Losses of Approximately 2 dB Not Accounted for in Plot)
–145
14
–146
12
–147
10
TEMP = +25°C
–149
6
–150
4
–151
2
–152
700
750
800
850
900
RF FREQUENCY (MHz)
950
0
700
1000
Figure 11. Output Noise Floor vs. Frequency, Maximum Gain,
No RF Carrier, Phase Setpoint = 0°
TEMP = +85°C
8
04699-014
OP1dB (dBm)
–148
04699-011
NOISE (dBm/Hz)
TEMP = –40°C
750
800
850
900
FREQUENCY (MHz)
950
1000
Figure 14. Output 1 dB Compression Point vs. Frequency and Temperature,
Maximum Gain, Phase Setpoint = 0°
Rev. C | Page 7 of 20
AD8340
Data Sheet
30
30
28
TEMP = –40°C
24
GAIN SETPOINT = 0.5
20
OIP3 (dBm)
22
TEMP = +85°C
20
TEMP = +25°C
18
15
10
16
14
GAIN SETPOINT = 0.1
04699-015
5
12
10
700
750
800
850
900
FREQUENCY (MHz)
0
0
1000
950
04699-018
OIP3 (dBm)
GAIN SETPOINT = 1.0
25
26
Figure 15. Output IP3 vs. Frequency and Temperature, Maximum Gain, I Only
45
90
180
225
270
135
PHASE SETPOINT (Degrees)
315
360
Figure 18. Output IP3 vs. Gain and Phase Setpoints, 2.5 MHz Carrier Spacing
0
0
RBW 30kHz
VBW 30kHz
SWT 100ms
REF LVL
0 dBm
RF ATT
20dB
MIXER –10dBm
UNIT
dBm
RF OUTPUT AM SIDEBAND POWER (dBm)
A
–10
–5
–70
–80
04699-016
–25
200mV p-p BB INPUT
–30
0
50
100
200
250
150
FREQUENCY (MHz)
300
350
–90
–100
400
CENTER 880 MHz
500 kHz/DIV
1 RM
04699-019
–60
SECOND BASEBAND HARMONIC
–50
UNDESIRED SIDEBAND
–20
–40
RF FEEDTHROUGH
500mV p-p BB INPUT
–15
–30
DESIRED SIDEBAND
OUTPUT POWER (dBm)
–10
SECOND BASEBAND HARMONIC
–20
1V p-p BB INPUT
SPAN 5 MHz
FREQUENCY (MHz)
Figure 16. I/Q Modulation Bandwidth vs. Baseband Magnitude
Figure 19. Single-Sideband Performance, 880 MHz, −10 dBm RF Input;
1 MHz, 500 mV p-p Differential BB Drive
90
60
120
14
GAIN SETPOINT = 1.0
12
30
150
10
8
GAIN SETPOINT = 0.5
180
0
1.5GHz
4
500MHz
2
1.5GHz
0
210
330
–2
500MHz
–4
–6
240
GAIN SETPOINT = 0.1
04699-017
–8
–10
–12
0
45
90
225
180
270
135
PHASE SETPOINT (Degrees)
315
300
270
IMPEDANCE CIRCLE
S11 RF PORT WITH 5.6nH INDUCTORS
S11 RF PORT WITHOUT INDUCTORS
360
Figure 17. Output 1dB Compression Point vs. Gain and Phase Setpoints
Rev. C | Page 8 of 20
Figure 20. Input and Output Impedance Smith Chart
(with Frequency Markers)
04699-020
OP1dB (dBm)
6
Data Sheet
AD8340
90
60
120
0
150
1.5GHz
30
500MHz
–5
RF OUTPUT POWER (dBm)
–10
0
180
500MHz
1.5GHz
210
330
300
–20
–25
–30
–35
–40
270
04699-024
240
–15
–45
–50
04699-021
IMPEDANCE CIRCLE
S22 PORT WITH 1 TO 1 TRANSFORMER
SDD22 PORT DIFFERENTIAL
0
Figure 21. Output Impedance Smith Chart (with Frequency Markers)
0.5
1.0
1.5
2.0
3.0
3.5
2.5
DSOP VOLTAGE (V)
4.0
4.5
5.0
Figure 24. Power Shutdown Attenuation
TEK FAST ACQ SAMPLE
6
4
PHASE SETPOINT = 45°
2V/DIV
PHASE SETPOINT = 0°
CHA1/CHA3 (V)
0
–2
–4
–6
DSOP
200mV/DIV
3
–8
PHASE SETPOINT = 90°
–10
–14
0
0.1
0.2
0.3
0.5
0.6
0.4
GAIN SETPOINT
0.7
0.8
0.9
CH1 200mVΩ
CH3 2.0V
1.0
134
133
132
5.25V
131
130
5V
128
127
0
10
20
30
04699-023
4.75V
125
–40 –30 –20 –10
ET 200ps/pt 74.0ns
Figure 25. Power Shutdown Response Time
135
126
M 10.0ns 5.0GS/s
A CH2 160mV
TIME (10ns/DIV)
Figure 22. Phase Error vs. Gain Setpoint by Phase Setpoint,
5 V DC, 25°C, 880 MHz
129
04699-025
04699-022
RF OUTPUT
–12
SUPPLY CURRENT (mA)
PHASE ERROR (Degrees)
2
40
50
60
70
80
TEMPERATURE (°C)
Figure 23. Supply Current vs. Temperature
Rev. C | Page 9 of 20
AD8340
Data Sheet
THEORY OF OPERATION
VBBI
I CHANNEL INPUT
LINEAR
ATTENUATOR
V-I
SINGLE-ENDED OR
DIFFERENTIAL
50Ω INPUT Z
(VBBI / VO )
(
(
+ V BBQ / VO
PhaseSP = arctan VBBQ / VBBI
)
OUTPUT
DISABLE
LINEAR
ATTENUATOR
Q CHANNEL INPUT
VBBQ
Figure 26. Simplified Architecture of the AD8340
Vq
MAX GAIN = 0dB
+0.5
A
|A|
θ
–0.5
+0.5
MIN GAIN < –30dB
–0.5
The correspondence between the desired gain and phase
setpoints, GainSP and PhaseSP, and the Cartesian inputs, VBBI
and VBBQ, is given by simple trigonometric identities.
Gain SP =
SINGLE-ENDED OR
DIFFERENTIAL
50Ω OUTPUT
I-V
V-I
A change in sign of VBBI or VBBQ can be viewed as a change
in sign of the gain or as a 180° phase change. The outermost
circle represents the maximum gain magnitude of unity. The
circle origin implies, in theory, a gain of 0. In practice, circuit
mismatches and unavoidable signal feedthrough limit the
minimum gain to approximately −40 dB. The phase angle
between the resultant gain vector and the positive x-axis is
defined as the phase shift. Note that there is a nominal,
systematic insertion phase through the AD8340 to which
the phase shift is added. In the following discussions, the
systematic insertion phase is normalized to 0°.
2
0°/90°
04699-026
By controlling the relative amounts of I and Q components that
are summed, the AD8340 allows continuous magnitude and
phase control of the gain. Consider the vector gain representation of the AD8340 expressed in polar form in Figure 27. The
attenuation factors for the I and Q signal components are
represented on the x- and y-axis, respectively, by the baseband
inputs, VBBI and VBBQ. The resultant vector sum represents the
vector gain, which can also be expressed as a magnitude and
phase. By applying different combinations of baseband inputs,
any vector gain within the unit circle can be programmed.
Pure amplitude modulation is represented by radial movement
of the gain vector tip at a fixed angle, while pure phase modulation is represented by rotation of the tip around the circle at a
fixed radius. Unlike traditional I-Q modulators, the AD8340 is
designed to have a linear RF signal path from input to output.
Traditional I-Q modulators provide a limited LO carrier path
through which any amplitude information is removed.
Vi
04699-027
The AD8340 is a linear RF vector modulator with Cartesian
baseband controls. In the simplified block diagram shown in
Figure 26, the RF signal propagates from the left to the right
while baseband controls are placed above and below. The RF
input is first split into in-phase (I) and quadrature (Q) components. The variable attenuators independently scale the I and Q
components of the RF input. The attenuator outputs are then
summed and buffered to the output.
Figure 27. Vector Gain Representation
RF QUADRATURE GENERATOR
2
)
where:
VO is the baseband scaling constant (500 mV).
VBBI and VBBQ are the differential I and Q baseband voltages,
respectively.
Note that when evaluating the arctangent function, the proper
phase quadrant must be selected. For example, if the principal
value of the arctangent (known as the arctangent(x)) is used,
Quadrant 2 and Quadrant 3 would be interpreted mistakenly
as Quadrant 4 and Quadrant 1, respectively. In general, both
VBBI and VBBQ are needed in concert to modulate the gain and
the phase.
The RF input is directly coupled differentially or single-endedly
to the quadrature generator, which consists of a multistage RC
polyphase network tuned over the operating frequency range of
700 MHz to 1000 MHz. The recycling nature of the polyphase
network generates two replicas of the input signal, which are
in precise quadrature, that is, 90°, to each other. Because the
passive network is perfectly linear, the amplitude and phase
information contained in the RF input is transmitted faithfully
to both channels. The quadrature outputs are then separately
buffered to drive the respective attenuators. The characteristic
impedance of the polyphase network is used to set the input
impedance to the AD8340.
Rev. C | Page 10 of 20
Data Sheet
AD8340
I-Q ATTENUATORS AND BASEBAND AMPLIFIERS
GAIN AND PHASE ACCURACY
The proprietary linear-responding attenuator structure is an
active solution with differential inputs and outputs that offer
excellent linearity, low noise, and greater immunity from mismatches than other variable attenuator methods. The gain, in
linear terms, of the I and Q channels is proportional to its control
voltage with a scaling factor designed to be 2/V, that is, a full-scale
gain setpoint of 1.0 (−2 dB) for VBBI (Q) of 500 mV. The control
voltages can be driven differentially or single-endedly. The
combination of the baseband amplifiers and attenuators allows
for maximum modulation bandwidths in excess of 200 MHz.
There are numerous ways to express the accuracy of the AD8340.
Ideally, the gain and phase should precisely follow the setpoints.
Figure 4 illustrates the gain error in decibels (dB) from a best fit
line, normalized to the gain measured at the gain setpoint = 1.0,
for the different phase setpoints. Figure 6 shows the gain error
in a different form; the phase setpoint is swept from 0° to 360°
for different gain setpoints. Figure 8 and Figure 22 show analogous errors for the phase error as a function of gain and phase
setpoints. The accuracy clearly depends on the region of operation
within the vector gain unit circle. Operation very close to the
origin generally results in larger errors as the relative accuracy
of the I and Q vectors degrades.
OUTPUT AMPLIFIER
The output amplifier accepts the sum of the attenuator outputs
and delivers a differential output signal into the external load.
The output pins must be pulled up to an external supply,
preferably through RF chokes. When the 50 Ω load is taken
differentially, an OP1dB of 11 dBm and OIP3 of 24 dBm are
achieved at 880 MHz. The output can be taken in single-ended
fashion, albeit at lower performance levels.
NOISE AND DISTORTION
The output noise floor and distortion levels vary with the gain
magnitude but do not vary significantly with the phase. At the
higher gain magnitude setpoints, the OIP3 and the noise floor
vary in direct proportion with the gain. At lower gain magnitude setpoints, the noise floor levels off while the OIP3 continues
to vary with the gain.
RF FREQUENCY RANGE
The frequency range on the RF input is limited by the internal
polyphase quadrature phase-splitter. The phase-splitter splits
the incoming RF input into two signals, 90° out of phase, as
previously described in the RF Quadrature Generator section.
This polyphase network has been designed to ensure robust
quadrature accuracy over standard fabrication process
parameter variations for the 700 MHz to 1 GHz specified RF
frequency range. Using the AD8340 as a single-sideband
modulator and measuring the resulting sideband suppression is
a good gauge of how the quadrature accuracy is maintained
over RF frequency. A typical plot of sideband suppression from
500 MHz to 1.5 GHz is shown in Figure 28. The level of sideband
suppression degradation outside the 700 MHz to 1 GHz specified
range is subject to manufacturing process variations.
0
SB SUPPRESSION (dBc)
–5
–10
–15
–20
–25
–35
500
04699-028
–30
600
700
800
900
1000 1100 1200 1300 1400 1500
FREQUENCY (MHz)
Figure 28. Sideband Suppression vs. Frequency
Rev. C | Page 11 of 20
AD8340
Data Sheet
APPLICATIONS INFORMATION
RFIM, a 50 Ω match is achieved with a return loss of >10 dB
over the operating frequency range. Different matching
inductors can improve matching over a narrower frequency
range. The single-ended and differential input impedances are
exactly the same.
The AD8340 is designed to operate in a 50 Ω impedance
system. Figure 30 illustrates where the RF input is driven in
a single-ended fashion while the differential RF output is
converted to a single-ended output with an RF balun. The
baseband controls for the I and Q channels are typically driven
from differential DAC outputs. The power supplies, VPRF and
VPS2, should be bypassed appropriately with 0.1 µF and 100 pF
capacitors. Low inductance grounding of the CMOP and CMRF
common pins is essential to prevent unintentional peaking of
the gain.
100pF 5.6nH
RFIM
~1VDC
100pF 5.6nH
RF
RC
PHASE
04699-029
USING THE AD8340
RFIP
50Ω
Figure 29. RF Input Interface to the AD8340 Showing
Coupling Capacitors and Matching Inductors
RF INPUT AND MATCHING
The RFIP and RFIM should be ac-coupled through low loss
series capacitors as shown in Figure 29. The internal dc levels
are at approximately 1 V. For single-ended operation, one input
is driven by the RF signal and the other input is ac grounded.
The input impedance of the AD8340 is defined by the characteristics of the polyphase network. The capacitive component of the
network causes its impedance to roll off with frequency, albeit at
a slower rate than 6 dB/octave. With matching inductors on the
order of 5.6 nH in series with each of the RF inputs, RFIP and
VP
C2
100pF
C1
0.1µF
IBBM
VP
IBBP
C12
(SEE TEXT)
C6
100pF
VPS2
IBBM
OUTPUT
DISABLE
DSOP
CMOP
CMRF
CMOP
RFIM
RFOM
C17
100pF
AD8340
RFOP
CMRF
CMOP
VPRF
C3
0.1µF
C4
100pF
QFLP
VPS2
VP
RFIP
QBBM
L4
5.6nH
QBBP
C5
100pF
QFLM
RF
INPUT
L3
5.6nH
IFLP
VPRF
IBBP
C7
100pF
B
IFLM
C8
0.1µF
VP
A
L1
120nH
ETC1-1-13
RF
OUTPUT
C18
L2
100pF
120nH
CMOP
VPS2
C14
0.1µF
C10
0.1µF
QBBP
QBBM
C9
100pF
Figure 30. Basic Connections
Rev. C | Page 12 of 20
04699-0-030
VP
C11
(SEE TEXT)
Data Sheet
AD8340
RF OUTPUT AND MATCHING
The RF outputs of the AD8340, RFOP, and RFOM, are open
collectors of a transimpedance amplifier that needs to be pulled
up to the positive supply, preferably with RF chokes, as shown
in Figure 31. The nominal output impedance looking into each
individual output pin is 25 Ω. Consequently, the differential
output impedance is 50 Ω.
120nH
±ISIG
GM
1:1
100pF
RFOP
RT
100pF
RF
OUTPUT
50Ω
DIFFERENTIAL
04699-031
RFOM
Figure 31. RF Output Interface to the AD8340 Showing
Coupling Capacitors, Pull-Up RF Chokes, and Balun
Because the output dc levels are at the positive supply, ac
coupling capacitors are usually needed between the AD8340
outputs and the next stage in the system.
A 1:1 RF broadband output balun, such as the ETC1-1-13
(M/A-COM), converts the differential output of the AD8340
into a single-ended signal. Note that the loss and balance of the
balun directly impact the apparent output power, noise floor,
and gain/phase errors of the AD8340. In critical applications,
narrow-band baluns with low loss and superior balance are
recommended.
If the output is taken in a single-ended fashion directly into a
50 Ω load through a coupling capacitor, there is an impedance
mismatch. This can be resolved with a 1:2 balun to convert the
single-ended 25 Ω output impedance to 50 Ω. If loss-of-signal
swing is not critical, a 25 Ω back termination in series with the
output pin can also be used. The unused output pin must still be
pulled up to the positive supply. The user can load it through a
coupling capacitor with a dummy load to preserve balance. The
gain of the AD8340 when the output is single-ended varies
slightly with the dummy load value, as shown in Figure 32.
–0.5
–1.0
DRIVING THE I-Q BASEBAND CONTROLS
The I and Q inputs to the AD8340 set the gain and phase
between input and output. These inputs are differential and
should normally have a common-mode level of 0.5 V. However,
when differentially driven, the common mode can vary from
250 mV to 750 mV while still allowing full gain control. Each
input pair has a nominal input swing of ±0.5 V differential
around the common-mode level. The maximum gain of unity
is achieved if the differential voltage is equal to +500 mV or
−500 mV. Therefore, with a common-mode level of 500 mV,
IBBP and IBBM each swings between 250 mV and 750 mV.
VP
RT
The RF output signal can be disabled by raising the DSOP pin
to the positive supply. The shutdown function provides >40 dB
attenuation of the input signal even at full gain. The interface
to DSOP is high impedance, and the shutdown and turn-on
response times are
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