AD8366ACPZ-R7

DC to 600 MHz, Dual-Digital Variable Gain Amplifiers AD8366 Data Sheet SENB OPMA OPPA VPSOA VCMA CCMA OFSA FUNCTIONAL BLOCK DIAGRAM VPSIA BIT0/CS IPPA BIT1/SDAT IPMA BIT2/SCLK BIT3 ENBL DIGITAL GAIN CONTROL LOGIC ICOM OCOM IPMB BIT4 IPPB BIT 5 DENB OPMB OPPB VPSOB VCMB CCMB OFSB 07584-001 DENA VPSIB DECB Matched pair of differential, digitally controlled VGAs Gain range: 4.5 dB to 20.25 dB 0.25 dB gain step size Operating frequency DC to 150 MHz (2 V p-p) 3 dB bandwidth: 600 MHz Noise figure (NF) 11.4 dB at 10 MHz at maximum gain 18 dB at 10 MHz at minimum gain OIP3: 45 dBm at 10 MHz HD2/HD3 Better than −90 dBc for 2 V p-p output at 10 MHz at maximum gain Differential input and output Adjustable output common-mode Optional dc output offset correction Serial/parallel mode gain control Power-down feature Single 5 V supply operation DECA FEATURES Figure 1. APPLICATIONS Baseband I/Q receivers Diversity receivers Wideband ADC drivers GENERAL DESCRIPTION The AD8366 is a matched pair of fully differential, low noise and low distortion, digitally programmable variable gain amplifiers (VGAs). The gain of each amplifier can be programmed separately or simultaneously over a range of 4.5 dB to 20.25 dB in steps of 0.25 dB. The amplifier offers flat frequency performance from dc to 70 MHz, independent of gain code. The AD8366 offers excellent spurious-free dynamic range, suitable for driving high resolution analog-to-digital converters (ADCs). The NF at maximum gain is 11.4 dB at 10 MHz and increases ~2 dB for every 4 dB decrease in gain. Over the entire gain range, the HD3/HD2 are better than −90 dBc for 2 V p-p at the output at 10 MHz into 200 Ω. The two-tone intermodulation distortion of −90 dBc into 200 Ω translates to an OIP3 of 45 dBm (38 dBVrms). The differential input impedance of 200 Ω provides a well-defined termination. The differential output has a low impedance of ~25 Ω. Rev. B The output common-mode voltage defaults to VPOS/2 but can be programmed via the VCMA and VCMB pins over a range of voltages. The input common-mode voltage also defaults to VPOS/2 but can be driven down to 1.5 V. A built-in, dc offset compensation loop can be used to eliminate dc offsets from prior stages in the signal chain. This loop can also be disabled if dccoupled operation is desired. The digital interface allows for parallel or serial mode gain programming. The AD8366 operates from a 4.75 V to 5.25 V supply and consumes typically 180 mA. When disabled, the part consumes roughly 3 mA. The AD8366 is fabricated using Analog Devices, Inc., advanced silicon-germanium bipolar process, and it is available in a 32-lead exposed paddle LFCSP package. Performance is specified over the −40°C to +85°C temperature range. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8366 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1  Output Differential Offset Correction .................................... 15  Applications ....................................................................................... 1  Output Common-Mode Control ............................................. 15  Functional Block Diagram .............................................................. 1  Gain Control Interface............................................................... 16  General Description ......................................................................... 1  Applications Information .............................................................. 17  Revision History ............................................................................... 2  Basic Connections ...................................................................... 17  Specifications..................................................................................... 3  Direct Conversion Receiver Design ......................................... 18  Parallel and Serial Interface timing ............................................ 5  Quadrature Errors and Image Rejection ................................. 18  Absolute Maximum Ratings............................................................ 6  Low Frequency IMD3 Performance ........................................ 19  ESD Caution .................................................................................. 6  Baseband Interface ..................................................................... 21  Pin Configuration and Function Descriptions ............................. 7  Characterization Setups ................................................................. 22  Typical Performance Characteristics ............................................. 8  Evaluation Board ............................................................................ 25  Circuit Description ......................................................................... 15  Outline Dimensions ....................................................................... 28  Inputs ........................................................................................... 15  Ordering Guide .......................................................................... 28  Outputs ........................................................................................ 15  REVISION HISTORY 8/2017—Rev. A to Rev. B Change to Figure 4 ........................................................................... 7 Updated Outline Dimensions ....................................................... 28 Changes to Ordering Guide .......................................................... 28 3/2011—Rev. 0 to Rev. A Changes to Table 2, Internal Power Dissipation Value ................ 6 10/2010—Revision 0: Initial Version Rev. B | Page 2 of 28 Data Sheet AD8366 SPECIFICATIONS VS = 5 V, TA = 25°C, ZS = 200 Ω, ZL = 200 Ω, f = 10 MHz, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE Bandwidth Slew Rate INPUT STAGE Linear Input Swing Differential Input Impedance Minimum Input Common-Mode Voltage Maximum Input Common-Mode Voltage Test Conditions/Comments 3 dB; all gain codes 1 dB; all gain codes Maximum gain Minimum gain IPPA, IPMA, IPPB, IPMB At minimum gain AV = 4.5 dB, 1 dB gain compression Input pins left floating GAIN Minimum Voltage Gain Maximum Voltage Gain Gain Step Size Gain Step Accuracy Gain Flatness Gain Mismatch Group Delay Flatness Mismatch Gain Step Response Common-Mode Rejection Ratio OUTPUT STAGE Linear Output Swing Differential Output Impedance Output DC Offset Minimum Output Common-Mode Voltage Maximum Output Common-Mode Voltage Common-Mode Setpoint Input Impedance NOISE/DISTORTION 3 MHz Noise Figure Second Harmonic Third Harmonic OIP3 1 OIP21 Output 1 dB Compression Point1 All gain codes All gain codes Maximum gain, DC to 70 MHz Channel A/Channel B at minimum/maximum gain code All gain codes, 20% fractional bandwidth, fC < 100 MHz Channel A and Channel B at same gain code Maximum gain to minimum gain Minimum gain to maximum gain OPPA, OPMA, OPPB, OPMB, VCMA, VCMB 1 dB gain compression Inputs shorted, offset loop disabled at minimum/maximum gain Inputs shorted, offset loop enabled (across all gain codes) HD3, HD2 > −90 dBc, 2 V p-p output HD3, HD2 > −90 dBc, 2 V p-p output VCMA and VCMB left floating Maximum gain Minimum gain 2 V p-p output, maximum gain 2 V p-p output, minimum gain 2 V p-p output, maximum gain 2 V p-p output, minimum gain 2 V p-p composite, maximum gain 2 V p-p composite, minimum gain 2 V p-p composite, maximum gain 2 V p-p composite, minimum gain Maximum gain Minimum gain Rev. B | Page 3 of 28 Min Typ Max Unit 600 200 1100 1500 MHz MHz V/µs V/µs 3.6 217 1.5 VPOS/2 + 0.075 VPOS/2 V p-p Ω V V V 4.5 20.25 0.25 ±0.25 0.1 0.1