0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
AD8417WBRMZ-10

AD8417WBRMZ-10

  • 厂商:

    AD(亚德诺)

  • 封装:

    TFSOP10,MSOP10

  • 描述:

    80V CMN MODE BIDIR CURRENT SENSE

  • 数据手册
  • 价格&库存
AD8417WBRMZ-10 数据手册
Bidirectional, Zero Drift, Current Sense Amplifier AD8417 Data Sheet FEATURES GENERAL DESCRIPTION Typical 0.1 µV/°C offset drift Maximum ±400 µV voltage offset over full temperature range 2.7 V to 5.5 V power supply operating range EMI filters included High common-mode input voltage range −2 V to +70 V continuous −3 V to +80 V survival Initial gain = 60 V/V Wide operating temperature range AD8417WB (8-lead MSOP, 8-lead SOIC_N, and 10-lead MSOP) and AD8417B (8-lead MSOP): −40°C to +125°C AD8417WH (8-lead SOIC_N and 8-lead MSOP): −40°C to +150°C Bidirectional operation Available in 8-lead SOIC_N, 8-lead MSOP, and FMEA tolerant 10-lead MSOP pinout CMRR: 86 dB, dc to 10 kHz AEC-Q100 qualified for automotive applications The AD8417 is a high voltage, high resolution current sense amplifier. It features an initial gain of 60 V/V, with a maximum ±0.3% gain error over the entire temperature range. The buffered output voltage directly interfaces with any typical converter. The AD8417 offers excellent input common-mode rejection from −2 V to +70 V. The AD8417 performs bidirectional current measurements across a shunt resistor in a variety of automotive and industrial applications, including motor control, power management, and solenoid control. The AD8417 offers breakthrough performance throughout the −40°C to +150°C temperature range (AD8417WH). It features a zero drift core, which leads to a typical offset drift of 0.1 µV/°C throughout the operating temperature range and the commonmode voltage range. The AD8417 is qualified for automotive applications. The device includes electromagnetic interference (EMI) filters and patented (U.S. Patent 8,624,668 B2) circuitry to enable output accuracy with pulse-width modulation (PWM) type input common-mode voltages. The typical input offset voltage is ±200 µV. The AD8417 is offered in 8-lead MSOP and 8-lead SOIC_N, along with a 10-lead MSOP pinout option engineered for failure mode and effects analysis (FMEA). APPLICATIONS High-side current sensing in Motor controls Solenoid controls Power management Low-side current sensing Diagnostic protection Table 1. Related Devices Part No. AD8205 AD8206 AD8207 AD8210 AD8418 Description Current sense amplifier, gain = 50 Current sense amplifier, gain = 20 High accuracy current sense amplifier, gain = 20 High speed current sense amplifier, gain = 20 High accuracy current sense amplifier, gain = 20 TYPICAL APPLICATION CIRCUIT VCM = –2V TO +70V VS = 2.7V TO 5.5V 70V VS VREF 1 AD8417 VCM +IN ISHUNT EMI FILTER OUT G = 60 RSHUNT 50A VOUT + 0V –IN VS VS/2 EMI FILTER – ISHUNT –50A VREF 2 11882-001 0V GND Figure 1. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8417 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Bidirectional Operation ............................................................ 11 Applications ...................................................................................... 1 External Referenced Output ..................................................... 12 General Description ......................................................................... 1 Splitting the Supply .................................................................... 12 Typical Application Circuit ............................................................ 1 Splitting an External Reference ................................................ 12 Revision History ............................................................................... 2 Applications Information ............................................................. 13 Specifications..................................................................................... 3 Motor Control ............................................................................ 13 Absolute Maximum Ratings ........................................................... 4 Solenoid Control ........................................................................ 14 ESD Caution.................................................................................. 4 Pinout Option Engineered for FMEA ..................................... 15 Pin Configurations and Function Descriptions ........................... 5 Outline Dimensions ....................................................................... 16 Typical Performance Characteristics ............................................. 6 Ordering Guide .......................................................................... 17 Theory of Operation ...................................................................... 10 Automotive Products ................................................................ 17 Output Offset Adjustment ............................................................ 11 Unidirectional Operation.......................................................... 11 REVISION HISTORY 3/2020—Rev. D to Rev. E Added 10-Lead MSOP ................................................................ Universal Changed AD8417WB to AD8417WB and AD8417B, and Patented to Patented (U.S. Patent 8,624,668 B2) ...... Throughout Changes to Features Section and General Description Section ...... 1 Changed Functional Block Diagram Section to Typical Application Circuit Section............................................................. 1 Changes to Figure 2 and Table 4 Caption ..................................... 5 Added Figure 3; Renumbered Sequentially and Table 5; Renumbered Sequentially ............................................................... 5 Changes to Figure 11 to Figure 15 ................................................. 7 Changes to Figure 16 to Figure 19 ................................................. 8 Change to Figure 23 ......................................................................... 9 Deleted Figure 26; Renumbered Sequentially ............................ 10 Added Pinout Option Engineered for FMEA Section and Table 6 .............................................................................................. 15 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 17 6/2019—Rev. C to Rev. D Changes to Features Section ............................................................1 Changes to Table 3 ............................................................................4 Changes to Figure 33 ..................................................................... 13 10/2017—Rev. B to Rev. C Change to Splitting an External Reference Section ................... 12 4/2015—Rev. A to Rev. B Change to Figure 36 ....................................................................... 14 11/2014—Rev. 0 to Rev. A Added AD8417WH ...........................................................Universal Changes to Features Section and General Description Section ........1 Changes to Specifications Section and Table 2 .............................3 Changes to Table 3 ............................................................................4 Changes to Ordering Guide .......................................................... 16 11/2013—Revision 0: Initial Version Rev. E | Page 2 of 17 Data Sheet AD8417 SPECIFICATIONS TA = −40°C to +125°C (operating temperature range) for the AD8417WB and AD8417B, TA = −40°C to +150°C for the AD8417WH, VS = 5 V, unless otherwise noted. Table 2. Parameter GAIN Initial Error Over Temperature Gain vs. Temperature VOLTAGE OFFSET Offset Voltage, Referred to the Input (RTI) Over Temperature, RTI Offset Drift INPUT Input Bias Current Input Voltage Range Common-Mode Rejection Ratio (CMRR) OUTPUT Output Voltage Range Output Resistance DYNAMIC RESPONSE Small Signal −3 dB Bandwidth Slew Rate NOISE 0.1 Hz to 10 Hz, RTI Spectral Density, 1 kHz, RTI OFFSET ADJUSTMENT Ratiometric Accuracy1 Accuracy, Referred to the Output (RTO) Output Offset Adjustment Range POWER SUPPLY Operating Range Quiescent Current Over Temperature Test Conditions/Comments Typ Max Unit ±0.3 +10 V/V % ppm/°C ±400 +0.4 µV µV µV/°C 60 Specified temperature range −10 25°C Specified temperature range ±200 −0.4 +0.1 130 Common mode, continuous Specified temperature range, f = dc f = dc to 10 kHz −2 90 RL = 25 kΩ 0.045 Divider to supplies Voltage applied to VREF1 and VREF2 in parallel VS = 5 V 0.499 +70 100 86 VS − 0.035 2 V Ω 250 1 kHz V/µs 2.3 110 µV p-p nV/√Hz 0.045 V/V mV/V V 2.7 5.5 V 4.1 4.2 mA mA dB +125 +150 °C °C 80 AD8417WB and AD8417B AD8417WH −40 −40 The offset adjustment is ratiometric to the power supply when VREF1 and VREF2 are used as a divider between the supplies. Rev. E | Page 3 of 17 µA V dB dB 0.501 ±1 VS − 0.035 VOUT = 0.1 V dc AD8417WB and AD8417B AD8417WH Power Supply Rejection Ratio Temperature Range For Specified Performance Operating Temperature Range 1 Min AD8417 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Input Voltage Range Survival Common-Mode Differential Reverse Supply Voltage ESD Human Body Model (HBM) Operating Temperature Range AD8417WB and AD8417B AD8417WH Storage Temperature Range Output Short-Circuit Duration Rating 6V −3 V to +80 V 5.5 V (magnitude) 0.3 V ±2000 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION −40°C to +125°C −40°C to +150°C −65°C to +150°C Indefinite Rev. E | Page 4 of 17 Data Sheet AD8417 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS +IN 7 VREF 2 3 VREF 1 TOP VIEW (Not to Scale) 6 VS 5 OUT NC 4 11882-002 8 AD8417 –IN 1 GND 2 NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. Figure 2. 8-Lead MSOP and 8-Lead SOIC_N Pin Configuration Table 4. 8-Lead MSOP and 8-Lead SOIC_N Pin Function Descriptions Mnemonic −IN GND VREF2 NC OUT VS VREF1 +IN Description Negative Input. Ground. Reference Input 2. No Connect. Do not connect to this pin. Output. Supply. Reference Input 1. Positive Input. –IN 1 10 +IN NC 2 AD8417-10 9 NC GND 3 TOP VIEW (Not to Scale) 8 VREF 1 7 VS 6 OUT VREF 2 4 NC 5 NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 11882-303 Pin No. 1 2 3 4 5 6 7 8 Figure 3. 10-Lead MSOP Pin Configuration Table 5. 10-Lead MSOP Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic −IN NC GND VREF2 NC OUT VS VREF1 NC +IN Description Negative Input. No Connect. Do not connect to this pin. Ground. Reference Input 2. No Connect. Do not connect to this pin. Output. Supply. Reference Input 1. No Connect. Do not connect to this pin. Positive Input. Rev. E | Page 5 of 17 AD8417 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 50 14 40 12 20 GAIN (dB) OFFSET VOLTAGE (µV) 30 10 8 6 10 0 –10 4 –20 2 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) –40 1000 11882-003 0 –40 100k 10k 10M 1M FREQUENCY (Hz) Figure 4. Typical Offset Voltage Drift vs. Temperature 11882-006 –30 Figure 7. Typical Small Signal Bandwidth (VOUT = 200 mV p-p) 10 120 9 TOTAL OUTPUT ERROR (%) 110 CMRR (dB) 100 90 80 70 8 7 6 5 4 3 2 60 1k 100 10k 1M 100k FREQUENCY (Hz) 0 11882-004 50 10 0 5 10 15 20 25 30 35 40 DIFFERENTIAL INPUT VOLTAGE (mV) Figure 5. Typical CMRR vs. Frequency 11882-007 1 Figure 8. Total Output Error vs. Differential Input Voltage 500 0.5 NORMALIZED AT 25°C 400 BIAS CURRENT PER INPUT PIN (mA) 0.4 200 100 0 –100 –200 –300 –400 0.3 +IN 0.2 0.1 0 –IN –0.1 –0.2 –0.3 –0.4 –25 –10 5 20 35 50 65 80 95 TEMPERATURE (°C) 110 125 Figure 6. Typical Gain Error vs. Temperature VS = 2.7V –0.5 –4 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 VCM (V) Figure 9. Bias Current per Input Pin vs. VCM Rev. E | Page 6 of 17 11882-008 –500 –40 11882-005 GAIN ERROR (µV/V) 300 Data Sheet AD8417 4.5 VS = 5V VS = 2.7V 10mV/DIV 3.5 INPUT 3.0 2.5 500mV/DIV 2.0 1.5 VS = 2.7V 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 INPUT COMMON-MODE VOLTAGE (V) 11882-009 1.0 –5 TIME (1µs/DIV) 11882-012 OUTPUT Figure 13. Fall Time (VS = 2.7 V) Figure 10. Supply Current vs. Input Common-Mode Voltage INPUT 25mV/DIV 10mV/DIV INPUT 1V/DIV OUTPUT OUTPUT VS = 5V 11882-010 VS = 2.7V TIME (1µs/DIV) TIME (1µs/DIV) Figure 11. Rise Time (VS = 2.7 V) 11882-013 500mV/DIV Figure 14. Fall Time (VS = 5 V) INPUT INPUT 50mV/DIV 25mV/DIV OUTPUT OUTPUT 1V/DIV VS = 5V TIME (1µs/DIV) VS = 2.7V TIME (1µs/DIV) Figure 12. Rise Time (VS = 5 V) 11882-014 2V/DIV 11882-011 SUPPLY CURRENT (mA) 4.0 Figure 15. Differential Overload Recovery, Rising (VS = 2.7 V) Rev. E | Page 7 of 17 AD8417 Data Sheet INPUT 100mV/DIV OUTPUT 100mV/DIV OUTPUT INPUT COMMON MODE 2.5V/DIV VS = 5V 11882-015 VS = 5V TIME (1µs/DIV) 11882-018 40V/DIV TIME (4 µs/DIV) Figure 19. Input Common-Mode Step Response (VS = 5 V, Inputs Shorted) Figure 16. Differential Overload Recovery, Rising (VS = 5 V) 50mV/DIV INPUT 2V/DIV VS = 2.7V TIME (1µs/DIV) 11882-016 OUTPUT 40 35 30 5V 25 2.7V 20 15 10 5 0 –40 Figure 17. Differential Overload Recovery, Falling (VS = 2.7 V) –25 –10 5 20 35 50 65 80 95 110 125 11882-019 MAXIMUM OUTPUT SINK CURRENT (mA) 45 Figure 20. Maximum Output Sink Current vs. Temperature 100mV/DIV INPUT 2.5V/DIV VS = 5V TIME (1µs/DIV) 11882-017 OUTPUT 35 30 5V 25 2.7V 20 15 10 5 0 –40 Figure 18. Differential Overload Recovery, Falling (VS = 5 V) –25 –10 5 20 35 50 65 80 95 110 125 Figure 21. Maximum Output Source Current vs. Temperature Rev. E | Page 8 of 17 11882-020 MAXIMUM OUTPUT SOURCE CURRENT (mA) 40 Data Sheet AD8417 0.15 0 NORMALIZED AT 25°C OUTPUT VOLTAGE RANGE FROM POSITIVE RAIL (mV) –50 0.10 –100 –150 CMRR (µV/V) 0.05 –200 –250 –300 0 –0.05 –350 –400 –0.10 0 1 2 3 4 5 6 7 8 9 10 OUTPUT SOURCE CURRENT (mA) –0.15 –40 –25 –10 Figure 22. Output Voltage Range from Positive Rail vs. Output Source Current 5 20 35 50 65 80 95 110 125 11882-024 –500 11882-021 –450 Figure 25. CMRR vs. Temperature 300 250 2100 1800 200 1500 HITS OUTPUT VOLTAGE RANGE FROM GROUND (mV) 2400 150 1200 900 100 600 50 0 1 2 4 3 5 6 7 9 8 10 OUTPUT SINK CURRENT (mA) Figure 23. Output Voltage Range from Ground vs. Output Sink Current 1800 1500 –40°C +25°C +125°C 900 600 300 0 –400 –300 –200 –100 0 100 200 VOSI WITH VCC = 5.0V (µV) 300 400 11882-023 HITS 1200 Figure 24. Offset Voltage Distribution Rev. E | Page 9 of 17 0 –8 –6 –4 –2 0 2 4 GAIN ERROR DRIFT (ppm/°C) Figure 26. Gain Error Drift Distribution 6 8 11882-125 0 11882-022 300 AD8417 Data Sheet THEORY OF OPERATION The AD8417 is a single-supply, zero drift, difference amplifier that uses a unique architecture to accurately amplify small differential current shunt voltages in the presence of rapidly changing common-mode voltages. In typical applications, the AD8417 measures current by amplifying the voltage across a shunt resistor connected to its inputs by a gain of 60 V/V (see Figure 1). The AD8417 design provides excellent common-mode rejection, even with PWM common-mode inputs that can change at very fast rates, for example, 1 V/ns. The AD8417 contains patented (U.S. Patent 8,624,668 B2) technology to eliminate the negative effects of such fast changing external common-mode variations. The AD8417 features an input offset drift of less than 0.4 µV/°C. This performance is achieved through a novel zero drift architecture that does not compromise bandwidth, which is typically rated at 250 kHz. The reference inputs, VREF1 and VREF2, are tied through 100 kΩ resistors to the positive input of the main amplifier, which allows the output offset to be adjusted anywhere in the output operating range. The gain is 1 V/V from the reference pins to the output when the reference pins are used in parallel. When the pins are used to divide the supply, the gain is 0.5 V/V. The AD8417 offers breakthrough performance without compromising any of the robust application needs typical of solenoid or motor control. The ability to reject PWM input common-mode voltages and the zero drift architecture providing low offset and offset drift allows the AD8417 to deliver total accuracy for these demanding applications. Rev. E | Page 10 of 17 Data Sheet AD8417 The output of the AD8417 can be adjusted for unidirectional or bidirectional operation. UNIDIRECTIONAL OPERATION Unidirectional operation allows the AD8417 to measure currents through a resistive shunt in one direction. The basic modes for unidirectional operation are ground referenced output mode and VS referenced output mode. VS Referenced Output Mode VS referenced output mode is set when both reference pins are tied to the positive supply. It is typically used when the diagnostic scheme requires detection of the amplifier and the wiring before power is applied to the load (see Figure 28). VS For unidirectional operation, the output can be set at the negative rail (near ground) or at the positive rail (near VS) when the differential input is 0 V. The output moves to the opposite rail when a correct polarity differential input voltage is applied. The required polarity of the differential input depends on the output voltage setting. If the output is set at the positive rail, the input polarity must be negative to decrease the output. If the output is set at ground, the polarity must be positive to increase the output. AD8417 R4 –IN + R2 VREF 1 R3 VREF 2 GND BIDIRECTIONAL OPERATION Bidirectional operation allows the AD8417 to measure currents through a resistive shunt in two directions. In this case, the output is set anywhere within the output range. Typically, it is set at half scale for equal range in both directions. In some cases, however, it is set at a voltage other than half scale when the bidirectional current is nonsymmetrical. VS AD8417 R4 – Apply voltage(s) to the referenced inputs to adjust the output. VREF1 and VREF2 are tied to internal resistors that connect to an internal offset node. There is no operational difference between the pins. OUT + +IN OUT Figure 28. VS Referenced Output When using the AD8417 in ground referenced output mode, both referenced inputs are tied to ground, which causes the output to sit at the negative rail when there are zero differential volts at the input (see Figure 27). R1 – +IN Ground Referenced Output Mode –IN R1 11882-026 OUTPUT OFFSET ADJUSTMENT R2 VREF 1 R3 VREF 2 11882-025 GND Figure 27. Ground Referenced Output Rev. E | Page 11 of 17 AD8417 Data Sheet EXTERNAL REFERENCED OUTPUT VS Tying both pins together and to a reference produces an output equal to the reference voltage when there is no differential input (see Figure 29). The output decreases the reference voltage when the input is negative, relative to the −IN pin, and increases when the input is positive, relative to the −IN pin. AD8417 R4 –IN R1 – OUT + +IN R2 VS VREF 1 R3 VREF 2 R4 –IN R1 GND – OUT Figure 30. Split Supply + +IN 11882-028 AD8417 R2 SPLITTING AN EXTERNAL REFERENCE VREF 1 R3 VREF 2 11882-027 2.5V GND Use the internal reference resistors to divide an external reference by 2 with an accuracy of approximately 0.2%. Split an external reference by connecting one VREFx pin to ground and the other VREFx pin to the reference (see Figure 31). Figure 29. External Referenced Output VS SPLITTING THE SUPPLY AD8417 R4 –IN R1 – OUT + +IN R2 VREF 1 R3 VREF 2 GND Figure 31. Split External Reference Rev. E | Page 12 of 17 5V 11882-029 By tying one reference pin to VS and the other to GND, the output is set at half of the supply when there is no differential input (see Figure 30). The benefit of this configuration is that an external reference is not required to offset the output for bidirectional current measurement. Tying one reference pin to VS and the other to GND creates a midscale offset that is ratiometric to the supply, which means that if the supply increases or decreases, the output remains at half the supply. For example, if the supply is 5.0 V, the output is at half scale, or 2.5 V. If the supply increases by 10% (to 5.5 V), the output increases to 2.75 V. Data Sheet AD8417 MOTOR CONTROL 3-Phase Motor Control The AD8417 is ideally suited for monitoring current in 3-phase motor applications. The 250 kHz typical bandwidth of the AD8417 provides instantaneous current monitoring. Additionally, the typical low offset drift of 0.1 µV/°C means that the measurement error between the two motor phases is at a minimum over temperature. The AD8417 rejects PWM input common-mode voltages in the −2 V to +70 V (with a 5 V supply) range. Monitoring the current on the motor phase allows sampling of the current at any point and provides diagnostic information, such as a short to GND and the battery. Refer to Figure 33 for the typical phase current measurement setup with the AD8417. in this type of application. The instability of the ground reference causes inaccuracies in the measurements that can be made with a simple ground referenced op amp. The AD8417 measures current in both directions as the H-bridge switches and the motor changes direction. The output of the AD8417 is configured in an external referenced bidirectional mode (see the Bidirectional Operation section). CONTROLLER 5V +IN MOTOR VREF 1 VS OUT AD8417 SHUNT –IN GND VREF 2 NC 2.5V H-Bridge Motor Control Another typical application for the AD8417 is to form part of the control loop in H-bridge motor control. In this case, place the shunt resistor in the middle of the H-bridge to accurately measure current in both directions by using the shunt available at the motor (see Figure 32). Using an amplifier and shunt in this location is a better solution than a ground referenced op amp because ground is not typically a stable reference voltage Figure 32. H-Bridge Motor Control V+ IU IV IW M 5V 5V V– OPTIONAL DEVICE FOR OVERCURRENT PROTECTION AND FAST (DIRECT) SHUTDOWN OF POWER STAGE INTERFACE CIRCUIT AD8417 AD8417 CONTROLLER BIDIRECTIONAL CURRENT MEASUREMENT REJECTION OF HIGH PWM COMMON-MODE VOLTAGE (–2V TO +70V) AMPLIFICATION HIGH OUTPUT DRIVE Figure 33. 3-Phase Motor Control Rev. E | Page 13 of 17 11882-031 AD8214 5V 11882-030 APPLICATIONS INFORMATION AD8417 Data Sheet SOLENOID CONTROL +IN + OUTPUT 5 NC 11882-033 4 11882-032 8 NC = NO CONNECT. GND In the high rail current sensing configuration, the shunt resistor is referenced to the battery. High voltage is present at the inputs of the current sense amplifier. When the shunt is battery referenced, the AD8417 produces a linear ground referenced analog output. Additionally, the AD8214 provides an overcurrent detection signal in as little as 100 ns (see Figure 36). This feature is useful in high current systems where fast shutdown in overcurrent conditions is essential. –IN 3 4 High Rail Current Sensing NC 2 VREF 2 1 3 Figure 35. High-Side Switch AD8417 –IN SWITCH 5 NC = NO CONNECT. – SHUNT 2 1 NC GND 6 INDUCTIVE LOAD –IN CLAMP DIODE 7 OUT OUT VS +IN VREF 1 7 8 GND BATTERY INDUCTIVE LOAD 6 AD8417 SHUNT 5V CLAMP DIODE 7 8 OUTPUT – VREF 2 BATTERY In this circuit configuration, when the switch is closed, the common-mode voltage decreases to near the negative rail. When the switch is open, the voltage reversal across the inductive load causes the common-mode voltage to be held one diode drop above the battery by the clamp diode. + VREF 1 SWITCH In the case of a high-side current sense with a low-side switch, the PWM control switch is ground referenced. Tie an inductive load (solenoid) to a power supply and place a resistive shunt between the switch and the load (see Figure 34). An advantage of placing the shunt on the high side is that the entire current, including the recirculation current, is measurable because the shunt remains in the loop when the switch is off. In addition, diagnostics are enhanced because shorts to ground are detected with the shunt on the high side. OUT High-Side Current Sense with a Low-Side Switch VS 5V OVERCURRENT DETECTION (
AD8417WBRMZ-10 价格&库存

很抱歉,暂时无法提供与“AD8417WBRMZ-10”相匹配的价格&库存,您可以联系我们找货

免费人工找货