AD8465WBCPZ-WP

Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply LVDS Comparator AD8465 Data Sheet FUNCTIONAL BLOCK DIAGRAM Fully specified rail to rail at VCCI = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCCI + 0.2 V Low glitch LVDS-compatible output stage Propagation delay: 1.6 ns Power dissipation: 37 mW at 2.5 V Shutdown pin Single-pin control for programmable hysteresis and latch Power supply rejection > 60 dB −40°C to +125°C operation VCCO VCCI VP NONINVERTING INPUT Q OUTPUT AD8465 LVDS Q OUTPUT VN INVERTING INPUT LE/HYS INPUT APPLICATIONS SDN INPUT High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) Qualified for automotive applications 07958-001 FEATURES Figure 1. GENERAL DESCRIPTION The AD8465 is a very fast comparator fabricated on the Analog Devices, Inc., proprietary XFCB2 process. This comparator is exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCCI + 0.2 V, low noise, LVDScompatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shutdown inputs. A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a −0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions, support a wide input signal range with greatly reduced power consumption. The device offers 1.6 ns propagation delay with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps. The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option. The AD8465 is available in a 12-lead LFCSP. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8465 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Application Information ................................................................ 10 Applications ....................................................................................... 1 Power/Ground Layout and Bypassing ..................................... 10 Functional Block Diagram .............................................................. 1 LVDS-Compatible Output Stage .............................................. 10 General Description ......................................................................... 1 Using/Disabling the Latch Feature........................................... 10 Revision History ............................................................................... 2 Optimizing Performance ........................................................... 10 Specifications..................................................................................... 3 Comparator Propagation Delay Dispersion ........................... 11 Electrical Characteristics ............................................................. 3 Comparator Hysteresis .............................................................. 11 Timing Information ......................................................................... 5 Crossover Bias Points ................................................................. 12 Absolute Maximum Ratings ............................................................ 6 Minimum Input Slew Rate Requirement ................................ 12 Thermal Resistance ...................................................................... 6 Typical Application Circuits ......................................................... 13 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 14 Pin Configuration and Function Descriptions ............................. 7 Ordering Guide .......................................................................... 14 Typical Performance Characteristics ............................................. 8 Automotive Products ................................................................. 14 REVISION HISTORY 12/14—Rev. A to Rev. B Changes to Applications Section .................................................... 1 Changes to Table 4 ............................................................................ 6 Changes to Figure 3 and Table 5 ..................................................... 7 Changes to Figure 26 ...................................................................... 14 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 14 Added Automotive Products Section........................................... 14 11/11—Rev. 0 to Rev. A Changed VIL = 0.4 V to VIL = 0.8 V in Conditions of IIL, Table 1 ................................................................................................ 3 4/09—Revision 0: Initial Version Rev. B | Page 2 of 14 Data Sheet AD8465 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VCCI = VCCO = 2.5 V, TA = −40°C to +125°C, typical at TA = 25 °C, unless otherwise noted. Table 1. Parameter DC INPUT CHARACTERISTICS Voltage Range Common-Mode Range Differential Voltage Offset Voltage Bias Current Offset Current Capacitance Resistance, Differential Mode Resistance, Common Mode Active Gain Common-Mode Rejection Ratio Hysteresis LATCH ENABLE PIN CHARACTERISTICS VIH VIL IIH IIL HYSTERESIS MODE AND TIMING Hysteresis Mode Bias Voltage Minimum Resistor Value Hysteresis Current Latch Setup Time Latch Hold Time Latch-to-Output Delay Latch Minimum Pulse Width SHUTDOWN PIN CHARACTERISTICS VIH VIL IIH IIL Sleep Time Wake-Up Time DC OUTPUT CHARACTERISTICS Differential Output Voltage Level ΔVOD Common-Mode Voltage Peak-to-Peak Common-Mode Output Symbol Conditions Min VP, VN VCCI = 2.5 V to 5.5 V VCCI = 2.5 V to 5.5 V VCCI = 2.5 V to 5.5 V −0.5 −0.2 VOS IP, IN −5.0 −5.0 −2.0 ±2 −0.1 V to VCCI −0.5 V to VCCI + 0.5 V 200 100 1 750 370 62 VCCI = 2.5 V, VCCO = 2.5 V, VCM = −0.2 V to +2.7 V VCCI = 2.5 V, VCCO = 5.0 V RHYS = ∞ 50 Hysteresis is shut off Latch mode guaranteed VIH = VCCO + 0.2 V VIL = 0.8 V 2.0 −0.2 −6 −0.1 Current sink −1 µA Hysteresis = 120 mV Hysteresis = 120 mV VOD = 50 mV VOD = 50 mV VOD = 50 mV VOD = 50 mV 1.145 30 −25 Comparator is operating Shutdown guaranteed VIH = VCCO VIL = 0 V 10% output swing VOD = 50 mV, output valid VCCO = 2.5 V to 5.0 V RLOAD = 100 Ω RLOAD = 100 Ω RLOAD = 100 Ω RLOAD = 100 Ω 2.0 −0.2 −6 CP, CN AV CMRR tS tH tPLOH, tPLOL tPL tSD tH VOD VOCI VOC (p-p) Typ Rev. B | Page 3 of 14 Max Unit VCCI + 0.2 VCCI + 0.2 VCCI +5.0 +5.0 +2.0 V V V mV µA µA pF kΩ kΩ dB dB 7500 4000 50 dB mV