AD8508

20 μA Maximum, Rail-to-Rail I/O, Zero Input Crossover Distortion Amplifiers AD8506/AD8508 FEATURES PSRR: 100 dB minimum CMRR: 105 dB typical Very low supply current: 20 μA per amp maximum 1.8 V to 5 V single-supply or ±0.9 V to ±2.5 V dual-supply operation Rail-to-rail input and output Low noise: 45 nV/√Hz @ 1 kHz 2.5 mV offset voltage maximum Very low input bias current: 1 pA typical PIN CONFIGURATIONS OUT A 1 –IN A 2 +IN A 3 V– 4 8 AD8506 TOP VIEW (Not to Scale) V+ OUT B +IN B 06900-002 06900-045 7 6 5 –IN B Figure 1. 8-Lead MSOP (RM-8) OUT A –IN A +IN A V+ +IN B –IN B OUT B 1 2 3 4 5 6 7 14 13 OUT D –IN D +IN D APPLICATIONS Pressure and position sensors Remote security Bio sensors IR thermometers Battery-powered consumer equipment Hazard detectors AD8508 12 TOP VIEW 11 V– (Not to Scale) 10 +IN C 9 8 –IN C OUT C Figure 2. 14-Lead TSSOP (RU-14) GENERAL DESCRIPTION The AD8506/AD8508 are dual and quad micropower amplifiers featuring rail-to-rail input and output swings while operating from a 1.8 V to 5 V single or from ±0.9 V to ±2.5 V dual power supply. Using a novel circuit technology, these low cost amplifiers offer zero crossover distortion (excellent PSRR and CMRR performance) and very low bias current, while operating with a supply current of less than 20 μA per amplifier. This amplifier family offers the lowest noise in its power class. This combination of features makes the AD8506/AD8508 amplifiers ideal choices for battery-powered applications because they minimize errors due to power supply voltage variations over the lifetime of the battery and maintain high CMRR even for a rail-to-rail input op amp. Remote battery-powered sensors, handheld instrumentation and consumer equipment, hazard detection (for example, smoke, fire, and gas), and patient monitors can benefit from the features of the AD8506/AD8508 amplifiers. The AD8506/AD8508 are specified for both the industrial temperature range of −40°C to +85°C and the extended industrial temperature range of −40°C to +125°C. The AD8506 dual amplifiers are available in an 8-lead MSOP package. The AD8508 quad amplifiers are available in the 14-lead TSSOP package. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved. AD8506/AD8508 TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  Pin Configurations ........................................................................... 1  General Description ......................................................................... 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Electrical Characteristics—5 V Operation................................ 3  Electrical Characteristics—1.8 V Operation ............................ 4  Absolute Maximum Ratings............................................................ 5  Thermal Resistance ...................................................................... 5  ESD Caution...................................................................................5  Typical Performance Characteristics ..............................................6  Theory of Operation ...................................................................... 13  Applications Information .............................................................. 15  Pulse Oximeter Current Source ............................................... 15  Four-Pole Low-Pass Butterworth Filter for Glucose Monitor ......................................................................... 16  Outline Dimensions ....................................................................... 17  Ordering Guide .......................................................................... 17  REVISION HISTORY 7/08—Rev. 0 to Rev. A Added AD8508 ................................................................... Universal Added TSSOP Package ...................................................... Universal Changes to Features Section and General Description Section . 1 Added Figure 2; Renumbered Sequentially .................................. 1 Changed Electrical Characteristics Heading to Electrical Characteristics—5 V Operation ..................................................... 3 Changes to Table 1 ............................................................................ 3 Added Electrical Characteristics—1.8 V Operation Heading .... 4 Changes to Table 2 ............................................................................ 4 Changes to Table 3, Thermal Resistance Section, and Table 4 ... 5 Added TA = 25°C Condition to Typical Performance Characteristics Section..................................................................... 6 Changes to Figure 3, Figure 4, Figure 6, and Figure 7 ................. 6 Added Figure 11 and Figure 14....................................................... 7 Changes to Figure 17 Through Figure 20.......................................8 Changes to Figure 21 Through Figure 26.......................................9 Changes to Figure 27, Figure 28, Figure 30, and Figure 31....... 10 Changes to Figure 34, Figure 37, and Figure 38 ......................... 11 Added Figure 39 and Figure 40 .................................................... 12 Added Theory of Operation Section, Figure 41, and Figure 42 .......................................................................................... 13 Added Figure 43 and Figure 44 .................................................... 14 Added Applications Information Section and Figure 45 .......... 15 Added Figure 46 ............................................................................. 16 Updated Outline Dimensions ....................................................... 17 Added Figure 48 ............................................................................. 17 Changes to Ordering Guide .......................................................... 17 11/07—Revision 0: Initial Version Rev. A | Page 2 of 20 AD8506/AD8508 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION VSY = 5 V, VCM = VSY/2, TA = 25°C, RL = 100 kΩ to GND, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS IB −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C Input Offset Current IOS −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C −40°C ≤ TA ≤ +125°C 0 V ≤ VCM ≤ 5 V −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C 0.05 V ≤ VOUT ≤ 4.95 V −40°C ≤ TA ≤ +125°C −40°C ≤ TA ≤ +125°C 0.5 Conditions 0 V ≤ VCM ≤ 5 V −40°C ≤ TA ≤ +125°C Min Typ 0.5 1 Max 2.5 3.5 10 100 600 5 50 130 5 Unit mV mV pA pA pA pA pA pA V dB dB dB dB dB μV/°C pF pF V V V V mV mV mV mV mA dB dB dB μA μA mV/μs kHz Degrees μV p-p nV/√Hz fA/√Hz Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain Offset Voltage Drift Input Capacitance Differential Mode Input Capacitance Common Mode OUTPUT CHARACTERISTICS Output Voltage High AVO ΔVOS/ΔT CDIFF CCM VOH 0 90 90 85 105 100 105 120 2 3 4.2 Output Voltage Low VOL Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio ISC PSRR RL = 100 kΩ to GND −40°C ≤ TA ≤ +125°C RL = 10 kΩ to GND −40°C ≤ TA ≤ +125°C RL = 100 kΩ to VSY −40°C ≤ TA ≤ +125°C RL = 10 kΩ to VSY −40°C ≤ TA ≤ +125°C VOUT = VSY or GND VSY = 1.8 V to 5 V −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C VOUT = VSY/2 −40°C ≤ TA ≤ +125°C RL = 100 kΩ, CL = 10 pF, G = 1 RL = 1 MΩ, CL = 20 pF, G = 1 RL = 1 MΩ, CL = 20 pF, G = 1 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 4.98 4.98 4.9 4.9 4.99 4.95 2 10 ±45 5 5 25 30 100 100 95 110 Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density ISY 15 20 25 SR GBP ΦM en p-p en in 13 95 60 2.8 45 15 Rev. A | Page 3 of 20 AD8506/AD8508 ELECTRICAL CHARACTERISTICS—1.8 V OPERATION VSY = 1.8 V, VCM = VSY/2, TA = 25°C, RL = 100 kΩ to GND, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS IB −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C Input Offset Current IOS −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C −40°C ≤ TA ≤ +125°C 0 V ≤ VCM ≤ 1.8 V −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C 0.05 V ≤ VOUT ≤ 1.75 V −40°C ≤ TA ≤ +125°C −40°C ≤ TA ≤ +125°C 0.5 Conditions 0 V ≤ VCM ≤ 1.8 V −40°C ≤ TA ≤ +125°C Min Typ 0.5 1 Max 2.5 3.5 10 100 600 5 50 100 1.8 Unit mV mV pA pA pA pA pA pA V dB dB dB dB dB μV/°C pF pF V V V V mV mV mV mV mA dB dB dB μA μA mV/μs kHz Degrees μV p-p nV/√Hz fA/√Hz Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain Offset Voltage Drift Input Capacitance Differential Mode Input Capacitance Common Mode OUTPUT CHARACTERISTICS Output Voltage High AVO ΔVOS/ΔT CDIFF CCM VOH 0 85 85 80 95 95 100 115 2.5 3 4.2 Output Voltage Low VOL Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio ISC PSRR RL = 100 kΩ to GND −40°C ≤ TA ≤ +125°C RL = 10 kΩ to GND −40°C ≤ TA ≤ +125°C RL = 100 kΩ to VSY −40°C ≤ TA ≤ +125°C RL = 10 kΩ to VSY −40°C ≤ TA ≤ +125°C VOUT = VSY or GND VSY = 1.8 V to 5 V −40°C ≤ TA ≤ +85°C −40°C ≤ TA ≤ +125°C VOUT = VSY/2 −40°C ≤ TA ≤ +125°C RL = 100 kΩ, CL = 10 pF, G = 1 RL = 1 MΩ, CL = 20 pF, G = 1 RL = 1 MΩ, CL = 20 pF, G = 1 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 1.78 1.78 1.65 1.65 1.79 1.75 2 12 ±4.5 5 5 25 25 100 100 95 110 Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density ISY 16.5 20 25 SR GBP ΦM en p-p en in 13 95 60 2.8 45 15 Rev. A | Page 4 of 20 AD8506/AD8508 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage2 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) 1 THERMAL RESISTANCE Rating 5.5 V ±VSY ± 0.1 V ±10 mA ±VSY Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. This was measured using a standard two-layer board. Table 4. Thermal Resistance Package Type 8-Lead MSOP (RM-8) 14-Lead TSSOP (RU-14) θJA 190 180 θJC 44 35 Unit °C/W °C/W ESD CAUTION Input pins have clamp diodes to the supply pins. Input current should be limited to 10 mA or less whenever the input signal exceeds the power supply rail by 0.5 V. 2 Differential input voltage is limited to 5 V or the supply voltage, whichever is less. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 5 of 20 AD8506/AD8508 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 250 VSY = 1.8V VCM = VSY/2 200 250 VSY = 5V VCM = VSY/2 200 NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 150 150 100 100 50 50 06900-003 –3 –2 –1 0 VOS (mV) 1 2 3 4 –3 –2 –1 0 VOS (mV) 1 2 3 4 Figure 3. Input Offset Voltage Distribution 16 14 NUMBER OF AMPLIFIERS Figure 6. Input Offset Voltage Distribution 12 VSY = 5V –40°C ≤ TA ≤ +125°C 10 NUMBER OF AMPLIFIERS VSY = 1.8V –40°C ≤ TA ≤ +125°C 12 10 8 6 4 2 0 8 6 4 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 0 1 2 3 4 5 6 7 8 9 10 11 12 13 TCVOS (µV/°C) TCVOS (µV/°C) Figure 4. Input Offset Voltage Drift Distribution 2000 1500 1000 500 VOS (µV) Figure 7. Input Offset Voltage Drift Distribution 2000 1500 1000 500 VOS (µV) VSY = 1.8V VSY = 5V 0 –500 –1000 –1500 –2000 0 –500 –1000 –1500 –2000 06900-005 06900-007 06900-004 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 1 2 VCM (V) 3 4 5 VCM (V) Figure 5. Input Offset Voltage vs. Input Common-Mode Voltage Figure 8. Input Offset Voltage vs. Input Common-Mode Voltage Rev. A | Page 6 of 20 06900-008 06900-006 0 –4 0 –4 AD8506/AD8508 TA = 25°C, unless otherwise noted. –115 VSY = 1.8V –120 VSY = 5V –120 –125 –130 VOS (µV) VOS (µV) 06900-037 –125 –135 –130 –140 –135 –145 0 0.2 0.4 0.6 0.8 1.0 VCM (V) 1.2 1.4 1.6 1.8 0 1 2 VCM (V) 3 4 5 Figure 9. Input Offset Voltage vs. Input Common-Mode Voltage 600 550 500 450 IB (pA) 400 350 300 250 200 VSY = 1.8V Figure 12. Input Offset Voltage vs. Input Common-Mode Voltage 600 550 500 450 VSY = 5V IB (pA) 400 350 300 250 200 VCM (V) VCM (V) Figure 10. Input Bias Current vs. Common-Mode Voltage at 125°C 1000 VSY = 1.8V VCM = VSY/2 100 Figure 13. Input Bias Current vs. Common-Mode Voltage at 125°C 1000 VSY = 5V VCM = VSY/2 100 10 IB (pA) 10 1 IB (pA) 1 0.1 0.1 06900-018 35 45 55 65 75 85 95 TEMPERATURE (°C) 105 115 125 Figure 11. Input Bias Current vs. Temperature Figure 14. Input Bias Current vs. Temperature Rev. A | Page 7 of 20 06900-019 0.01 25 35 45 55 65 75 85 95 TEMPERATURE (°C) 105 115 125 0.01 25 06900-012 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 06900-009 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 06900-038 –140 –150 AD8506/AD8508 TA = 25°C, unless otherwise noted. 10k VSY = 1.8V 10k OUTPUT VOLTAGE TO SUPPLY RAIL (mV) OUTPUT VOLTAGE TO SUPPLY RAIL (mV) VSY = 5V 1k 1k VDD – VOH 100 100 VDD – VOH VOL 10 VOL 10 1 1 0.1 06900-010 0.01 0.1 LOAD CURRENT (mA) 1 10 0.01 0.1 1 LOAD CURRENT (mA) 10 100 Figure 15. Output Voltage to Supply Rail vs. Load Current 14 OUTPUT VOLTAGE TO SUPPLY RAIL (mV) Figure 18. Output Voltage to Supply Rail vs. Load Current 14 OUTPUT VOLTAGE TO SUPPLY RAIL (mV) VSY = 1.8V 12 VDD – VOH @ RL = 10kΩ 10 8 6 4 2 0 –40 VDD – VOH @ RL = 100kΩ VOL @ RL = 100kΩ 06900-011 VSY = 5V 12 VDD – VOH @ RL = 10kΩ 10 8 6 4 2 0 –40 VDD – VOH @ RL = 100kΩ VOL @ RL = 100kΩ –25 –10 5 20 35 50 65 80 95 110 125 06900-014 06900-024 VOL @ RL = 10kΩ VOL @ RL = 10kΩ –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 16. Output Voltage to Supply Rail vs. Temperature 90 80 VCM = VSY/2 AD8506 AD8508 Figure 19. Output Voltage to Supply Rail vs. Temperature 90 80 TOTAL SUPPLY CURRENT (µA) VSY = 1.8V AND 5V VCM = VSY/2 TOTAL SUPPLY CURRENT (µA) 70 60 50 40 30 20 10 06900-021 70 60 50 40 30 20 10 0 –40 AD8508, AD8508, AD8506, AD8506, –25 –10 5 20 35 50 65 TEMPERATURE (°C) 80 95 1.8V 5V 1.8V 5V 125 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 SUPPLY VOLTAGE (V) 4.0 4.5 5.0 110 Figure 17. Total Supply Current vs. Supply Voltage Figure 20. Total Supply Current vs. Temperature Rev. A | Page 8 of 20 06900-013 0.1 0.001 0.01 0.001 AD8506/AD8508 TA = 25°C, unless otherwise noted. 120 100 80 60 40 GAIN PHASE VSY = 1.8V 120 100 80 60 120 100 80 60 PHASE VSY = 5V 120 100 80 60 PHASE (Degrees) 40 GAIN (dB) 20 0 –20 –40 –60 –80 06900-022 GAIN (dB) 20 0 –20 –40 –60 –80 GAIN, CL = 0pF PHASE, CL = 0pF GAIN, CL = 50pF PHASE, CL = 50pF GAIN, CL = 100pF PHASE, CL = 100pF 1k 10k FREQUENCY (Hz) 100k 20 0 –20 –40 –60 –80 GAIN 40 20 0 –100 –120 100 –100 –120 1M GAIN, CL = 0pF PHASE, CL = 0pF GAIN, CL = 50pF PHASE, CL = 50pF GAIN, CL = 100pF PHASE, CL = 100pF 1k 10k FREQUENCY (Hz) 100k –20 –40 –60 –80 Figure 21. Open-Loop Gain and Phase vs. Frequency 50 40 30 Figure 24. Open-Loop Gain and Phase vs. Frequency 50 40 30 CLOSED-LOOP GAIN (dB) G = –100 VSY = 1.8V G = –100 VSY = 5V CLOSED-LOOP GAIN (dB) 20 10 0 –10 –20 –30 –40 G = –10 20 10 0 –10 –20 –30 –40 G = –10 G = –1 G = –1 06900-017 1k 10k FREQUENCY (Hz) 100k 1M 1k 10k FREQUENCY (Hz) 100k 1M Figure 22. Closed-Loop Gain vs. Frequency 10k VSY = 1.8V 1k G = 100 G = 10 ZOUT (Ω) ZOUT (Ω) Figure 25. Closed-Loop Gain vs. Frequency 10k VSY = 5V 1k G = 100 100 G=1 10 G = 10 G=1 100 10 1 1 0.1 06900-028 100 1k 10k FREQUENCY (Hz) 100k 1M 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 23. ZOUT vs. Frequency Figure 26. ZOUT vs. Frequency Rev. A | Page 9 of 20 06900-031 0.1 10 0.01 10 06900-020 –50 100 –50 100 06900-025 –100 100 –100 1M PHASE (Degrees) 40 AD8506/AD8508 TA = 25°C, unless otherwise noted. 100 VSY = 1.8V 100 VSY = 5V 90 90 80 CMRR (dB) 80 CMRR (dB) 70 70 60 60 50 50 100 1k 10k FREQUENCY (Hz) 100k 1M 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 27. CMRR vs. Frequency 100 90 80 70 PSRR (dB) Figure 30. CMRR vs. Frequency 100 VSY = 1.8V 90 80 70 PSRR (dB) VSY = 5V 60 50 40 30 20 10 PSRR– 06900-023 60 50 40 30 PSRR+ 20 10 PSRR– PSRR+ 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 28. PSRR vs. Frequency 80 70 60 OVERSHOOT (%) Figure 31. PSRR vs. Frequency 80 VSY = 5V RL = 100kΩ VSY = 1.8V RL = 100kΩ 70 60 OVERSHOOT (%) 50 40 30 –OVERSHOOT 20 +OVERSHOOT 10 06900-027 50 40 30 –OVERSHOOT 20 +OVERSHOOT 10 06900-030 0 10 100 LOAD CAPACITANCE (pF) 600 0 10 100 LOAD CAPACITANCE (pF) 600 Figure 29. Small Signal Overshoot vs. Load Capacitance Figure 32. Small Signal Overshoot vs. Load Capacitance Rev. A | Page 10 of 20 06900-026 0 10 0 10 06900-032 06900-029 40 10 40 10 AD8506/AD8508 TA = 25°C, unless otherwise noted. VSY = 1.8V RL = 100kΩ CL = 200pF G=1 VSY = 5V RL = 100kΩ CL = 200pF G=1 VOLTAGE (1V/DIV) VOLTAGE (500mV/DIV) TIME (100µs/DIV) TIME (100µs/DIV) Figure 33. Large Signal Transient Response VSY = 1.8V RL = 100kΩ CL = 200pF G=1 VOLTAGE (5mV/DIV) Figure 36. Large Signal Transient Response VSY = 5V RL = 100kΩ CL = 200pF G=1 VOLTAGE (5mV/DIV) TIME (100µs/DIV) TIME (100µs/DIV) Figure 34. Small Signal Transient Response VSY = 1.8V AND 5V 2.78µV p-p Figure 37. Small Signal Transient Response 1k VSY = 1.8V AND 5V VOLTAGE NOISE DENSITY (nV/√Hz) VOLTAGE (0.5µV/DIV) 100 10 06900-034 TIME (4s/DIV) 1 10 Figure 35. Voltage Noise 0.1 Hz to 10 Hz 100 FREQUENCY (Hz) 1k 10k Figure 38. Voltage Noise Density vs. Frequency Rev. A | Page 11 of 20 06900-047 1 06900-046 06900-036 06900-035 06900-033 AD8506/AD8508 TA = 25°C, unless otherwise noted. –40 100kΩ –50 CHANNEL SEPARATION (dB) 10kΩ VSY = 1.8V VIN = 1.5V p-p CHANNEL SEPARATION (dB) –40 100kΩ –50 –60 –70 –80 –90 –100 –110 06900-049 06900-048 10kΩ VSY = 5V VIN = 4V p-p –60 –70 –80 –90 –100 –110 –120 100 1k FREQUENCY (Hz) 10k 100k –120 100 1k FREQUENCY (Hz) 10k 100k Figure 39. Channel Separation vs. Frequency Figure 40. Channel Separation vs. Frequency Rev. A | Page 12 of 20 AD8506/AD8508 THEORY OF OPERATION The AD8506/AD8508 are unity-gain stable CMOS rail-to-rail input/output operational amplifiers designed to optimize performance in current consumption, PSRR, CMRR, and zero crossover distortion, all embedded in a small package. The typical offset voltage is 500 μV, with a low peak-to-peak voltage noise of 2.8 μV p-p from 0.1 Hz to 10 Hz and a voltage noise density of 45 nV/√Hz at 1 kHz. The AD8506/AD8508 are designed to solve two key problems in low voltage battery-powered applications: battery voltage decrease over time and rail-to-rail input stage distortion. In battery-powered applications, the supply voltage available to the IC is the voltage of the battery. Unfortunately, the voltage of a battery decreases as it discharges itself through the load. This voltage drop over the lifetime of the battery causes an error in the output of the op amps. Some applications requiring precision measurements during the entire lifetime of the battery use voltage regulators to power up the op amps as a solution. If a design uses standard battery cells, the op amps experience a supply voltage change from roughly 3.2 V to 1.8 V during the lifetime of the battery. This means that for a PSRR of 70 dB minimum in a typical op amp, the input-referred offset error is approximately 440 μV. If the same application uses the AD8506/AD8508 with a 100 dB minimum PSRR, the error is only 14 μV. It is possible to calibrate out this error or to use an external voltage regulator to power the op amp, but these solutions can increase system cost and complexity. The AD8506/AD8508 solve the impasse with no additional cost or error-nullifying circuitry. The second problem with battery-powered applications is the distortion caused by the standard rail-to-rail input stage. Using a CMOS non-rail-to-rail input stage (that is, a single differential pair) limits the input voltage to approximately one VGS (gatesource voltage) away from one of the supply lines. Because VGS for normal operation is commonly over 1 V, a single differential pair input stage op amp greatly restricts the allowable input voltage range when using a low supply voltage. This limitation restricts the number of applications where the non-rail-to-rail input op amp was originally intended to be used. To solve this problem, a dual differential pair input stage is usually implemented (see Figure 41); however, this technique has its own drawbacks. One differential pair amplifies the input signal when the commonmode voltage is on the high end, whereas the other pair amplifies the input signal when the common-mode voltage is on the low end. This method also requires a control circuitry to operate the two differential pairs appropriately. Unfortunately, this topology leads to a very noticeable and undesirable problem: if the signal level moves through the range where one input stage turns off and the other one turns on, noticeable distortion occurs (see Figure 42). VDD VBIAS VIN+ IB Q3 Q1 Q2 Q4 VIN– IB VSS Figure 41. A Typical Dual Differential Pair Input Stage Op Amp (Dual PMOS Q1 and Q2 Transistors Form the Lower End of the Input Voltage Range Whereas Dual NMOS Q3 and Q4 Compose the Upper End) 300 250 200 150 100 50 VSY = 5V TA = 25°C VOS (µV) 0 –50 –100 –150 –200 –250 0 0.5 1.0 1.5 2.0 2.5 3.0 VCM (V) 3.5 4.0 4.5 5.0 06900-040 –300 Figure 42. Typical Input Offset Voltage vs. Common-Mode Voltage Response in a Dual Differential Pair Input Stage Op Amp (Powered by 5 V Supply; Results of Approximately 100 Units per Graph Are Displayed) This distortion forces the designer to come up with impractical ways to avoid the crossover distortion areas, therefore narrowing the common-mode dynamic range of the operational amplifier. The AD8506/AD8508 solve this crossover distortion problem by using an on-chip charge pump to power the input differential pair. The charge pump creates a supply voltage higher than the voltage of the battery, allowing the input stage to handle a wide range of input signal voltages without using a second differential pair. With this solution, the input voltage can vary from one supply extreme to the other with no distortion, thereby restoring the op amp full common-mode dynamic range. Rev. A | Page 13 of 20 06900-039 AD8506/AD8508 The charge pump has been carefully designed so that switching noise components at any frequency, both within and beyond the amplifier bandwidth, are much lower than the thermal noise floor. Therefore, the spurious-free dynamic range (SFDR) is limited only by the input signal and the thermal or flicker noise. There is no intermodulation between input signal and switching noise. Figure 43 displays a typical front-end section of an operational amplifier with an on-chip charge pump. VPP = POSITIVE PUMPED VOLTAGE = VDD + 1.8V VPP VB CASCODE STAGE AND RAIL-TO-RAIL OUTPUT STAGE VDD Figure 44, input offset voltage vs. input common-mode voltage response, shows the typical response of 12 devices from Figure 8. Figure 44 has been expanded so that it is easier to compare with Figure 42, typical input offset voltage vs. common-mode voltage response in a dual differential pair input stage op amp. 300 250 200 150 100 50 VOS (µV) 0 –50 –100 VSY = 5V, TA = 25°C +IN Q1 Q2 –IN OUT –150 –200 –250 VSS 06900-041 0 0.5 1.0 1.5 2.0 2.5 3.0 VCM (V) 3.5 4.0 4.5 5.0 Figure 43. Typical Front-End Section of an Op Amp with Embedded Charge Pump Figure 44. Input Offset Voltage vs. Input Common-Mode Voltage Response (Powered by a 5 V Supply; Results of 12 Units Are Displayed) This solution improves the CMRR performance tremendously. For instance, if the input varies from rail-to-rail on a 2.5 V supply rail, using a part with a CMRR of 70 dB minimum, an input-referred error of 790 μV is introduced. Another part with a CMRR of 52 dB minimum generates a 6.3 mV error. The AD8506/AD8508 CMRR of 90 dB minimum causes only a 79 μV error. As with the PSRR error, there are complex ways to minimize this error, but the AD8506/AD8508 solve this problem without incurring unnecessary circuitry complexity or increased cost. Rev. A | Page 14 of 20 06900-042 –300 AD8506/AD8508 APPLICATIONS INFORMATION PULSE OXIMETER CURRENT SOURCE A pulse oximeter is a noninvasive medical device used for measuring continuously the percentage of hemoglobin (Hb) saturated with oxygen and the pulse rate of a patient. Hemoglobin that is carrying oxygen (oxyhemoglobin) absorbs light in the infrared (IR) region of the spectrum; hemoglobin that is not carrying oxygen (deoxyhemoglobin) absorbs visible red (R) light. In pulse oximetry, a clip containing two LEDs (sometimes more, depending on the complexity of the measurement algorithm) and the light sensor (photodiode) is placed on the finger or earlobe of the patient. One LED emits red light (600 nm to 700 nm) and the other emits light in the near IR (800 nm to 900 nm) region. The clip is connected by a cable to a processor unit. The LEDs are rapidly and sequentially excited by two current sources (one for each LED), whose dc levels depend on the LED being driven, based on manufacturer requirements, and the detector is synchronized to capture the light from each LED as it is transmitted through the tissue. An example design of a dc current source driving the red and infrared LEDs is shown in Figure 45. These dc current sources allow 62.5 mA and 101 mA to flow through the red and infrared LEDs, respectively. First, to prolong battery life, the LEDs are driven only when needed. One-third of the ADG733 SPDT analog switch is used to disconnect/connect the 1.25 V voltage reference from/to each current circuit. When driving the LEDs, the ADR1581 1.25 V voltage reference is buffered by ½ of the AD8506; the presence of this voltage on the noninverting input forces the output of the op amp (due to the negative feedback) to maintain a level that makes its inverting input-to-track the noninverting pin. Therefore, the 1.25 V appears in parallel with the 20 Ω R1 or 12.4 Ω R5 current source resistor, creating the flow of the 62.5 mA or 101 mA current through the red or infrared LED as the output of the op amp turns on the Q1 or Q2 N-MOSFET IRLMS2002. The maximum total quiescent currents for the ½ AD8506, ADR1581, and ADG733 are 25 μA, 70 μA, and 1 μA, respectively, making a total of 96 μA current consumption (480 μW power consumption) per circuit, which is good for a system powered by a battery. If the accuracy and temperature drift of the total design need to be improved, then a more accurate and low temperature coefficient drift voltage reference and current source resistor should be utilized. C3 and C4 are used to improve stabilization of U1; R3 and R7 are used to provide some current limit into the U1 inverting pin; and R2 and R6 are used to slow down the rise time of the N-MOSFET when it turns on. These elements may not be needed, or some bench adjustments may be required. +5V CONNECT TO RED LED +5V C1 0.1µF 62.5mA R2 V 22Ω OUT1 Q1 IRLMS2002 R3 1kΩ R1 20Ω 0.1% 1/8W MIN 8 C2 0.1µF U1 1/2 U2 ADG733 +5V R4 53.6kΩ VREF = 1.25V U3 ADR1581 AD8506 5 16 VDD 14 D1 S1A 12 S1B 13 7 V+ V– 4 6 15 D2 S2A 2 S2B 1 C3 22pF 4 D3 S3A 5 S3B 3 RED CURRENT SOURCE 8 GND VSS 9 A2 10 A1 11 A0 6 EN 7 CONNECT TO INFRARED LED U1 1/2 +5V 101mA R6 22Ω VOUT2 Q2 IRLMS2002 R7 1kΩ AD8506 8 1 V+ V– 4 3 2 I_BIT2 I_BIT1 I_BIT0 I_ENA C4 22pF Figure 45. Pulse Oximeter Red and Infrared Current Sources Using the AD8506 as a Buffer to the Voltage Reference Device Rev. A | Page 15 of 20 06900-043 R5 INFRARED CURRENT 12.4Ω SOURCE 0.1% 1/4W MIN AD8506/AD8508 FOUR-POLE LOW-PASS BUTTERWORTH FILTER FOR GLUCOSE MONITOR There are several methods of glucose monitoring: spectroscopic absorption of infrared light in the 2 μm to 2.5 μm range, reflectance spectrophotometry, and the amperometric type using electrochemical strips with glucose oxidase enzymes. The amperometric type generally uses three electrodes: a reference electrode, a control electrode, and a working electrode. Although this is a very old technique and widely used, signal-to-noise ratio and repeatability can be improved using the AD8506 with its low peak-to-peak voltage noise of 2.8 μV p-p from 0.1 Hz to 10 Hz and voltage noise density of 45 nV/√Hz at 1 kHz. Another consideration is operation from a 3.3 V battery. Glucose signal currents are usually less than 3 μA full scale, so the I-to-V C1 1000pF R1 5MΩ +3.3V WORKING CONTROL 3 8 converter requires low input bias current. The AD8506 is an excellent choice because it provides 1 pA typical and 10 pA maximum of input bias current at ambient temperature. A low-pass filter with a cutoff frequency of 80 Hz to 100 Hz is desirable in a glucose meter device to remove extraneous noise; this can be a simple two- or four-pole Butterworth. Low power op amps with bandwidths of 50 kHz to 500 kHz should be adequate. The AD8506 with its 95 kHz GBP and 15 μA typical of current consumption meets these requirements. A circuit design of a four-pole Butterworth filter (preceded by a one-pole low-pass filter) is shown in Figure 46. With a 3.3 V battery, the total power consumption of this design is 297 μW typical at ambient temperature. +3.3V V+ 1 R2 22.6kΩ R3 22.6kΩ C3 0.047µF AD8506 5 8 U1 1/2 +3.3V R4 22.6kΩ R5 22.6kΩ C5 0.047µF 2 REFERENCE V– 2 4 AD8506 C2 0.1µF U1 1/2 V+ 7 AD8506 3 8 U2 1/2 V– 6 4 V+ 1 V– 4 VOUT C4 0.1µF DUPLICATE OF CIRCUIT ABOVE 06900-044 Figure 46. A Four-Pole Butterworth Filter That Can Be Used in a Glucose Meter Rev. A | Page 16 of 20 AD8506/AD8508 OUTLINE DIMENSIONS 3.20 3.00 2.80 3.20 3.00 2.80 8 5 1 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8° 0° 0.80 0.60 0.40 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 47. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.10 5.00 4.90 14 8 4.50 4.40 4.30 1 7 6.40 BSC PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 SEATING COPLANARITY PLANE 0.10 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 48. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters ORDERING GUIDE Model AD8506ARMZ-R21 AD8506ARMZ-REEL1 AD8508ARUZ1 AD8508ARUZ-REEL1 1 Temperature Range –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] Package Option RM-8 RM-8 RU-14 RU-14 Branding A1X A1X Z = RoHS Compliant Part. Rev. A | Page 17 of 20 AD8506/AD8508 NOTES Rev. A | Page 18 of 20 AD8506/AD8508 NOTES Rev. A | Page 19 of 20 AD8506/AD8508 NOTES ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06900-0-7/08(A) Rev. A | Page 20 of 20