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AD8599

AD8599

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD8599 - Single and Dual, Ultralow Distortion, Ultralow Noise Op Amps - Analog Devices

  • 数据手册
  • 价格&库存
AD8599 数据手册
Single and Dual, Ultralow Distortion, Ultralow Noise Op Amps AD8597/AD8599 FEATURES Low noise: 1.1 nV/√Hz at 1 kHz Low distortion: −120 dB THD @ 1 kHz Input noise, 0.1 Hz to 10 Hz: 2 kΩ is achieved; the current noise component is larger than the resistor noise. 100 (1) TOTAL NOISE (nV/ Hz) 10 TOTAL NOISE RESISTOR NOISE ONLY 1 OUTPUT PHASE REVERSAL Output phase reversal occurs in some amplifiers when the input common-mode voltage range is exceeded. As the commonmode voltage is moved outside the input voltage range, the outputs of these amplifiers can suddenly jump in the opposite direction to the supply rail. This is the result of the differential input pair shutting down that causes a radical shifting of internal voltages that results in the erratic output behavior. 0.1 10 100 1k 10k SOURCE RESISTANCE (Ω) Figure 58. Noise vs. Source Resistance Rev. B | Page 15 of 20 06274-076 AD8597/AD8599 The AD8597/AD8599 are the optimum choice for low noise performance if the source resistance is kept < 1 kΩ. At higher values of source resistance, optimum performance with respect to only noise is obtained with other amplifiers from Analog Devices. Both voltage noise and current noise need to be considered. For more information on avoiding noise from grounding problems and inadequate bypassing, see the AN-345 Application Note, Grounding for Low- and High-Frequency Circuits. For V+ general noise theory with extensive calculations, see the AN-358 Application Note, Noise and Operational Amplifier Circuits. A good selection table for low noise op amps can be found in AN-940 Application Note, Low Noise Amplifier Selection Guide for Optimal Noise Performance. An interesting note on using one section of a monolithic dual to phase compensate the other section is in the AN-107 Application Note, Active Feedback Improves Amplifier Phase Accuracy. 7 Q36 R18 D1 D31 2 D34 Q18 Q19 D39 D41 D42 Q32 D2 Q27 4 Q28 06247-079 R19 R31 D2 6 OUTPUT INVERTING – INPUT VB Q19 Q20 C1 R1 D3 R32 3 NONINVERTING + INPUT D40 V– Figure 59. Simplified Schematic Rev. B | Page 16 of 20 AD8597/AD8599 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 1 5 4 6.20 (0.2441) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) 0.25 (0.0099) 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45° 0.51 (0.0201) 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 60. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.25 3.00 SQ 2.75 0.60 MAX 0.60 MAX 5 8 0.50 BSC PIN 1 INDICATOR TOP VIEW 2.95 2.75 SQ 2.55 EXPOSED PAD (BOT TOM VIEW) 1.60 1.45 1.30 PIN 1 INDICATOR 4 1 0.90 MAX 0.85 NOM SEATING PLANE 12° MAX 0.70 MAX 0.65 TYP 0.50 0.40 0.30 0.05 MAX 0.01 NOM 1.89 1.74 1.59 Figure 61. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm × 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters ORDERING GUIDE Model AD8597ACPZ-R2 1 AD8597ACPZ-REEL1 AD8597ACPZ-REEL71 AD8597ARZ1 AD8597ARZ-REEL1 AD8597ARZ-REEL71 AD8599ARZ1 AD8599ARZ-REEL1 AD8599ARZ-REEL71 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] Package Option CP-8-2 CP-8-2 CP-8-2 R-8 R-8 R-8 R-8 R-8 R-8 101708-B 0.30 0.23 0.18 0.20 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATIONS SECTION OF THIS DATA SHEET. 012407-A Branding A22 A22 A22 Z = RoHS Complaint Part. Rev. B | Page 17 of 20 AD8597/AD8599 NOTES Rev. B | Page 18 of 20 AD8597/AD8599 NOTES Rev. B | Page 19 of 20 AD8597/AD8599 NOTES ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06274-0-10/08(B) Rev. B | Page 20 of 20
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