Ultrafast, 4 ns
Single-Supply Comparators
AD8611/AD8612
Data Sheet
PIN CONFIGURATIONS
4 ns propagation delay at 5 V
Single-supply operation: 3 V to 5 V
100 MHz input
Latch function
V+ 1
IN+ 2
AD8611
8
QA
7
QA
IN– 3
6 GND
TOP VIEW
V– 4 (Not to Scale) 5 LATCH
06010-001
FEATURES
V+ 1
IN+ 2
AD8611
IN– 3
TOP VIEW
(Not to Scale)
V– 4
8
QA
7
QA
6
GND
5
LATCH
Figure 2. 8-Lead MSOP
(RM-8)
QA
1
14
QB
QA
2
13
QB
GND
3
AD8612
12
GND
LEA
4
TOP VIEW
(Not to Scale)
11
LEB
V–
5
10
V+
INA–
6
9
INB–
INA+
7
8
INB+
06010-003
High speed timing
Clock recovery and clock distribution
Line receivers
Digital communications
Phase detectors
High speed sampling
Read channel detection
PCMCIA cards
Zero-crossing detector
High speed analog-to-digital converter (ADC)
Upgrade for LT1394 and LT1016 designs
06010-002
Figure 1. 8-Lead Narrow Body SOIC
(R-8)
APPLICATIONS
Figure 3. 14-Lead TSSOP
(RU-14)
GENERAL DESCRIPTION
The AD8611/AD8612 are single and dual 4 ns comparators
with latch function and complementary output. The latch is not
functional if VCC is less than 4.3 V.
The AD8611 has the same pinout as the LT1016 and LT1394,
with lower supply current and a wider common-mode input
range, which includes the negative supply rail.
Fast 4 ns propagation delay makes the AD8611/AD8612 good
choices for timing circuits and line receivers. Propagation delays
for rising and falling signals are closely matched and tracked over
temperature. This matched delay makes the AD8611/AD8612
good choices for clock recovery because the duty cycle of the
output matches the duty cycle of the input.
The AD8611/AD8612 are specified over the industrial temperature range (−40°C to +85°C). The AD8611 is available in both
8-lead MSOP and narrow 8-lead SOIC surface-mount packages.
The AD8612 is available in a 14-lead TSSOP surface-mount
package.
Rev. B
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AD8611/AD8612
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Optimizing High Speed Performance ..................................... 10
Applications ....................................................................................... 1
Upgrading the LT1394 and LT1016 ......................................... 10
Pin Configurations ........................................................................... 1
Maximum Input Frequency and Overdrive............................ 10
General Description ......................................................................... 1
Output Loading Considerations............................................... 10
Revision History ............................................................................... 2
Using the Latch to Maintain a Constant Output.................... 11
Specifications..................................................................................... 3
Input Stage and Bias Currents .................................................. 11
Absolute Maximum Ratings............................................................ 5
Using Hysteresis ......................................................................... 11
Thermal Resistance ...................................................................... 5
Clock Timing Recovery ............................................................. 12
ESD Caution .................................................................................. 5
A 5 V, High Speed Window Comparator ................................ 12
Pin Configurations and Function Descriptions ........................... 6
Outline Dimensions ....................................................................... 16
Typical Performance Characteristics ............................................. 7
Ordering Guide .......................................................................... 17
Applications Information .............................................................. 10
REVISION HISTORY
12/2016—Rev. A to Rev. B
Changes to Input Voltage Parameter, Table 3 ............................... 5
Added Input Current Parameter, Table 3 ...................................... 5
Deleted Endnote 1, Table 3 .............................................................. 5
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 18
8/2006—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Added No Latch if VCC < 4.3 V ......................................... Universal
Changes to Pin Names ....................................................... Universal
Added Pin Configurations and Function Descriptions Page ..... 6
Changes to Table 8 .......................................................................... 12
Changes to Figure 26 ...................................................................... 12
Changes to Ordering Guide .......................................................... 17
4/2000—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet
AD8611/AD8612
SPECIFICATIONS
V+ = 5.0 V, V− = VGND = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Test Conditions/Comments
Min
VOS
Typ
Max
Unit
1
7
8
mV
mV
μV/°C
μA
μA
μA
V
dB
V/V
pF
−40°C ≤ TA ≤ +85°C
Offset Voltage Drift
Input Bias Current
Input Offset Current
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
LATCH ENABLE INPUT
Logic 1 Voltage Threshold
Logic 0 Voltage Threshold
Logic 1 Current
Logic 0 Current
Latch Enable
Pulse Width
Setup Time
Hold Time
DIGITAL OUTPUTS
Logic 1 Voltage
Logic 1 Voltage
Logic 0 Voltage
DYNAMIC PERFORMANCE
Input Frequency
Propagation Delay
Propagation Delay
Differential Propagation Delay
(Rising Propagation Delay vs.
Falling Propagation Delay)
Rise Time
Fall Time
POWER SUPPLY
Power Supply Rejection Ratio
V+ Supply Current 2
ΔVOS/ΔT
IB
IB
IOS
VCM
CMRR
AVO
CIN
VCM = 0 V
−40°C ≤ TA ≤ +85°C
VCM = 0 V
0 V ≤ VCM ≤ 3.0 V
RL = 10 kΩ
2
0.0
55
±4
3.0
85
3000
3.0
VCC > 4.3 V
VCC > 4.3 V
VCC > 4.3 V, VLH = 3.0 V
VCC > 4.3 V, VLL = 0.3 V
tPW(E)
tS
tH
VCC > 4.3 V
VCC > 4.3 V
VCC > 4.3 V
VOH
VOH
VOL
IOH = 50 μA, ΔVIN > 250 mV
IOH = 3.2 mA, ΔVIN > 250 mV
IOL = 3.2 mA, ΔVIN > 250 mV
fMAX
tP
tP
400 mV p-p sine wave
200 mV step with 100 mV overdrive 1
−40°C ≤ TA ≤ +85°C
100 mV step with 5 mV overdrive
100
4.0
5
5
ΔtP
100 mV step with 100 mV overdrive1
0.5
20% to 80%
80% to 20%
2.5
1.1
PSRR
I+
Ground Supply Current2
IGND
V− Supply Current2
I−
4.5 V ≤ V+ ≤ 5.5 V
−40°C ≤ TA ≤ +85°C
VO = 0 V, RL = ∞
−40°C ≤ TA ≤ +85°C
2.0
4
–4
–4.5
VIH
VIL
IIH
IIL
–1.0
–5
3.0
2.4
55
1.65
1.60
–0.3
–2.7
Guaranteed by design.
Per comparator.
Rev. B | Page 3 of 20
0.8
V
V
μA
μA
3
0.5
0.5
ns
ns
ns
3.35
3.4
0.25
V
V
V
73
5.7
3.5
2.2
−40°C ≤ TA ≤ +85°C
1
–6
–7
0.4
5.5
2.0
MHz
ns
ns
ns
ns
ns
ns
10
10
7
7
4
5
dB
mA
mA
mA
mA
mA
AD8611/AD8612
Data Sheet
V+ = 3.0 V, V− = VGND = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
LATCH ENABLE INPUT
POWER SUPPLY
Power Supply Rejection Ratio
Supply Currents
V+ Supply Current 2
Symbol
VOS
IB
IB
VCM
CMRR
Test Conditions/Comments
Min
VCM = 0 V
−40°C ≤ TA ≤ +85°C
−6
−7
0
55
0 V ≤ VCM ≤ 1.0 V
Typ
Max
Unit
1
−4.0
−4.5
7
mV
μA
μA
V
dB
1.0
VOH
VOL
IOH = −3.2 mA, VIN > 250 mV
IOL = +3.2 mA, VIN > 250 mV
Not functional if VCC < 4.3 V
1.2 1
PSRR
46
I+
2.7 V ≤ V+ ≤ 6 V
VO = 0 V, RL = ∞
−40°C ≤ TA ≤ +85°C
Ground Supply Current2
IGND
−40°C ≤ TA ≤ +85°C
2.5
V– Supply Current2
I−
0.3
4.5
2
−40°C ≤ TA ≤ +85°C
DYNAMIC PERFORMANCE
Propagation Delay
tP
100 mV step with 20 mV overdrive 3
Output high voltage without pull-up resistor. It can be useful to have a pull-up resistor to V+ for 3 V operation.
Per comparator.
3
Guaranteed by design.
1
2
Rev. B | Page 4 of 20
4.5
V
V
dB
6.5
10
3.5
5.5
3.5
4.8
mA
mA
mA
mA
mA
mA
6.5
ns
Data Sheet
AD8611/AD8612
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Total Analog Supply Voltage
Digital Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration to GND
Input Current
Storage Temperature Range
R, RU, RM Packages
Operating Temperature Range
Junction Temperature Range
R, RU, RM Packages
Lead Temperature Range (Soldering, 10 sec)
Rating
7.0 V
7.0 V
VCC +0.3 V to
VEE −0.3 V
±5 V
Indefinite
±5 mA
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Table 4.
Package Type
8-Lead SOIC (R)
8-Lead MSOP (RM)
14-Lead TSSOP (RU)
θJA1
158
240
240
θJC
43
43
43
Unit
°C/W
°C/W
°C/W
θJA is specified for the worst-case conditions, that is, a device in socket for
P-DIP and a device soldered in circuit board for SOIC and TSSOP.
1
ESD CAUTION
Rev. B | Page 5 of 20
AD8611/AD8612
Data Sheet
V+ 1
IN+ 2
AD8611
8
QA
7
QA
IN– 3
6 GND
TOP VIEW
V– 4 (Not to Scale) 5 LATCH
06010-001
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V+ 1
IN+ 2
AD8611
IN– 3
TOP VIEW
(Not to Scale)
V– 4
8
QA
7
QA
6
GND
5
LATCH
06010-002
Figure 4. 8-Lead Narrow Body SOIC Pin Configuration
Figure 5. 8-Lead MSOP Pin Configuration
QA
1
14 QB
QA
2
13 QB
GND
3
AD8612
12 GND
LEA
4
TOP VIEW
(Not to Scale)
11 LEB
V–
5
INA–
6
9
INB–
INA+
7
8
INB+
06010-003
10 V+
Figure 6. 14-Lead TSSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
SOIC and
MSOP
TSSOP
1
10
2
3
4
5
5
6
3, 12
7
1
8
2
14
13
4
11
7
6
8
9
Mnemonic
V+
IN+
IN−
V−
LATCH
GND
QA
QA
QB
QB
LEA
LEB
INA+
INA−
INB+
INB−
Description
Positive Supply Terminal.
Noninverting Analog Input of the Differential Input Stage.
Inverting Analog Input of the Differential Input Stage.
Negative Supply Terminal.
Latch Enable Input.
Negative Logic Supply
One of Two Complementary Output for Channel A.
One of Two Complementary Output for Channel A.
One of Two Complementary Output for Channel B.
One of Two Complementary Output for Channel B.
Channel A Latch Enable.
Channel B Latch Enable.
Noninverting Analog Input of the Differential Input Stage for Channel A.
Inverting Analog Input of the Differential Input Stage for Channel A.
Noninverting Analog Input of the Differential Input Stage for Channel B.
Inverting Analog Input of the Differential Input Stage for Channel B.
Rev. B | Page 6 of 20
Data Sheet
AD8611/AD8612
TYPICAL PERFORMANCE CHARACTERISTICS
8
18
V+ = 5V
OVERDRIVE > 10mV
7
V+ = 5V
TA = 25°C
OVERDRIVE = 5mV
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
14
6
5
PD–
4
PD+
3
2
PD–
12
PD+
8
6
2
0
–25
25
50
TEMPERATURE (°C)
75
100
0
06010-004
0
–50
0
PD+
PROPAGATION DELAY (ns)
12
10
PD+
8
6
4
6
5
PD–
4
3
2
5
10
15
OVERDRIVE (mV)
20
25
0
06010-005
0
2
3
4
SUPPLY VOLTAGE (V)
5
6
06010-008
1
2
Figure 11. Propagation Delay vs. Supply Voltage
Figure 8. Propagation Delay vs. Overdrive
35
8
V+ = 5V
TA = 25°C
7 OVERDRIVE > 10mV
TA = 25°C
STEP = 100mV
OVERDRIVE = 50mV
30
PROPAGATION DELAY (ns)
PD–
6
PD+
5
4
3
2
25
PD+
20
15
10
1
5
0
0
0
20
40
CAPACITANCE (pF)
60
80
06010-006
PD–
2
4
5
3
COMMON-MODE VOLTAGE (V)
Figure 12. Propagation Delay vs. Common-Mode Voltage
Figure 9. Propagation Delay vs. Load Capacitance
Rev. B | Page 7 of 20
6
06010-009
PROPAGATION DELAY (ns)
PD–
PROPAGATION DELAY (ns)
TA = 25°C
STEP = 100mV
OVERDRIVE > 10mV
7
14
0
2.5
8
V+ = 5V
TA = 25°C
16
2.0
Figure 10. Propagation Delay vs. Source Resistance
Figure 7. Propagation Delay vs. Temperature
18
1.0
1.5
SOURCE RESISTANCE (kΩ)
0.5
06010-007
1
AD8611/AD8612
Data Sheet
0.40
1.2
VS = 3V
+25°C
0.35
+85°C
1.0
–40°C
LOAD CURRENT (V)
0.30
VOS (mV)
0.8
VS = 5V
0.6
0.4
0.25
–40°C
0.20
+85°C
0.15
+25°C
0.10
0.2
–40
–20
0
20
40
TEMPERATURE (°C)
60
100
80
0
06010-010
0
–60
4.0
40
V+ = 5V
TA = 25°C
3.8
OUTPUT HIGH VOLTAGE (V)
35
30
25
20
15
10
3.6
+85°C
3.4
+25°C
3.2
–40°C
3.0
2.8
2.6
5
10
INPUT FREQUENCY (MHz)
100
2.4
0
06010-011
1
2
4
6
8
LOAD CURRENT (mA)
10
12
06010-014
ISY+ (mA)
12
Figure 16. Output Low Voltage vs. Load Current (Sinking) Over Temperature
Figure 13. Offset Voltage vs. Temperature
0
10
8
6
4
SINK CURRENT (mA)
2
0
06010-013
0.05
Figure 17. Output High Voltage vs. Load Current (Sourcing) Over
Temperature
Figure 14. Supply Current vs. Input Frequency
2.0
8
V+ = 5V
1.8
7
1.6
6
VS = 5V
5
ISY (mA)
1.2
1.0
0.8
SETUP TIME
4
VS = 3V
3
0.6
2
0.4
HOLD TIME
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
0
–60
–40
–20
0
20
40
TEMPERATURE (°C)
60
80
Figure 18. Supply Current vs. Temperature
Figure 15. Latch Setup and Hold Time vs. Temperature
Rev. B | Page 8 of 20
100
06010-015
1
0.2
06010-012
TIMING (ns)
1.4
AD8611/AD8612
0
V+ = 5V
TA = 25°C
–0.5
–1.0
VIN
VOLTAGE
IGND (mA)
–1.5
–2.0
VS = 3V
–2.5
0V
VOUT
–3.0
VS = 5V
–3.5
50
0
TEMPERATURE (°C)
50
100
06010-016
–4.5
TIME (2ns/DIV)
Figure 19. IGND vs. Temperature
06010-019
–VIN TRACE @ 10mV/DIV
VOUT TRACE @ 1V/DIV
–4.0
Figure 22. Falling Edge Response
0
V+ = 5V
TA = 25°C
VOUT
–0.5
VOLTAGE
ISY (mA)
–1.0
VS = 3V
–1.5
–2.0
0V
VIN
VS = 5V
–2.5
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 20. ISY− vs. Temperature
Figure 23. Response to a 50 MHz, 100 mV Input Sine Wave
VOUT
0V
VIN
–VIN TRACE @ 10mV/DIV
VOUT TRACE @ 1V/DIV
TIME (2ns/DIV)
06010-018
VOLTAGE
V+ = 5V
TA = 25°C
TIME (4ns/DIV)
Figure 21. Rising Edge Response
Rev. A | Page 9 of 20
06010-020
–3.0
–60
06010-017
–VIN TRACE @ 10mV/DIV
VOUT TRACE @ 1V/DIV
AD8611/AD8612
Data Sheet
APPLICATIONS INFORMATION
OPTIMIZING HIGH SPEED PERFORMANCE
As with any high speed comparator or amplifier, proper design
and layout of the AD8611/AD8612 must ensure optimal
performance. Excess stray capacitance or improper grounding
can limit the maximum performance of high speed circuitry.
Minimizing resistance from the source to the comparator input
is necessary to minimize the propagation delay of the circuit.
Source resistance in combination with the equivalent input
capacitance of the AD8611/AD8612 creates an R-C filter that
could cause a lagged voltage rise at the input to the comparator.
The input capacitance of the AD8611/AD8612 in combination
with stray capacitance from an input pin to ground results in
several picofarads of equivalent capacitance. Using a surface-mount
package and a minimum of input trace length, this capacitance
is typically around 3 pF to 5 pF. A combination of 3 kΩ source
resistance and 3 pF of input capacitance yields a time constant
of 9 ns, which is slower than the 4 ns propagation delay of the
AD8611/AD8612. Source impedances must be less than 1 kΩ
for best performance.
Another important consideration is the proper use of powersupply-bypass capacitors around the comparator. A 1 μF bypass
capacitor must be placed within 0.5 inches of the device between
each power supply pin and ground. Another 10 nF ceramic
capacitor must be placed as close as possible to the device in
parallel with the 1 μF bypass capacitor. The 1 μF capacitor reduces
any potential voltage ripples from the power supply, and the 10 nF
capacitor acts as a charge reservoir for the comparator during
high frequency switching.
A continuous ground plane on the PC board is also recommended
to maximize circuit performance. A ground plane can be created
by using a continuous conductive plane over the surface of the
circuit board, only allowing breaks in the plane for necessary
traces and vias. The ground plane provides a low inductive current
return path for the power supply, thus eliminating any potential
differences at various ground points throughout the circuit board
caused from ground bounce. A proper ground plane can also
minimize the effects of stray capacitance on the circuit board.
The LT1016 has an input voltage range from 1.25 V above the
negative supply to 1.5 V below the positive supply. The AD8611
input voltage range extends down to the negative supply voltage
to within 2 V of V+. If the input common-mode voltage is
exceeded, input signals must be shifted or attenuated to bring
them into range, keeping in mind the note about source resistance
in the Optimizing High Speed Performance section.
For example, an AD8611 powered from a 5 V single supply has
its noninverting input connected to a 1 V peak-to-peak, high
frequency signal centered around 2.3 V and its inverting input
connected to a fixed 2.5 V reference voltage. The worst-case
input common-mode voltage to the AD8611 is 2.65 V. This is
well below the 3.0 V input common-mode voltage range to the
comparator. Note that signals much greater than 3.0 V result in
increased input currents and can cause the comparator to
operate more slowly.
The input bias current to the AD8611 is 7 μA maximum over
temperature (−40°C to +85°C). This is identical to the maximum
input bias current for the LT1394, and half of the maximum IB
for the LT1016. Input bias currents to the AD8611 and LT1394
flow out from the comparator inputs, as opposed to the LT1016
whose input bias current flows into its inputs. Using low value
resistors around the comparator and low impedance sources
will minimize any potential voltage shifts due to bias currents.
The AD8611 is able to swing within 200 mV of ground and
within 1.5 V of positive supply voltage. This is slightly more
output voltage swing than the LT1016. The AD8611 also uses
less current than the LT1016—5 mA as compared to 25 mA of
typical supply current.
The AD8611 has a typical propagation delay of 4 ns, compared
with the LT1394 and LT1016, whose propagation delays are
typically 7 ns and 10 ns, respectively.
MAXIMUM INPUT FREQUENCY AND OVERDRIVE
UPGRADING THE LT1394 AND LT1016
The AD8611 can accurately compare input signals up to 100 MHz
with less than 10 mV of overdrive. The level of overdrive required
increases with ambient temperature, with up to 50 mV of
overdrive recommended for a 100 MHz input signal and an
ambient temperature of +85°C.
The AD8611 single comparator is pin-for-pin compatible with
the LT1394 and LT1016 and offers an improvement in propagation
delay over both comparators. These devices can easily be replaced
with the higher performance AD8611; however, there are differences, so it is useful to ensure that the system still operates properly.
It is not recommend to use an input signal with a fundamental
frequency above 100 MHz because the AD8611 could draw up
to 20 mA of supply current and the outputs may not settle to a
definite state. The device returns to its specified performance
once the fundamental input frequency returns to below 100 MHz.
The five major differences between the AD8611 and the LT1016
include input voltage range, input bias currents, propagation delay,
output voltage swing, and power consumption. Input commonmode voltage is found by taking the average of the two voltages
at the inputs to the comparator.
OUTPUT LOADING CONSIDERATIONS
The AD8611 can deliver up to 10 mA of output current without
increasing its propagation delay. The outputs of the device must
not be connected to more than 40 TTL input logic gates or drive
less than 400 Ω of load resistance.
Rev. B | Page 10 of 20
Data Sheet
AD8611/AD8612
Table 6. Maximum Output Voltage vs. Resistive Load
Output Load to Ground
300 Ω
500 Ω
1 kΩ
10 kΩ
>20 kΩ
V+ − VOUT, HI (typ)
1.5 V
1.3 V
1.2 V
1.1 V
1.0 V
Connecting a 500 Ω to 2 kΩ pull-up resistor to V+ on the
output helps increase the output voltage so that it is closer to the
positive rail; in this configuration, however, the output voltage
will not reach its maximum until 20 ns to 50 ns after the output
voltage switches. This is due to the R-C time constant between
the pull-up resistor and the output and load capacitances. The
output pull-up resistor cannot improve propagation delay.
The AD8611 is stable with all values of capacitive load; however,
loading an output with greater than 30 pF increases the
propagation delay of that channel. Capacitive loads greater than
500 pF also create some ringing on the output wave. Table 7 shows
propagation delay vs. several values of load capacitance. The
loading on one output of the AD8611 does not affect the
propagation delay of the other output.
Table 7. Propagation Delay vs. Capacitive Load
CL (pF)
VHI
VOUT
5V
5V
2V/DIV
1kΩ
5V
R1
VHI
6
1
A1
7
R2
3
20mV/DIV
4
VIN
VOUT
10
1kΩ
Q1
AD8612
Q2
500Ω
VIN
Figure 25. Using the AD8611 to Recover a Noisy Clock Signal
AD8612
9
R3
R4
VLO
A2
8
5
14
1kΩ
12
11
500Ω
NOTES
1. Q1, Q2 = 2N3960.
2. PINS 2 AND 13 ARE NO CONNECTS.
Figure 26. A High Speed Window Comparator
Rev. B | Page 12 of 20
06010-023
TIME (10ns/DIV)
06010-022
5V
Data Sheet
AD8611/AD8612
SPICE Model
* AD8611 SPICE Macro-Model Typical Values
* 1/2000, Ver. 1.0
* TAM/ADSC
*
* Node assignments
*
non-inverting input
*
|
inverting input
*
|
|
positive supply
*
|
|
|
negative supply
*
|
|
|
|
Latch
*
|
|
|
|
|
DGND
*
|
|
|
|
|
|
Q
*
|
|
|
|
|
|
|
QNOT
*
|
|
|
|
|
|
|
|
.SUBCKT AD8611
1
2
99
50
80
51
45
65
Q1
4
3
5
PIX
Q2
6
2
5
PIX
IBIAS
99
5
800E-6
RC1
4
50
1E3
RC2
6
50
1E3
CL1
4
6
3E-13
CIN
1
2
3E-12
VCM1
99
7
DC
D1
5
7
DX
EOS
3
1
POLY(1)
*
* INPUT STAGE
*
*
1.9
(31,98)
1E-3
1
(99,0)
(50,0)
0
*
* Reference Voltages
*
EREF
98
0
POLY(2)
RREF
98
0
100E3
*
* CMRR = 66dB, ZERO AT 1 kHz
Rev. B | Page 13 of 20
0.5
0.5
AD8611/AD8612
Data Sheet
*
ECM1
30
98
POLY(2)
RCM1
30
31
10E3
RCM2
31
98
5
CCM1
30
31
15.9E-9
(1,98)
(2,98)
0
0.5
*
* Latch Section
*
RX
80
51
100E3
E1
10
98
(4,6)
1
S1
10
11
(80,51)
SLATCH1
R2
11
12
1
C3
12
98
5
4E-12
E2
13
98
(12,98)
1
R3
12
13
500
*
* Power Supply Section
*
GSY1
99
52
POLY(1)
(99,50)
4E-3
-2
6E-4
GSY2
52
50
POLY(1)
(99,50)
3
7E-3
-.6E-3
RSY
52
51
10
*
* Gain Stage Av = 250 fp=100 MHz
*
G2
98
20
(12,98)
0.25
R1
20
98
1000
C1
20
98
10E-13
E3
97
0
(99,0)
1
E4
52
0
(51,0)
1
V1
97
21
DC
0.8
V2
22
52
DC
0.8
D2
20
21
DX
D3
22
20
DX
*
* Q Output
*
Q3
99
41
46
NOX
Rev. B | Page 14 of 20
0.5
Data Sheet
AD8611/AD8612
Q4
47
42
51
NOX
RB1
43
41
2000
RB2
40
42
2000
CB1
99
41
0.5E-12
CB2
42
51
1E-12
RO1
46
44
1
D4
44
45
DX
RO2
47
45
500
EO1
97
43
(20,51)
1
EO2
40
51
(20,51)
1
*
* Q NOT Output
*
Q5
99
61
66
NOX
Q6
67
62
51
NOX
RB3
63
61
2000
RB4
60
62
2000
CB3
99
61
0
CB4
62
51
1E-12
RO3
66
64
1
D5
64
65
DX
RO4
67
65
500
EO3
63
51
(20,51)
1
EO4
97
60
(20,51)
1
5E-12
*
* MODELS
*
.MODEL PIX PNP(BF=100,IS=1E-16)
.MODEL NOX NPN(BF=100,VAF=130,IS=1E-14)
.MODEL DX D(IS=1E-14)
.MODEL SLATCH1 VSWITCH(ROFF=1E6,RON=500,
+VOFF=2.1,VON=1.4)
.ENDS AD8611
Rev. B | Page 15 of 20
AD8611/AD8612
Data Sheet
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80
5.15
4.90
4.65
5
1
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.23
0.09
6°
0°
0.40
0.25
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 27. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
5
4.00 (0.1574)
3.80 (0.1497) 1
4
6.20 (0.2440)
5.80 (0.2284)
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.50 (0.0196)
× 45°
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 28. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
5.10
5.00
4.90
14
8
4.50
4.40
4.30
6.40
BSC
1
7
PIN 1
1.05
1.00
0.80
0.65
BSC
1.20
MAX
0.15
0.05
0.30
0.19
0.20
0.09
SEATING
COPLANARITY
PLANE
0.10
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 29. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. B | Page 16 of 20
0.75
0.60
0.45
Data Sheet
AD8611/AD8612
ORDERING GUIDE
Model 1
AD8611ARMZ-REEL
AD8611ARMZ-R2
AD8611AR
AD8611ARZ
AD8611ARZ-REEL
AD8611ARZ-REEL7
AD8612ARUZ
AD8612ARUZ-REEL
1
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
Z = RoHS Compliant Part.
Rev. B | Page 17 of 20
Package Option
RM-8
RM-8
R-8
R-8
R-8
R-8
RU-14
RU-14
Branding
G1A
G1A
AD8611/AD8612
Data Sheet
NOTES
Rev. B | Page 18 of 20
Data Sheet
AD8611/AD8612
NOTES
Rev. B | Page 19 of 20
AD8611/AD8612
Data Sheet
NOTES
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registered trademarks are the property of their respective owners.
D06010-0-12/16(B)
Rev. B | Page 20 of 20
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