AD8614

Single and Quad 18 V Operational Amplifiers AD8614/AD8644 FEATURES Unity-gain bandwidth: 5.5 MHz Low voltage offset: 1.0 mV Slew rate: 7.5 V/μs Single-supply operation: 5 V to 18 V High output current: 70 mA Low supply current: 800 μA/amplifier Stable with large capacitive loads Rail-to-rail inputs and outputs PIN CONFIGURATIONS OUT A 1 5 V+ AD8614 V– 2 +IN 3 TOP VIEW (Not to Scale) 4 –IN Figure 1. 5-Lead SOT-23 (RJ-5) OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 –IN B 6 OUT B 7 TOP VIEW (Not to Scale) 14 OUT D 13 –IN D APPLICATIONS LCD gamma and VCOM drivers Modems Portable instrumentation Direct access arrangement AD8644 12 +IN D 11 V– 10 +IN C 9 8 –IN C OUT C 06485-002 06485-003 GENERAL DESCRIPTION The AD8614 (single) and AD8644 (quad) are single-supply, 5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD monitor applications. They are processed using the Analog Devices, Inc. high voltage, extra fast complementary bipolar (HV XFCB) process. This proprietary process includes trench-isolated transistors that lower internal parasitic capacitance, which improves gain bandwidth, phase margin, and capacitive load drive. The low supply current of 800 μA (typical) per amplifier is critical for portable or densely packed designs. In addition, the rail-to-rail output swing provides greater dynamic range and control than standard video amplifiers provide. These products operate from supplies of 5 V to as high as 18 V. The unique combination of an output drive of 70 mA, high slew rates, and high capacitive drive capability makes the AD8614/AD8644 an ideal choice for LCD applications. The AD8614 and AD8644 are specified over the temperature range of –20°C to +85°C. They are available in 5-lead SOT-23, 14-lead TSSOP, and 14-lead SOIC surface-mount packages in tape and reel. Figure 2. 14-Lead TSSOP (RU-14) OUT A 1 –IN A 2 +IN A 3 V+ 4 14 13 OUT D –IN D +IN D TOP VIEW 11 V– (Not to Scale) 10 +IN C +IN B 5 12 AD8644 –IN B 6 OUT B 7 9 8 –IN C OUT C Figure 3. 14-Lead Narrow Body SOIC (R-14) Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1999–2007 Analog Devices, Inc. All rights reserved. 06485-001 AD8614/AD8644 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Pin Configurations ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution.................................................................................. 4 Typical Performance Characteristics ............................................. 5 Theory of Operation ........................................................................ 9 Output Short-Circuit Protection.................................................9 Input Overvoltage Protection ................................................... 10 Output Phase Reversal............................................................... 10 Power Dissipation....................................................................... 10 Unused Amplifiers ..................................................................... 10 Capacitive Load Drive ............................................................... 11 Direct Access Arrangement ...................................................... 11 A One-Chip Headphone/Microphone Preamplifier Solution........................................................................................ 11 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 14 REVISION HISTORY 9/07—Rev. A to Rev B Change to Current Noise Density in Table 1 ................................ 3 12/06—Rev. 0 to Rev. A Updated Format..................................................................Universal Deleted SPICE Model Availability Section.................................. 12 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 14 10/99—Revision 0: Initial Version Rev. B | Page 2 of 16 AD8614/AD8644 SPECIFICATIONS ELECTRICAL CHARACTERISTICS 5 V ≤ VS ≤ 18 V, VCM = VS/2, TA = 25°C, unless otherwise noted. 1 Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Voltage Gain OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin Settling Time NOISE PERFORMANCE Voltage Noise Density Current Noise Density 1 Symbol VOS Conditions Min Typ 1.0 Max 2.5 3 400 500 100 200 VS Unit mV mV nA nA nA nA V dB V/mV V mV mA mA dB mA mA V/μs MHz Degrees μs nV/√Hz nV/√Hz pA/√Hz −20°C ≤ TA ≤ +85°C IB −20°C ≤ TA ≤ +85°C IOS −20°C ≤ TA ≤ +85°C CMRR AVO VOH VOL ISC VCM = 0 V to VS VOUT = 0.5 V to VS – 0.5 V, RL = 10 kΩ ILOAD = 10 mA ILOAD = 10 mA −20°C ≤ TA ≤ +85°C PSRR ISY VS = ±2.25 V to ±9.25 V −20°C ≤ TA ≤ +85°C SR GBP Φo tS en en in CL = 200 pF 7.5 5.5 65 3 12 11 1 0 60 10 VS − 0.15 35 30 80 65 70 75 150 5 80 150 110 0.8 1.1 1.5 0.01%, 10 V step f = 1 kHz f = 10 kHz f = 10 kHz All typical values are for VS = 18 V. Rev. B | Page 3 of 16 AD8614/AD8644 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Input Voltage Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 60 sec) Rating 20 V GND to VS −65°C to +150°C −20°C to +85°C −65°C to +150°C 300°C THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type 5-Lead SOT-23 (RJ) 14-Lead TSSOP (RU) 14-Lead SOIC (R) θJA 230 180 120 θJC 140 35 56 Unit °C/W °C/W °C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. B | Page 4 of 16 AD8614/AD8644 TYPICAL PERFORMANCE CHARACTERISTICS 50 45 SMALL SIGNAL OVERSHOOT (%) VS = 18V RL = 2kΩ TA = 25°C 7.5 6.5 5.5 VOLTAGE (1V/DIV) 40 35 30 25 20 15 10 06485-004 VS = 5V RL = 2kΩ CL = 200pF AV = 1 TA = 25°C 4.5 3.5 2.5 1.5 0.5 –0.5 –1.5 –2.5 TIME (1µs/DIV) 06485-007 +OS –OS 5 0 10 100 1k 10k CAPACITANCE (pF) Figure 4. Small Signal Overshoot vs. Load Capacitance Figure 7. Large Signal Transient Response, VS = 5 V 12 29 25 OUTPUT SWING FROM 0 TO ±V 8 0.1% 4 0.01% 21 VOLTAGE (4V/DIV) VS = 18V RL = 2kΩ CL = 200pF AV = 1 TA = 25°C 17 13 9 5 1 –3 0 –4 0.1% 0.01% –8 06485-005 –7 –11 TIME (1µs/DIV) –12 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 SETTLING TIME (µs) Figure 5. Output Swing vs. Settling Time Figure 8. Large Signal Transient Response, VS = 18 V 80 60 40 5V ≤ VS ≤ 18V RL = 1MΩ CL = 40pF TA = 25°C 45 GAIN (dB) 20 0 135 180 VOLTAGE (50mV/DIV) 90 PHASE SHIFT (Degrees) VS 2 VS = 5V ≤ VS ≤ 18V RL = 2kΩ CL = 200pF AV = 1 TA = 25°C 06485-009 06485-006 1k 10k 100k 1M 10M 100M TIME (500ns/DIV) FREQUENCY (Hz) Figure 6. Open-Loop Gain and Phase Shift vs. Frequency Figure 9. Small Signal Transient Response Rev. B | Page 5 of 16 06485-008 AD8614/AD8644 10k 5V ≤ VS ≤ 18V TA = 25°C 1k 400 VS = ±9V 300 INPUT BIAS CURRENT (nA) 06485-010 ΔOUTPUT VOLTAGE (mV) 200 100 0 –100 –200 06485-013 100 SINK 10 SOURCE –300 –400 –9 1 0.001 0.01 0.1 1 10 100 –7 –5 –3 –1 0 1 3 5 7 9 LOAD CURRENT (mA) COMMON-MODE VOLTAGE (V) Figure 10. Output Voltage to Supply Rail vs. Load Current 1000 900 TA = 25°C Figure 13. Input Bias Current vs. Common-Mode Voltage, VS = ±9 V 180 160 140 2.5V ≤ VS ≤ 9V TA = 25°C SUPPLY CURRENT/AMPLIFIER (µA) 800 700 600 500 400 300 200 06485-011 QUANTITY (Amplifiers) 120 100 80 60 40 06485-014 100 0 0 1 2 3 4 5 6 7 8 9 20 0 10 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 SUPPLY VOLTAGE (±V) INPUT OFFSET VOLTAGE (mV) Figure 11. Supply Current vs. Supply Voltage 400 VS = ±2.5V 300 Figure 14. Input Offset Voltage Distribution 1.0 SUPPLY CURRENT/AMPLIFIER (mA) INPUT BIAS CURRENT (nA) 0.9 200 100 0 –100 –200 06485-012 VS = 18V 0.8 0.7 VS = 5V 0.6 06485-015 –300 –400 –2.5 –1.5 –0.5 0.5 1.5 2.5 0.5 –35 –15 5 25 45 65 85 COMMON-MODE VOLTAGE (V) TEMPERATURE (°C) Figure 12. Input Bias Current vs. Common-Mode Voltage, VS = ±2.5 V Figure 15. Supply Current vs. Temperature Rev. B | Page 6 of 16 AD8614/AD8644 6 5V ≤ VS ≤ 18V TA = 25°C 5 OUTPUT SWING (V p-p) 4 3 GAIN (dB) VS = 5V AVCL = 1 RL = 2kΩ TA = 25°C 40 20 0 2 0 100 06485-016 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 16. Maximum Output Swing vs. Frequency, VS = 5 V 20 18 16 140 120 100 80 60 40 20 0 100 Figure 19. Closed-Loop Gain vs. Frequency 14 12 10 8 6 4 06485-017 COMMON-MODE REJECTION (dB) OUTPUT SWING (V p-p) VS = 18V AVCL = 1 RL = 2kΩ TA = 25°C 5V ≤ VS ≤ 18V TA = 25°C 2 0 100 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Maximum Output Swing vs. Frequency, VS = 18 V 300 5V ≤ VS ≤ 18V TA = 25°C 240 100 Figure 20. Common-Mode Rejection vs. Frequency VS = 18V TA = 25°C POWER SUPPLY REJECTION (dB) 80 IMPEDANCE (Ω) 180 60 120 40 PSRR+ PSRR– 60 AV = 10 AV = 100 0 1k 10k 100k FREQUENCY (Hz) 1M AV = 1 06485-018 20 06485-021 10M 0 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 18. Closed-Loop Output Impedance vs. Frequency Figure 21. Power Supply Rejection vs. Frequency Rev. B | Page 7 of 16 06485-020 06485-019 1 AD8614/AD8644 9 8 7 SR+ 100 VS = 18V TA = 25°C 6 5 4 3 2 1 0 AV = 1 RL = 2kΩ CL = 200pF TA = 25°C 0 2 4 6 8 10 12 14 SR– VOLTAGE NOISE DENSITY (nV/ Hz) 06485-022 SLEW RATE (V/µs) 10 16 18 20 1 10 100 FREQUENCY (Hz) 1k 10k SUPPLY VOLTAGE (V) Figure 22. Slew Rate vs. Supply Voltage Figure 24. Voltage Noise Density vs. Frequency, VS = 18 V 100 VS = 5V TA = 25°C VOLTAGE NOISE DENSITY (nV/ Hz) 10 1 10 100 FREQUENCY (Hz) 1k 10k Figure 23. Voltage Noise Density vs. Frequency, VS = 5 V 06485-023 Rev. B | Page 8 of 16 06485-024 AD8614/AD8644 THEORY OF OPERATION The AD8614/AD8644 are processed using Analog Devices high voltage, extra fast complementary bipolar (HV XFCB) process. This process includes trench-isolated transistors that lower parasitic capacitance. Figure 26 shows a simplified schematic of the AD8614/AD8644. The input stage is rail-to-rail, consisting of two complementary differential pairs, one NPN pair and one PNP pair. The input stage is protected against avalanche breakdown by two back-toback diodes. Each input has a 1.5 kΩ resistor that limits input current during overvoltage events and furnishes phase reversal protection if the inputs are exceeded. The two differential pairs are connected to a double-folded cascode. This is the stage in the amplifier with the most gain. The double-folded cascode differentially feeds the output stage circuitry. Two complementary common emitter transistors are used as the output stage. This allows the output to swing to within 125 mV from each rail with a 10 mA load. The gain of the output stage, and thus the open-loop gain of the op amp, depends on the load resistance. The AD8614/AD8644 have no built-in short-circuit protection. The short-circuit limit is a function of high current roll-off of the output stage transistors and the voltage drop over the resistor shown on the schematic at the output stage. The voltage over this resistor is clamped to one diode during short-circuit voltage events. VCC OUTPUT SHORT-CIRCUIT PROTECTION To achieve a wide bandwidth and high slew rate, the output of the AD8614/AD8644 is not short-circuit protected. Shorting the output directly to ground or to a supply rail can destroy the device. The typical maximum safe output current is 70 mA. In applications where some output current protection is needed, but not at the expense of reduced output voltage headroom, a low value resistor in series with the output can be used. This is shown in Figure 25. The resistor is connected within the feedback loop of the amplifier so that if VOUT is shorted to ground and VIN swings up to 18 V, the output current does not exceed 70 mA. For 18 V single-supply applications, resistors less than 261 Ω are not recommended. 18V VIN AD86x4 261Ω VOUT Figure 25. Output Short-Circuit Protection – 1.5kΩ 1.5kΩ + VCC VCC VOUT VEE Figure 26. Simplified Schematic Rev. B | Page 9 of 16 06485-025 06485-026 AD8614/AD8644 INPUT OVERVOLTAGE PROTECTION As with any semiconductor device, whenever the condition exists for the input to exceed either supply voltage, attention needs to be paid to the input overvoltage characteristic. As an overvoltage occurs, the amplifier can be damaged, depending on the voltage level and the magnitude of the fault current. When the input voltage exceeds either supply by more than 0.6 V, internal pin junctions energize, allowing current to flow from the input to the supplies. Observing Figure 26, the AD8614/AD8644 have 1.5 kΩ resistors in series with each input, which helps to limit the current. This input current is not inherently damaging to the device as long as it is limited to 5 mA or less. If the voltage is large enough to cause more than 5 mA of current to flow, an external series resistor should be added. The size of this resistor is calculated by dividing the maximum overvoltage by 5 mA and subtracting the internal 1.5 kΩ resistor. For example, if the input voltage could reach 100 V, the external resistor should be (100 V ÷ 5 mA) – 1.5 kΩ = 18.5 kΩ. This resistance should be placed in series with either or both inputs if they are subjected to the overvoltages. To calculate the internal junction temperature of the AD8614/AD8644, the following formula can be used: TJ = PDISS × θJA + TA where: TJ is the AD8614/AD8644 junction temperature. PDISS is the AD8614/AD8644 power dissipation. θJA is the AD8614/AD8644 junction-to-ambient package thermal resistance. TA is the ambient temperature of the circuit. The power dissipated by the device can be calculated as: PDISS = ILOAD × (VS – VOUT) where: ILOAD is the AD8614/AD8644 output load current. VS is the AD8614/AD8644 supply voltage. VOUT is the AD8614/AD8644 output voltage. Figure 27 provides a convenient way to determine if the device is being overheated. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature around the package. By using the previous equation, it is a simple matter to see if PDISS exceeds the device’s power derating curve. To ensure proper operation, it is important to observe the recommended derating curves shown in Figure 27. 1.5 MAXIMUM POWER DISSIPATION (W) OUTPUT PHASE REVERSAL The AD8614/AD8644 are immune to phase reversal as long as the input voltage is limited to within the supply rails. Although the device’s output does not change phase, large currents due to input overvoltage can result, damaging the device. In applications where the possibility of an input voltage exceeding the supply voltage exists, overvoltage protection should be used, as described in the previous section. 14-LEAD SOIC PACKAGE θJA = 120°C/W 1.0 14-LEAD TSSOP PACKAGE θJA = 180°C/W POWER DISSIPATION The maximum power that can be safely dissipated by the AD8614/AD8644 is limited by the associated rise in junction temperature. The maximum safe junction temperature is 150°C, and should not be exceeded or device performance could suffer. If this maximum is momentarily exceeded, proper circuit operation is restored as soon as the die temperature is reduced. Leaving the device in an overheated condition for an extended period can result in permanent damage to the device. 0.5 5-LEAD SOT-23 PACKAGE θJA = 230°C/W 06485-027 0 –35 –15 5 25 45 AMBIENT TEMPERATURE (°C) 65 85 Figure 27. Maximum Power Dissipation vs. Temperature (5-Lead and 14-Lead Package Types) UNUSED AMPLIFIERS It is recommended that any unused amplifiers in the quad package be configured as a unity-gain follower with a 1 kΩ feedback resistor connected from the inverting input to the output, and the noninverting input tied to the ground plane. Rev. B | Page 10 of 16 AD8614/AD8644 CAPACITIVE LOAD DRIVE The AD8614/AD8644 exhibit excellent capacitive load driving capabilities. Although the device is stable with large capacitive loads, there is a decrease in amplifier bandwidth as the capacitive load increases. When driving heavy capacitive loads directly from the AD8614/AD8644 output, a snubber network can be used to improve the transient response. This network consists of a series R-C connected from the amplifier’s output to ground, placing it in parallel with the capacitive load. The configuration is shown in Figure 28. Although this network does not increase the bandwidth of the amplifier, it does significantly reduce the amount of overshoot. 5V A1, A2 = 1/2 AD8644 A3, A4 = 1/2 AD8644 TO TELEPHONE LINE 1:1 ZO 600Ω T1 MIDCOM 671-8005 6.2V 6.2V R6 10kΩ 6 7 P1 Tx GAIN ADJUST 2kΩ R2 9.09kΩ 2 R3 360Ω R5 10kΩ C1 R1 10kΩ 0.1µF TRANSMIT TxA 1 A1 3 5V DC R7 10kΩ 10µF R9 10kΩ 2 A2 5 R8 10kΩ R10 10kΩ R13 10kΩ R11 10kΩ R12 10kΩ 3 A3 1 P2 Rx GAIN ADJUST R14 14.3kΩ 6 5 RECEIVE RxA 2kΩ A4 7 Figure 29. A Single-Supply Direct Access Arrangement for Modems AD86x4 VIN RX CX CL VOUT 06485-028 A ONE-CHIP HEADPHONE/MICROPHONE PREAMPLIFIER SOLUTION Because of its high output current performance, the AD8644 makes an excellent amplifier for driving an audio output jack in a computer application. Figure 30 shows how the AD8644 can be interfaced with an ac codec to drive headphones or speakers. 5V AVDD1 25 VREFOUT 28 LINE_OUT_L 35 2 Figure 28. Snubber Network Compensation for Capacitive Loads The optimum values for the snubber network should be determined empirically based on the size of the capacitive load. Table 4 shows a few sample snubber network values for a given load capacitance. Table 4. Snubber Networks for Large Capacitive Loads Load Capacitance (CL) 0.47 nF 4.7 nF 47 nF Snubber Network (RX, CX) 300 Ω, 0.1 μF 30 Ω, 1 μF 5 Ω, 10 μF 5V 10 U1-A 3 5 4 C1 100µF + 1 R3 20Ω R1 2kΩ AD1881A (AC'97) DIRECT ACCESS ARRANGEMENT Figure 29 shows a schematic for a 5 V single-supply transmit/ receive telephone line interface for 600 Ω transmission systems. It allows full duplex transmission of signals on a transformercoupled 600 Ω line. Amplifier A1 provides gain that can be adjusted to meet the modem’s output drive requirements. Both A1 and A2 are configured to apply the largest possible differential signal to the transformer. The largest signal available on a single 5 V supply is approximately 4.0 V p-p into a 600 Ω transmission system. Amplifier A3 is configured as a difference amplifier to extract the receive information from the transmission line for amplification by A4. A3 also prevents the transmit signal from interfering with the receive signal. The gain of A4 can be adjusted in the same manner as A1 to meet the modem input signal requirements. Standard resistor values permit the use of single in-line package (SIP) format resistor arrays. Couple this with the AD8644 14-lead SOIC or TSSOP package and this circuit can offer a compact solution. LINE_OUT_R 36 AVSS1 26 8 7 6 U1-B C2 100µF + 9 R4 20Ω R2 2kΩ NOTES 1. ADDITIONAL PINS OMITTED FOR CLARITY. Figure 30. A PC-99-Compliant Headphone/Line Out Amplifier Rev. B | Page 11 of 16 06485-030 U1 = AD8644 06485-029 C2 0.1µF AD8614/AD8644 If gain is required from the output amplifier, four additional resistors should be added as shown in Figure 31. 5V AVDD1 25 current from the headphones and create a high-pass filter with a corner frequency of R6 20kΩ 5V f −3 dB = C1 100µF + 1 4 1 2πC1(R4 + R L ) AVDD2 38 LINE_OUT_L 35 R5 10kΩ 2 10 U1-A 3 5 R3 20Ω where RL is the resistance of the headphones. The remaining two amplifiers can be used as low voltage microphone preamplifiers. A single AD8614 can be used as a standalone microphone preamplifier. Figure 32 shows this implementation. 10kΩ 5V 1µF + 2.2kΩ R1 2kΩ VREF 27 AD1881A (AC'97) R5 10kΩ LINE_OUT_R 36 AVSS1 26 7 6 AV = 20dB U1-B 8 C2 100µF + 9 R4 20Ω 1kΩ MIC1 21 R2 2kΩ MIC 1 R6 20kΩ U1 = AD8644 R6 06485-031 AD1881A (AC'97) 10kΩ AV = 20dB 1kΩ 5V 1µF + 2.2kΩ AV = = +6dB WITH VALUES SHOWN R5 NOTES 1. ADDITIONAL PINS OMITTED FOR CLARITY. MIC2 22 MIC 2 The gain of the AD8644 can be set as AV = R6 R5 VREF 27 Figure 32. Microphone Preamplifier Input coupling capacitors are not required for either circuit as the reference voltage is supplied from the AD1881A. The resistors R4 and R5 help protect the AD8644 output in case the output jack or headphone wires are accidentally shorted to ground. The output coupling capacitors C1 and C2 block dc Rev. B | Page 12 of 16 06485-032 Figure 31. A PC-99-Compliant Headphone/Speaker Amplifier with Gain AD8614/AD8644 OUTLINE DIMENSIONS 2.90 BSC 5.10 5.00 4.90 4 5 1.60 BSC 1 2 3 2.80 BSC 4.50 4.40 4.30 14 8 PIN 1 0.95 BSC 1.30 1.15 0.90 1.90 BSC 6.40 BSC 1 7 PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 1.45 MAX 0.22 0.08 10° 5° 0° 0.60 0.45 0.30 0.20 0.09 0.15 MAX 0.50 0.30 SEATING PLANE SEATING COPLANARITY PLANE 0.10 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 33. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Figure 34. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 14 1 8 7 4.00 (0.1575) 3.80 (0.1496) 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.50 (0.0197) 0.25 (0.0098) 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45° COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 35. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) Rev. B | Page 13 of 16 060606-A AD8614/AD8644 ORDERING GUIDE Model AD8614ART-R2 AD8614ART-REEL AD8614ART-REEL7 AD8614ARTZ-REEL 1 AD8614ARTZ-REEL71 AD8644AR AD8644AR-REEL AD8644AR-REEL7 AD8644ARZ1 AD8644ARZ-REEL1 AD8644ARZ-REEL71 AD8644ARU AD8644ARU-REEL AD8644ARUZ1 AD8644ARUZ-REEL1 1 Temperature Range –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C –20°C to +85°C Package Description 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP Package Option RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 R-14 R-14 R-14 R-14 R-14 R-14 RU-14 RU-14 RU-14 RU-14 Branding A6A A6A A6A A0Z A0Z Z = RoHS Compliant Part. Rev. B | Page 14 of 16 AD8614/AD8644 NOTES Rev. B | Page 15 of 16 AD8614/AD8644 NOTES ©1999–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06485-0-9/07(B) Rev. B | Page 16 of 16