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AD8672TRZ-EP

AD8672TRZ-EP

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC-8

  • 描述:

    IC OPAMP GP 2 CIRCUIT 8SOIC

  • 数据手册
  • 价格&库存
AD8672TRZ-EP 数据手册
Precision, Very Low Noise, Low Input Bias Current Op Amp AD8672-EP Enhanced Product PIN CONFIGURATION Voltage noise density: 2.8 nV/√Hz typical Peak-to-peak noise: 77 nV p-p typical Gain bandwidth product: 10 MHz Low input bias current: 14 nA maximum Low offset voltage: 75 μV maximum High open-loop gain: 1000 V/mV (120 dB) Low supply current per amplifier: 3 mA typical Dual-supply operation: ±5 V to ±15 V Unity-gain stable No phase reversal ENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Extended temperature range: −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS 8 V+ –IN A 2 AD8672-EP 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 –IN B 5 +IN B V– 4 Figure 1. GENERAL DESCRIPTION The AD8672-EP is a very high precision amplifier featuring very low noise, very low offset voltage and drift, low input bias current, 10 MHz bandwidth, and low power consumption. Outputs are stable with capacitive loads of over 1000 pF. Supply current is less than 3 mA per amplifier at 30 V. The combination of ultralow noise, high precision, speed, and stability within the AD8672-EP is unmatched. Applications for this amplifier include high quality PLL filters, precision filters, medical and analytical instrumentation, precision power supply controls, ATE, data acquisition, and precision controls, as well as professional quality audio. The AD8672-EP is available in an 8-lead SOIC narrow package. It is specified over a −55°C to +125°C temperature range. Phase-locked loop (PLL) filters Filters for GPS Instrumentation Sensors and controls Professional quality audio Rev. 0 OUT A 1 13063-001 FEATURES Additional application and technical information can be found in the AD8672 data sheet. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8672-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1  Electrical Characteristics, ±15 V .................................................4  Enhanced Product Features ............................................................ 1  Absolute Maximum Ratings ............................................................5  Applications ....................................................................................... 1  Thermal Resistance .......................................................................5  Pin Configuration ............................................................................. 1  ESD Caution...................................................................................5  General Description ......................................................................... 1  Typical Performance Charateristics ................................................6  Revision History ............................................................................... 2  Outline Dimensions ..........................................................................8  Specifications..................................................................................... 3  Ordering Guide .............................................................................8  Electrical Characteristics, ±5 V .................................................. 3  REVISION HISTORY 9/15—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Enhanced Product AD8672-EP SPECIFICATIONS ELECTRICAL CHARACTERISTICS, ±5 V VSY = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise specified. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol Test Conditions/Comments Typ Max Unit 20 30 0.3 +3 +5 +8 +6 +6 +8 75 125 0.8 +14 +20 +60 +14 +20 +60 +2.5 120 6000 μV μV μV/°C nA nA nA nA nA nA V dB V/mV CINCM CINDM 6.25 7.5 pF pF RIN RINDM 3.5 15 GΩ MΩ +4.0 +3.9 −3.9 −3.8 ±10 V V V V mA VOS ∆VOS/∆T IB −55°C < TA < +125°C −55°C < TA < +125°C 25°C < TA < 125°C −55°C < TA < +125°C Input Offset Current IOS 25°C < TA < 125°C −55°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance Common Mode Differential Mode Input Resistance Common Mode Differential Mode OUTPUT CHARACTERISTICS Output Voltage High Low Min CMRR AVO VOH VOL VCM = −2.5 V to +2.5 V RL = 2 kΩ, VO = −3 V to +3 V −14 −20 −60 −14 −20 −60 −2.5 100 1000 RL = 2 kΩ, −55°C to +125°C RL = 600 Ω RL = 2 kΩ, −55°C to +125°C RL = 600 Ω +3.8 +3.7 110 Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier PSRR ISY VS = ±4 V to ±18 V VO = 0 V −55°C < TA < +125°C DYNAMIC PERFORMANCE Slew Rate Settling Time SR tS RL = 2 kΩ To 0.1% (4 V step, G = 1) To 0.01% (4 V step, G = 1) 4 1.4 5.1 10 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz f = 10 kHz 77 2.8 0.3 −130 −105 Gain Bandwidth Product NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density Channel Separation IOUT GBP en p-p en in CS Rev. 0 | Page 3 of 8 130 3 −3.8 −3.7 3.5 4.2 dB mA mA V/μs μs μs MHz 100 3.8 nV p-p nV/√Hz pA/√Hz dB dB AD8672-EP Enhanced Product ELECTRICAL CHARACTERISTICS, ±15 V VS = ±15.0 V, VCM = 0 V, TA = 25°C, unless otherwise specified. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol Test Conditions/Comments Typ Max Unit 20 30 0.3 +3 +5 +8 +6 +6 +8 75 125 0.8 +14 +20 +60 +14 +20 +60 +12 120 6000 μV μV μV/°C nA nA nA nA nA nA V dB V/mV CINCM CINDM 6.25 7.5 pF pF RIN RINDM 3.5 15 GΩ MΩ 13.8 12.3 −13.8 −12.4 ±20 ±30 V V V V mA mA VOS ∆VOS/∆T IB −55°C < TA < +125°C −55°C < TA < +125°C 25°C < TA < 125°C −55°C < TA < +125°C Input Offset Current IOS 25°C < TA < 125°C −55°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance Common Mode Differential Mode Input Resistance Common Mode Differential Mode OUTPUT CHARACTERISTICS Output Voltage High Low Min CMRR AVO VOH VOL VCM = −12 V to +12 V RL = 2 kΩ, VO = −10 V to +10 V −14 −20 −60 −14 −20 −60 −12 100 1000 RL = 2 kΩ, −55°C to +125°C RL = 600 Ω RL = 2 kΩ, −55°C to +125°C RL = 600 Ω 13.2 11 110 Output Current Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier PSRR ISY VS = ±4 V to ±18 V VO = 0 V −55°C < TA < +125°C DYNAMIC PERFORMANCE Slew Rate Settling Time SR tS RL = 2 kΩ To 0.1% (10 V step, G = 1) To 0.01% (10 V step, G = 1) 4 2.2 6.3 10 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz f = 10 kHz 77 2.8 0.3 −130 −105 Gain Bandwidth Product NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density Channel Separation IOUT ISC GBP en p-p en in CS Rev. 0 | Page 4 of 8 130 3 −13.2 −11 3.5 4.2 dB mA mA V/μs μs μs MHz 100 3.8 nV p-p nV/√Hz pA/√Hz dB dB Enhanced Product AD8672-EP ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 60 sec) Rating 36 V VS− to VS+ ±0.7 V Indefinite −65°C to +150°C −55°C to +125°C −65°C to +150°C 300°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. θJA is specified for the worst-case conditions, that is, θJA is specified for the device soldered on a 4-layer circuit board for surface-mount packages. Table 4. Package Type 8-Lead SOIC_N (R-8) ESD CAUTION Rev. 0 | Page 5 of 8 θJA 120 θJC 43 Unit °C/W AD8672-EP Enhanced Product 4.0 135 3.5 134 VS = ±2.5V TO ±18V VS = ±15V 133 3.0 VS = ±5V 132 PSRR (dB) 2.0 131 1.5 130 1.0 129 0.5 128 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 127 –75 –50 0 25 50 VS = ±5V TA = –55°C TO +125°C 80 60 40 40 MEAN + 3σ MEAN –20 –40 MEAN – 3σ MEAN – 3σ –60 –60 –80 –80 –25 0 25 50 75 100 125 TEMPERATURE (°C) –100 –75 13063-102 –50 MEAN 0 –20 –100 –75 MEAN + 3σ 20 VOS (µV) 20 –40 125 VS = ±15V TA = –55°C TO +125°C 80 60 0 100 Figure 5. PSRR vs. Temperature 100 100 75 TEMPERATURE (°C) Figure 2. Supply Current vs. Temperature VOS (µV) –25 –50 –25 0 25 50 100 125 Figure 6. Input Offset Voltage (VOS) vs. Temperature, VS = ±15 V Figure 3. Input Offset Voltage (VOS) vs. Temperature, VS = ±5 V 16 25 75 TEMPERATURE (°C) 13063-105 0 –75 13063-104 2.5 13063-101 SUPPLY CURRENT (mA) TYPICAL PERFORMANCE CHARATERISTICS VS = ±5V TA = –55°C TO +125°C VS = ±15V TA = –55°C TO +125°C 14 NUMBER OF AMPLIFIERS 15 10 12 10 8 6 4 5 TCVOS (µV/°C) TCVOS (µV/°C) Figure 7. Input Offset Voltage Drift (TCVOS) Distribution, VS = ±15 V Figure 4. Input Offset Voltage Drift (TCVOS) Distribution, VS = ±5 V Rev. 0 | Page 6 of 8 13063-106 0 13063-103 0 –0.50 –0.45 –0.40 –0.35 –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 2 –0.50 –0.45 –0.40 –0.35 –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 NUMBER OF AMPLIFIERS 20 Enhanced Product AD8672-EP 4.0 3.5 VS = ±15V VS = ±5V 3.5 3.0 –IB 3.0 2.5 IB (nA) IB (nA) 2.5 2.0 +IB 1.5 –IB 2.0 1.5 +IB 1.0 1.0 0.5 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 0 –75 13063-107 0 –75 –25 0 25 50 75 100 125 TEMPERATURE (°C) Figure 8. Input Bias Current (IB) vs. Temperature, VS = ±5 V 14.5 –50 13063-110 0.5 Figure 11. Input Bias Current (IB) vs. Temperature, VS = ±15 V –11.0 RL = 2kΩ VS = ±15V 14.0 –11.5 OUTPUT VOLTAGE (V) 13.0 12.5 RL = 600Ω 12.0 11.5 –12.0 –12.5 RL = 600Ω –13.0 –13.5 RL = 2kΩ 11.0 –14.0 10.5 VS = ±15V –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) –14.5 –75 13063-108 10.0 –75 25000 VS = ±5V 15000 10000 VS = ±15V 5000 0 25 50 75 100 TEMPERATURE (°C) 125 13063-109 AVO (V/mV) 20000 –25 0 25 50 75 100 Figure 12. Output Voltage Low vs. Temperature 30000 –50 –25 TEMPERATURE (°C) Figure 9. Output Voltage High vs. Temperature 0 –75 –50 Figure 10. Open-Loop Gain (AVO) vs. Temperature Rev. 0 | Page 7 of 8 125 13063-111 OUTPUT VOLTAGE (V) 13.5 AD8672-EP Enhanced Product OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 4.00 (0.1574) 3.80 (0.1497) Figure 13. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 AD8672TRZ-EP AD8672TRZ-EP-R7 1 Temperature Range −55°C to +125°C −55°C to +125°C Package Description 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. ©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13063-0-9/15(0) Rev. 0 | Page 8 of 8 Package Option R-8 R-8
AD8672TRZ-EP 价格&库存

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AD8672TRZ-EP
    •  国内价格
    • 1078+39.88600

    库存:5000