AD9461BSVZ

16-Bit, 130 MSPS IF Sampling ADC AD9461 FEATURES FUNCTIONAL BLOCK DIAGRAM AGND AVDD1 AVDD2 DRGND DRVDD DFS AD9461 DCS MODE BUFFER VIN+ VIN– CLK+ CLK– PIPELINE ADC T/H 16 CMOS OR LVDS OUTPUT STAGING 2 32 OUTPUT MODE OR D15 TO D0 2 CLOCK AND TIMING MANAGEMENT DCO REF VREF SENSE REFT REFB 06011-001 130 MSPS guaranteed sampling rate 78.7 dBFS SNR/90 dBc SFDR with 10 MHz input (3.4 V p-p input, 130 MSPS) 77.7 dBFS SNR with 170.3 MHz input (4.0 V p-p input, 130 MSPS) 77.0 dBFS SNR/84 dBc SFDR with 170 MHz input (3.4 V p-p input, 130 MSPS) 76.3 dBFS SNR/86 dBc SFDR with 225 MHz input (3.4 V p-p input, 125 MSPS) 89 dBFS two-tone SFDR with 169 MHz and 170 MHz (130 MSPS) 60 fsec rms jitter Excellent linearity DNL = ±0.6 LSB typical INL = ±5.0 LSB typical 2.0 V p-p to 4.0 V p-p differential full-scale input Buffered analog inputs LVDS outputs (ANSI-644 compatible) or CMOS outputs Data format select (offset binary or twos complement) Output clock available Figure 1. APPLICATIONS MRI receivers Multicarrier, multimode, cellular receivers Antenna array positioning Power amplifier linearization Broadband wireless Radar Infrared imaging Communications instrumentation Optional features allow users to implement various selectable operating conditions, including input range, data format select, and output data mode. The AD9461 is available in a Pb-free, 100-lead, surface-mount, plastic package (100-lead TQFP_EP) specified over the industrial temperature range −40°C to +85°C. PRODUCT HIGHLIGHTS GENERAL DESCRIPTION 1. True 16-bit linearity. The AD9461 is a 16-bit, monolithic, sampling, analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The AD9461 operates up to 130 MSPS, providing a superior signalto-noise ratio (SNR) for instrumentation, medical imaging, and radar receivers using baseband (