ມཚ ڢ12/14/16࿋
1GSPSຕఇገ࣑ഗ
AD9776A/AD9778A/AD9779A
༬Ⴀ
߁ຎ
)ࡼࠀگඇև߾ፕཉॲူ*ǖ1.0 W (1 GSPS)Lj!!!!!!!!!!!!!!
100ᆅগĂࡰಎTQFPހጎ
AD9776A/AD9778A/AD9779Aݴ՚ມཚڢĂ12/14/16࿋Ă
ߛۯༀྷݔຕఇገ࣑ഗ(DAC)Lj༵ࠃ1 GSPS֑ᄣ୲Lj
ᅜׂิፌߛٳలઊຯ༬ೕ୲ܠڦሜհăኄၵഗॲਏᆶኍܔ
থՎೕدᆌᆩႜᆫࣅڦ༬ႠLjԈઔްຕຕጴۙᅜ
तሺᅮᇑ฿ۙցăDACঢ়ࡗᆫࣅLjᅜᇑఇెኟ
ۙഗފথ੨Lj૩සADIࠅິڦADL537x FMODဣଚۙ
ഗăෙ၍๕থ੨ሎႹܔႹాܠև֖ຕႜՊ܁࣮ࢅײă
ଉײୁۉᅜሞ10 mA30 mAాྷݔႜՊײăኄ
ၵഗॲ֑ᆩံڦ0.18 μm CMOS߾ᅝሰLj֑ᆩ1.8 Vࢅ
3.3 VۉᇸࠃۉLjጺࠀࡼྺ1.0 WLjժ֑ᆩ100ᆅগגԋ຺ݛ
Ռೝހጎ(TQFP)ă
ᆌᆩ
ׂঋ!
၍एإยแǖW-CDMAĂCDMA2000ĂTD-SCDMAĂWiMAXĂ
1.
600 mW (500 MSPS)
ڇሜհW-CDMA ACLR = 80 dBc (80 MHz ዐೕ)
ۙఇెǖ8.7 mA31.7 mA)RL = 25 Ω50 Ω*
ႎᆗڦ2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙഗᅜॽሜհݣሞDAC
ټዐڦඪࢆ࿋ዃ
ޤዺDACᅜ੦ྔևVGAत฿ۙ
ܠႊೌཞօথ੨
ߛႠీĂگሯำ၎࣍(PLL)้ዓԠೕഗ
ຕጴݒsinc୳հഗ
GSMĂLTE
2.
3.
ຕጴߛ/گዐೕࢇׯ
ాևຕጴฉՎೕࠀీ
݀พݴण
4.
5.
ټཚ႑ǖLMDS/MMDSĂۅܔۅ
૧ᆩگגሯำᇑۙ฿ኈ(IMD)༬ႠLjٗएߛڟټዐ
ೕټڦ႑ࡽᅜํ၄ߛዊଉࢇׯă
ጆᆶڦDACਸ࠲रຍሺഽۯༀႠీă
ୁۉದዃ०ՍLjᅜᆩᇀ߳ዖ܋ڇईֶۉݴୟྊ
೫ࠓă
CMOSຕথ੨Ljਏᆶۙॺڦ૬ᇑԍీࠀă
ႎᆗڦ2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙഗᅜॽሜհ
ݣሞDACټዐڦඪࢆ࿋ዃă
ۆ႙႑ࡽ૾
QUADRATURE
MODULATOR/
MIXER/
AMPLIFIER
COMPLEX I AND Q
DC
LO
DC
DIGITAL INTERPOLATION FILTERS
I DAC
POST DAC
ANALOG FILTER
Q DAC
AD9776A/AD9778A/AD9779A
A
06452-114
FPGA/ASIC/DSP
1
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
ADIዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjADIփܔᅳዐ٪ሞֶڦᅴईᆯׂُิٱڦဃሴăසႴඓණඪࢆَᇕڦጚඓႠLj൩֖ADI༵ࠃ
ڦፌႎᆈ࿔Ӳຕ֩ă
AD9776A/AD9778A/AD9779A
ణ
༬Ⴀ
1
!
ᆌᆩ
1
DAC֑ᄣ้ዓᇸ
39
߁ຎ
ݒSinc୳հഗ
38
1
!
থ้ዓ
39
ׂঋ
1
!
้ዓԠೕ
39
ۆ႙႑ࡽ૾
1
!
ൻۯREFCLK
42
Ⴊ۩૦๏
3
ׂิଉୁۉײ
43
ࠀీ
4
!
43
रຍࡀ߭
5
ሺᅮࢅ฿ۙၯኟ
! ୁࡀ߭
5
! ຕጴࡀ߭
6
! ຕጴຕ้Ⴞࡀ߭
7
! ୁࡀ߭
8
!
ਨܔፌۨܮٷኵ
9
ຕ܋੨
46
! ඤፆ
9
!
܋ڇ੨ఇ๕
46
!
ాևएጚۉუᇸ
44
I/Qཚڢሺᅮದ
44
ޤዺDAC֡ፕ
44
LOઍཚց
45
ሺᅮࢅ฿ۙၯኟࡕ
45
9
!
ມ܋੨ఇ๕
46
ᆅগದዃࢅࠀీ௮ຎ
10
!
ຕᅜDATACLKྺ֖
46
ۆ႙߾ፕ༬Ⴀ
16
!
ຕᅜREFCLKྺ֖
47
ຍᇕ
24
!
ᆫࣅຕ้Ⴞ
48
߾ፕᇱ
25
ഗॲཞօ
49
!
ཞօஇड߁ຎ
49
25
!
ഗॲᇑဣཥ้ዓཞօ
50
ෙ၍๕থ੨
26
!
ዐ൩൱֡ፕ
50
! زႜথ੨ڦཚᆩ֡ፕ
26
ࠀࡼ
51
! ኸସጴব
26
!
52
! زႜথ੨܋੨ᆅগࠀీ௮ຎ
27
ೠࠚӱ߁ຎ
53
27
!
53
ෙ၍๕থ੨स٪ഗᆙพ
28
ྔႚ٫
55
֭ኵ୳հഗࠓ
33
!
55
! ֭ኵ୳հഗټ၌
37
ESDয়ߢ
AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/
AD9779Aڦ൶՚
MSB/LSBد
Rev. B | Page 2 of 56
ۖࢅۉႩఇ๕
ೠࠚӱ֡ፕ
۩ࠔኸళ
AD9776A/AD9778A/AD9779A
Ⴊ۩૦๏
20089ሆ—Ⴊ۩ӲAႪ۩ӲB
زႜྔยথ੨(SPI)ඇև߀ྺෙ၍๕থ੨
1
أ79ǗዘႎӀႾՊࡽ
41
߸߀༬Ⴀևݴ
1
߸߀LOઍཚցևݴ
45
߸߀ᆌᆩևݴ
1
߸߀28
47
߸߀1ڦओݥݴ၍Ⴀ(INL)֖ຕ
5
߸߀ᆫࣅຕ้Ⴞևݴ
48
߸߀2ڦDAC้ዓ(REFCLK+, REFCLK−)֖ຕ
6
߸߀ཞօஇड߁ຎևݴ
49
߸߀3ڦຕ֖ຕ
7
߸߀88
49
߸߀3ڦԍ้क़֖ຕ
7
߸߀101
53
3ሺेෙ၍๕থ੨֖ຕ
7
أ๑ᆩADL5372ኟۙഗևࢅݴ104
51
3ሺेް࿋֖ຕ
7
أೠࠚӱᇱևࢅݴ105ǗዘႎӀႾՊࡽ
52
߸߀3ڦ࿂ጀ
7
أ106
53
3ሺेࡰಎጀLj߸߀7
10
أ107
54
4ሺेࡰಎጀLj߸߀8
12
أ108
55
5ሺेࡰಎጀLj߸߀9
14
أ109
56
߸߀DATACLKჽྷݔևݴ
25
أ110
57
߸߀ӲԨस٪ഗևݴ
25
أ111
58
߸߀10
25
أ112
59
߸߀12
26
߸ႎྔႚ٫
60
߸߀13
28
߸߀14
29
20083ሆ—Ⴊ۩Ӳ0Ⴊ۩ӲA
߸߀֭ኵ୳հഗࠓևݴ
33
߸߀༬Ⴀ
1
߸߀60
34
ሺेጀ2
4
߸߀19
36
߸߀2
5
߸߀֭ኵ୳հഗټ၌ևݴ
37
߸߀3
6
߸߀70
37
߸߀ඤፆևݴ
7
ሺेຕጴۙևݴ
37
֭6
8
ሺे20ࢅ21ǗዘႎӀႾՊࡽ
38
߸߀7ڦᆅগ39௮ຎ
9
ሺेݒSinc୳հഗևݴ
38
߸߀8ڦᆅগ39௮ຎ
10
ሺे71ǗዘႎӀႾՊࡽ
38
߸߀9ڦᆅগ39௮ຎ
12
߸߀้ዓԠೕևݴ
39
߸߀߾ፕᇱևݴ
23
߸߀72
39
߸߀10
23
߸߀ದዃPLLೕስኵևݴ
39
߸߀13
26
߸߀૧ᆩ࿒܈ॠ֪ದዃPLLೕስևݴ
41
߸߀14
27
߸߀૧ᆩ٪ئഗႜᅙኪ࿒܈ၯጚևݴ
41
߸߀֭ኵ୳հഗࠓևݴ
33
߸߀“ᅃહᆦᅥ”ڦഗॲၜևݴ
41
༺࣑DAC֑ᄣ้ዓᇸևݴ
36
ሺे26
41
༺࣑݀พୟ০ሺᅮࢅ฿ۙၯኟևݴ
40
߸߀ాևएጚۉუᇸևݴ
43
༺࣑ຕ܋੨ևݴ
42
݀พୟ০ሺᅮࢅ฿ۙၯኟՔ༶߀ྺሺᅮࢅ฿ۙၯኟ
44
༺࣑ഗॲཞօևݴ
45
߸߀I/Qཚڢሺᅮದևݴ
44
أ112117
58
߸߀ޤዺDAC֡ፕևݴ
44
߸࣑79
45
20078ሆ—Ⴊ۩Ӳ0ǖ؛๔Ӳ
Rev. B | Page 3 of 56
AD9776A/AD9778A/AD9779A
ࠀీ
DELAY
LINE
CLOCK GENERATION/DISTRIBUTION
SYNC_I
DATACLK
CLOCK
MULTIPLIER
2×/4×/8×
DELAY
LINE
DATA
ASSEMBLER
SINC^-1
2×
2×
2×
n × fDAC /8
n = 0, 1, 2 ... 7
Q
LATCH
2×
2×
2×
SINC^-1
DIGITAL CONTROLLER
10
16-BIT
I DAC
16-BIT
Q DAC
OUT1_P
OUT1_N
OUT2_P
OUT2_N
VREF
I120
GAIN
10
GAIN
SERIAL
PERIPHERAL
INTERFACE
POWER-ON
RESET
10
AD9779A
GAIN
AUX1_P
AUX1_N
GAIN
AUX2_P
AUX2_N
06452-001
10
SDO
SDIO
SCLK
CSB
P2D[15:0]
REFCLK–
COMPLEX
MODULATOR
P1D[15:0]
I
LATCH
REFCLK+
REFERENCE
AND BIAS
SYNC_O
2. AD9779Aࠀీ
Rev. B | Page 4 of 56
AD9776A/AD9778A/AD9779A
रຍࡀ߭!
ୁࡀ߭
TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Lj
ݥأଷᆶຫLj
1
֖ຕ
ݴՐ୲
܈
! ྲݥݴ၍Ⴀ(DNL)
! ओݥݴ၍Ⴀ(INL)
ዷDAC
! ฿ۙဃֶ
! ሺᅮဃֶ(๑ᆩాևएጚۉუᇸ)
! ଉײୁۉ1
! ۉუྷݔ
! ۉፆ
! ዷDACۙڇႠ
ዷDAC࿒܈ᅎ
฿ۙ
ሺᅮ
एጚۉუ
ޤዺDAC
ݴՐ୲
ଉײୁۉ1
ۉუྷݔDŽᇸDž
ۉუྷݔDŽဌDž
ۉፆ
ޤዺDACۙڇႠ
ፌၭኵ
1
एᇀ10 kΩྔևۉፆ
2
ၘ൧९ࠀࡼևݴă
ፌၭኵ
±0.1
±0.86
−0.001
8.66
−1.0
0
±2
20.2
AD9778A
ۆ႙ኵ ፌٷኵ
14
ፌၭኵ
±0.65
±1.5
+0.001
−0.001
31.66
+1.0
8.66
−1.0
0
±2
20.2
AD9779A
ۆ႙ኵ ፌٷኵ ڇ࿋
16
Bits
±2.1
±6.0
+0.001
−0.001
31.66
+1.0
8.66
−1.0
0
±2
20.2
10
ԍኤ
10
ԍኤ
10
ԍኤ
0.04
100
30
0.04
100
30
0.04
100
30
10
−1.998
0
0.8
एጚۉუ
ాևएጚۉუ.
ۉፆ
ఇెۉᇸۉუ
AVDD33
CVDD18
ຕጴۉᇸۉუ
DVDD33
DVDD18
ࠀࡼ2
1×ఇ๕LjfDAC=100 MSPSLjIF=1MHz
2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLL࠲
2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLLਸ
4×ఇ๕LjfDAC/4ۙLjfDAC=500 MSPSLj
IF = 137.5 MHzLjQ DAC࠲
8×ఇ๕LjfDAC/4ۙLjfDAC = 1 GSPSLj
IF = 262.5 MHz
! ۖۉఇ๕
! ۉᇸۉუᅞԲ(AVDD33)
߾ፕྷݔ
AD9776A
ۆ႙ኵ ፌٷኵ
12
10
+1.998
1.6
1.6
−1.998
0
0.8
LSB
LSB
+0.001
31.66
+1.0
ppm/°C
ppm/°C
ppm/°C
10
+1.998
1.6
1.6
−1.998
0
0.8
+1.998
1.6
1.6
1
ԍኤ
1
ԍኤ
1
ԍኤ
1.2
5
1.2
5
1.2
5
% FSR
% FSR
mA
V
MΩ
Bits
mA
V
V
MΩ
V
kΩ
3.13
1.70
3.3
1.8
3.47
2.05
3.13
1.70
3.3
1.8
3.47
2.05
3.13
1.70
3.3
1.8
3.47
2.05
V
V
3.13
1.70
3.3
1.8
3.47
2.05
3.13
1.70
3.3
1.8
3.47
2.05
3.13
1.70
3.3
1.8
3.47
2.05
V
V
250
498
588
572
300
250
498
588
572
300
250
498
588
572
300
mW
mW
mW
mW
980
2.5
−0.3
−40
+25
980
9.8
+0.3
+85
2.5
−0.3
−40
Rev. B | Page 5 of 56
+25
980
9.8
+0.3
+85
2.5
−0.3
−40
+25
mW
9.8
+0.3
+85
mW
% FSR/V
°C
AD9776A/AD9778A/AD9779A
ຕጴࡀ߭
TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Ljݥأ
ଷᆶຫLjLVDSൻۯഗࢅথഗग़ඹIEEE-1596ၭ૾ྷݔୟLjݥأଷᆶຫă
2
֖ຕ!
CMOSஇडۉೝ
VINஇडߛ
VINஇडگ
֭ኵ้ፌٷຕ୲
1×
2×
4×
8×
CMOSஇडۉೝ(DATACLK, PIN 37)1
! VOUTஇडߛ
! VOUTஇडگ
DATACLKԲ
LVDSথഗ(SYNC_I+, SYNC_I−)
! ۉუྷݔVIAईVIB
! ֶݴពኵVIDTH
! ֶݴውVIDTHH − VIDTHL
! থഗֶݴፆੇRIN
LVDS୲
SYNC_IREFCLKॺ૬้क़
SYNC_IREFCLKԍ้क़
LVDSൻۯഗ(SYNC_O+, SYNC_O−)
ۉუߛVOAईVOB
ۉუگVOAईVOB
ۉݴֶუ|VOD|
฿ۙۉუVOS
ፆੇRO
DAC้ዓ(REFCLK+, REFCLK−)
! ֶރރݴኵۉუ
! ࠌఇۉუ
! ፌ้ٷዓ୲
1
ཉॲ!
ፌၭኵ!ۆ႙ኵ!ፌٷኵ! ڇ࿋
2.0
0.8
DVDD18, CVDD18 = 1.8 V ± 5%
DVDD18, CVDD18 = 1.9 V ± 5%
DVDD18, CVDD18 = 2.0 V ± 2%
300
250
200
112.5
125
137.5
MSPS
MSPS
MSPS
MSPS
MSPS
MSPS
2.4
250 MHzೕ୲Lj5 pFሜ
40
V
V
50
0.4
60
V
V
%
SYNC_I+ = VIA, SYNC_I− = VIB
825
−100
1575
+100
20
80
120
250
fSYNC_Iᆌᆩे၌Ǘ֖९14ዐस٪ഗ0x05Lj
࿋[3:1]ڦ௮ຎ
0.4
0.55
mV
mV
mV
Ω
MSPS
ns
ns
SYNC_O+ = VOA, SYNC_O− = VOB, 100 Ω ܋থۉፆ
1375
܋ڇ
1025
150
1150
80
DVDD18, CVDD18 = 1.8 V ± 5%, PLL࠲
DVDD18, CVDD18 = 1.9 V ± 5%, PLL࠲
DVDD18, CVDD18 = 2.0 V ± 2%, PLL࠲
DVDD18, CVDD18 = 2.0 V ± 2%, PLLਸ
400
300
900
1000
1100
250
ཉॲǖ100 MHz DATACLKೕ୲Lj1 kΩሜLjፌٷ8 mAൻీۯ૰ăܔᇀ߸ߛ܈ई߸ٷሜLjፌॅፔُ݆ܔ႑ࡽ๑ᆩྔև࣐؋ഗă
Rev. B | Page 6 of 56
200
100
250
1250
120
800
400
2000
500
mV
mV
mV
mV
Ω
mV
mV
MHz
MHz
MHz
MHz
AD9776A/AD9778A/AD9779A
ຕጴຕ้Ⴞࡀ߭!
ᆶఇ๕Lj−40°C+85°Că
3
֖ຕ!
ຕ1
! ॺ૬้क़
! ԍ้क़
! ॺ૬้क़
! ԍ้क़
ჽ
1×֭ኵ
2×֭ኵ
4×֭ኵ
8×֭ኵ
! ݒSinc
ෙ၍๕থ੨
! ፌ้ٷዓ୲(SCLK)
! ፌ܌ஞ؋ۉߛ(܈ೝ)tPWH
! ፌ܌ஞ؋ۉگ(܈ೝ)tPWL
! ॺ૬้क़tDS
! ԍ้क़tDH
! ॺ૬้क़tDS
! ຕᆶၳtDV
ཉॲ
ፌၭኵ!
ຕDATACLK
ຕDATACLK
ຕREFCLK
ຕREFCLK
3.0
−0.05
−0.80
3.80
ᆶईۙ!
ᆶईۙ!
ᆶईۙ!
ᆶईۙ!
2
ፌٷኵ
DACCLKዜ
DACCLKዜ
DACCLKዜ
DACCLKዜ
DACCLKዜ
40
12.5
12.5
SDIOSCLK
SDIOSCLK
CSBSCLK
SDOSCLK
ڇ࿋
ns
ns
ns
ns
25
70
146
297
18
2.8
0.0
2.8
2.0
ฉ้ۉक़2
ް࿋
! ፌ܌ஞ؋ۉߛ(܈ೝ)
1
ۆ႙ኵ
260
2
MHz
ns
ns
ns
ns
ns
ns
ms
DACCLKዜ
ۨܮኵሞPLL্ᆩཉॲူ֪ڥă้Ⴞᇑ࿒࠲ڦ܈ဣᅜतຕᆶၳፆشڔ੨(ྺඓԍኟඓ֑ᄣLjഗॲᆶၳຕՂႷ၄ !ڦፌ
้܌क़)९28ă
ړस٪ഗ0x00࿋4ٗ1ႀྺ0้LjٗCSBฉืᄂ֪ڦڥኵǗVREFඁ᳘ۉඹྺ0.1 μFă
Rev. B | Page 7 of 56
AD9776A/AD9778A/AD9779A
ୁࡀ߭
TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Lj
ݥأଷᆶຫLj
4
参数
AD9776A
AD9778A
AD9779A
ፌၭኵ!ۆ႙ኵ ፌٷኵ ፌၭኵ!ۆ႙ኵፌٷኵ ፌၭኵ!ۆ႙ኵፌٷኵ ڇ࿋!
ሗොۯༀ(ྷݔSFDR)
fDAC = 100 MSPS, fOUT = 20 MHz
fDAC = 200 MSPS, fOUT = 50 MHz
fDAC = 400 MSPS, fOUT = 70 MHz
fDAC = 800 MSPS, fOUT = 70 MHz
82
81
80
85
82
81
80
85
82
82
80
87
dBc
dBc
dBc
dBc
87
80
75
75
87
85
81
80
91
85
81
81
dBc
dBc
dBc
dBc
−152
−155
−157.5
−155
−159
−160
−158
−160
−161
dBm/Hz
dBm/Hz
dBm/Hz
76
69
78
73
79
74
dBc
dBc
77.5
76
80
78
81
78
dBc
dBc
ມᅼۙ฿ኈ(IMD)
fDAC = 200 MSPS, fOUT = 50 MHz
fDAC = 400 MSPS, fOUT = 60 MHz
fDAC = 400 MSPS, fOUT = 80 MHz
fDAC = 800 MSPS, fOUT = 100 MHz
ሯำ(܈NSD)LjӗᅼLj500 kHzᅼक़ਐ
fDAC = 200 MSPS, fOUT = 80 MHz
fDAC = 400 MSPS, fOUT = 80 MHz
fDAC = 800 MSPS, fOUT = 80 MHz
W-CDMAତڢႅԲ(ACLR)Ljڇሜհ
fDAC = 491.52 MSPS, fOUT = 100 MHz
fDAC = 491.52 MSPS, fOUT = 200 MHz
W-CDMAܾڼତڢႅԲ(ACLR)Ljڇሜհ
fDAC = 491.52 MSPS, fOUT = 100 MHz
fDAC = 491.52 MSPS, fOUT = 200 MHz
Rev. B | Page 8 of 56
AD9776A/AD9778A/AD9779A
ਨܔፌۨܮٷኵ
5
֖ຕ!
AVDD33, DVDD33
DVDD18, CVDD18
AGND
DGND
CGND
I120, VREF, IPTAT
၎ܔᇀ!
AGND, DGND,
CGND
AGND, DGND,
CGND
DGND, CGND
AGND, CGND
AGND, DGND
AGND
AGND
OUT1_P, OUT1_N,
OUT2_P, OUT2_N,
AUX1_P, AUX1_N,
AUX2_P, AUX2_N
P1D[15:0], P2D[15:0]
DGND
DATACLK, TXENABLE
DGND
REFCLK+, REFCLK−
CGND
RESET, IRQ, PLL_LOCK,
SYNC_O+, SYNC_O−,
SYNC_I+, SYNC_I−,
CSB, SCLK, SDIO, SDO
࿒!
٪ئ࿒!!ྷݔ܈
DGND
ۨܮኵ
−0.3 V +3.6 V
−0.3 V +2.1 V
−0.3 V +0.3 V
−0.3 V +0.3 V
−0.3 V +0.3 V
−0.3 V
AVDD33 + 0.3 V
−1.0 V
AVDD33 + 0.3 V
−0.3 V
DVDD33 + 0.3 V
−0.3 V
DVDD33 + 0.3 V
−0.3 V
CVDD18 + 0.3 V
−0.3 V
DVDD33 + 0.3 V
ጀᅪLjגฉຎਨܔፌۨܮٷኵీࣷڞዂഗॲᆦ৳Ⴀ
࣋ăኄၵኻፌۨܮٷኵLjփᅪ࿆ጣഗॲᅜሞኄၵईኁ
ඪࢆഄגԨरຍࡀ߭ກዐࠀీႠ֡ፕቤবՔڦཉ
ॲူీࠕኟ߾ፕăሞਨܔፌۨܮٷኵཉॲူ߾ፕࣷ
ᆖၚഗॲڦ੍Ⴀă
ඤፆ
ܔᇀ100ᆅগĂොඤሺഽ႙TQFPހጎLjྺํ၄ፌॅොඤႠ
ీLjᆌॽࡰಎ(EPAD)ࡰথথ֫ںă
ۆ႙θJAࢅθJCࡀ߭ᆩᇀৢኹഘူڦ4֫ۉୟӱăഘୁ
ۯሺഽොඤLjᆶၳইگθJAă
6. ඤፆ
ހጎૌ႙!
100ᆅগTQFP
! ࡰথEPAD
! փࡰEPAD
θJA
θJB
θJC
ڇ࿋
19.1
27.4
12.4
7.1
°C/W
°C/W
ESD য়ߢ
+125°C
−65°C +150°C
Rev. B | Page 9 of 56
ESD(ৢߌ௺)ۉݣۉഗॲă
ۉټഗॲࢅۉୟӱీࣷሞுᆶִਥڦ൧ူۉݣă
࠶Ԩׂਏᆶጆ૧ईጆᆶԍࢺۉୟLjڍሞᇜీߛڟ
ଉESD้Ljഗॲీࣷ࣋ăᅺُLjᆌ֑ړൽڦړ
ESDٯݔݞแLjᅜՆ௨ഗॲႠీူইईࠀీෟ฿ă
AD9776A/AD9778A/AD9779A
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AGND
AVDD33
AVDD33
AGND
AVDD33
ᆅগದዃࢅࠀీ௮ຎ
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
CVDD18
1
CVDD18
2
75
I120
74
CGND
3
VREF
73
CGND
IPTAT
4
72
AGND
REFCLK+
5
71
IRQ
REFCLK–
6
70
RESET
CGND
7
69
CSB
CGND
8
68
SCLK
CVDD18
9
AD9776A
67
SDIO
TOP VIEW
(Not to Scale)
66
SDO
65
PLL_LOCK
AGND 12
64
DGND
SYNC_I+ 13
63
SYNC_O+
SYNC_I– 14
62
SYNC_O–
DGND 15
61
DVDD33
DVDD18 16
60
DVDD18
P1D11 17
59
NC
P1D10 18
58
NC
P1D9 19
57
NC
P1D8 20
56
NC
P1D7 21
55
P2D0
DGND 22
54
DGND
DVDD18 23
53
DVDD18
P1D6 24
52
P2D1
P1D5 25
51
P2D2
PIN 1
ANALOG DOMAIN
DIGITAL DOMAIN
CVDD18 10
CGND 11
06452-002
P2D3
P2D4
P2D5
P2D6
P2D7
P2D8
DGND
DVDD18
P2D9
P2D10
P2D11
TXENABLE/IQSELECT
NOTES
1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED
PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR
THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE.
DVDD33
DATACLK
NC
NC
NC
DVDD18
NC
DGND
P1D0
P1D1
P1D2
P1D3
P1D4
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
NC = NO CONNECT
3. AD9776Aᆅগದዃ
7. AD9776Aᆅগࠀీ௮ຎ
ᆅগ
Պࡽ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ᆅগఁ!
CVDD18
CVDD18
CGND
CGND
REFCLK+
REFCLK−
CGND
CGND
CVDD18
CVDD18
CGND
AGND
SYNC_I+
SYNC_I−
DGND
DVDD18
௮ຎ
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
้ዓں
ֶ้ݴዓ
ֶ้ݴዓ
้ዓں
้ዓں
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
ఇెں
ֶݴཞօ
ֶݴཞօ
ຕጴں
1.8 Vຕጴۉᇸ
ᆅগ
Պࡽ
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Rev. B | Page 10 of 56
ᆅগఁ!
P1D11
P1D10
P1D9
P1D8
P1D7
DGND
DVDD18
P1D6
P1D5
P1D4
P1D3
P1D2
P1D1
P1D0
NC
DGND
௮ຎ
܋੨1ຕD11(MSB)
܋੨1ຕD10
܋੨1ຕD9
܋੨1ຕD8
܋੨1ຕD7
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD6
܋੨1ຕD5
܋੨1ຕD4
܋੨1ຕD3
܋੨1ຕD2
܋੨1ຕD1
܋੨1ຕD0(LSB)
փথ
ຕጴں
AD9776A/AD9778A/AD9779A
ᆅগ
Պࡽ
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
ᆅগఁ!
DVDD18
NC
NC
NC
DATACLK
DVDD33
TXENABLE/
IQSELECT
P2D11
P2D10
P2D9
DVDD18
DGND
P2D8
P2D7
P2D6
P2D5
P2D4
P2D3
P2D2
P2D1
DVDD18
DGND
P2D0
NC
NC
NC
NC
DVDD18
DVDD33
SYNC_O−
SYNC_O+
DGND
PLL_LOCK
SDO
SDIO
SCLK
௮ຎ
1.8 Vຕጴۉᇸ
փথ
փথ
փথ
ຕ้ዓ
3.3 Vຕጴۉᇸ
݀ໃ๑ీă܋ڇ੨ఇ๕ူLj
ُᆅগᄺᆩፕIQSELECTă
܋੨2ຕD11 (MSB)
܋੨2ຕD10
܋੨2ຕD9
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD8
܋੨2ຕD7
܋੨2ຕD6
܋੨2ຕD5
܋੨2ຕD4
܋੨2ຕD3
܋੨2ຕD2
܋੨2ຕD1
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD0 (LSB)
փথ
փথ
փথ
փথ
1.8 Vຕጴۉᇸ
3.3 Vຕጴۉᇸ
ֶݴཞօ
ֶݴཞօ
ຕጴں
PLLۨኸ๖
ෙ၍๕থ੨܋੨ຕ
ෙ၍๕থ੨܋੨ຕ/
ෙ၍๕থ੨܋੨้ዓ
ᆅগ
Պࡽ
69
70
71
72
73
ᆅগఁ!
CSB
RESET
IRQ
AGND
IPTAT
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
VREF
I120
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
Rev. B | Page 11 of 56
௮ຎ
ෙ၍๕থ੨܋੨ೌ႑ࡽ
ް࿋Ljߛۉೝᆶၳ
ዐ൩൱
ఇెں
߾֪ᆅগă
ୁۉᇑਨܔ࿒ׯ܈Բ૩Lj
25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că
ُᆅগᆌԍޝă
एጚۉუ
120 μAएጚୁۉ
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
ఇెں
ཚڢ2ֶݴDACୁۉ
ཚڢ2ֶݴDACୁۉ
ఇెں
ཚڢ2ޤዺDACୁۉ
ཚڢ2ޤዺDACୁۉ
ఇెں
ཚڢ1ޤዺDACୁۉ
ཚڢ1ޤዺDACୁۉ
ఇెں
ཚڢ1ֶݴDACୁۉ
ཚڢ1ֶݴDACୁۉ
ఇెں
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
OUT2_P
AGND
OUT2_N
AUX2_P
AGND
AGND
AUX2_N
AUX1_P
AUX1_N
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
AD9776A/AD9778A/AD9779A
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
CVDD18
1
CVDD18
2
75
I120
74
CGND
3
VREF
73
CGND
IPTAT
4
72
AGND
REFCLK+
5
71
IRQ
REFCLK–
6
70
RESET
CGND
7
69
CSB
CGND
8
68
SCLK
CVDD18
9
AD9778A
67
SDIO
TOP VIEW
(Not to Scale)
66
SDO
65
PLL_LOCK
AGND 12
64
DGND
SYNC_I+ 13
63
SYNC_O+
SYNC_I– 14
62
SYNC_O–
DGND 15
61
DVDD33
DVDD18 16
60
DVDD18
P1D13 17
59
NC
P1D12 18
58
NC
P1D11 19
57
P2D0
P1D10 20
56
P2D1
P1D9 21
55
P2D2
DGND 22
54
DGND
DVDD18 23
53
DVDD18
P1D8 24
52
P2D3
P1D7 25
51
P2D4
PIN 1
ANALOG DOMAIN
DIGITAL DOMAIN
CVDD18 10
CGND 11
P2D6
P2D5
P2D7
P2D8
P2D9
P2D10
DGND
P2D11
DVDD18
P2D13
DVDD33
P2D12
06452-003
NOTES
1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED
PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR
THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE.
TXENABLE/IQSELECT
DATACLK
NC
NC
P1D0
DVDD18
DGND
P1D1
P1D2
P1D3
P1D4
P1D5
P1D6
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
NC = NO CONNECT
4. AD9778Aᆅগದዃ
8. AD9778Aᆅগࠀీ௮ຎ
ᆅগ
Պࡽ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ᆅগఁ!
CVDD18
CVDD18
CGND
CGND
REFCLK+
REFCLK−
CGND
CGND
CVDD18
CVDD18
CGND
AGND
SYNC_I+
SYNC_I−
DGND
DVDD18
P1D13
P1D12
௮ຎ
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
้ዓں
ֶ้ݴዓ
ֶ้ݴዓ
้ዓں
้ዓں
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
ఇెں
ֶݴཞօ
ֶݴཞօ
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD13 (MSB)
܋੨1ຕD12
ᆅগ
Պࡽ
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Rev. B | Page 12 of 56
ᆅগఁ!
P1D11
P1D10
P1D9
DGND
DVDD18
P1D8
P1D7
P1D6
P1D5
P1D4
P1D3
P1D2
P1D1
DGND
DVDD18
P1D0
NC
NC
௮ຎ
܋੨1ຕD11
܋੨1ຕD10
܋੨1ຕD9
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD8
܋੨1ຕD7
܋੨1ຕD6
܋੨1ຕD5
܋੨1ຕD4
܋੨1ຕD3
܋੨1ຕD2
܋੨1ຕD1
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD0 (LSB)
փথ
փথ
AD9776A/AD9778A/AD9779A
ᆅগ
Պࡽ
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
ᆅগఁ!
௮ຎ
DATACLK
ຕ้ዓ
3.3 Vຕጴۉᇸ
݀ໃ๑ీă܋ڇ੨ఇ๕ူLj
ُᆅগᄺᆩፕIQSELECTă
܋੨2ຕD13 (MSB)
܋੨2ຕD12
܋੨2ຕD11
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD10
܋੨2ຕD9
܋੨2ຕD8
܋੨2ຕD7
܋੨2ຕD6
܋੨2ຕD5
܋੨2ຕD4
܋੨2ຕD3
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD2
܋੨2ຕD1
܋੨2ຕD0 (LSB)
փথ
փথ
1.8 Vຕጴۉᇸ
3.3 Vຕጴۉᇸ
ֶݴཞօ
ֶݴཞօ
ຕጴں
PLLۨኸ๖
ෙ၍๕থ੨܋੨ຕ
ෙ၍๕থ੨܋੨ຕ/
ෙ၍๕থ੨܋੨้ዓ
ෙ၍๕থ੨܋੨ೌ႑ࡽ
ް࿋Ljߛۉೝᆶၳ
DVDD33
TXENABLE/
IQSELECT
P2D13
P2D12
P2D11
DVDD18
DGND
P2D10
P2D9
P2D8
P2D7
P2D6
P2D5
P2D4
P2D3
DVDD18
DGND
P2D2
P2D1
P2D0
NC
NC
DVDD18
DVDD33
SYNC_O−
SYNC_O+
DGND
PLL_LOCK
SDO
SDIO
SCLK
CSB
RESET
ᆅগ
Պࡽ
71
72
73
ᆅগఁ!
IRQ
AGND
IPTAT
௮ຎ
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
VREF
I120
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
एጚۉუ
120 μAएጚୁۉ
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
ఇెں
ཚڢ2ֶݴDACୁۉ
ཚڢ2ֶݴDACୁۉ
ఇెں
ཚڢ2ޤዺDACୁۉ
ཚڢ2ޤዺDACୁۉ
ఇెں
ཚڢ1ޤዺDACୁۉ
ཚڢ1ޤዺDACୁۉ
ఇెں
ཚڢ1ֶݴDACୁۉ
ཚڢ1ֶݴDACୁۉ
ఇెں
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
Rev. B | Page 13 of 56
ዐ൩൱
ఇెں
߾֪ᆅগă
ୁۉᇑਨܔ࿒ׯ܈Բ૩Lj
25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că
ُᆅগᆌԍޝă
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AGND
AVDD33
AVDD33
AGND
AVDD33
AD9776A/AD9778A/AD9779A
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
CVDD18
1
CVDD18
2
75
I120
74
CGND
3
VREF
73
CGND
IPTAT
4
72
AGND
REFCLK+
5
71
IRQ
REFCLK–
6
70
RESET
CGND
7
69
CSB
CGND
8
68
SCLK
CVDD18
9
AD9779A
67
SDIO
TOP VIEW
(Not to Scale)
66
SDO
65
PLL_LOCK
AGND 12
64
DGND
SYNC_I+ 13
63
SYNC_O+
SYNC_I– 14
62
SYNC_O–
DGND 15
61
DVDD33
DVDD18 16
60
DVDD18
P1D15 17
59
P2D0
P1D14 18
58
P2D1
P1D13 19
57
P2D2
P1D12 20
56
P2D3
P1D11 21
55
P2D4
DGND 22
54
DGND
DVDD18 23
53
DVDD18
P1D10 24
52
P2D5
P1D9 25
51
P2D6
PIN 1
ANALOG DOMAIN
DIGITAL DOMAIN
CVDD18 10
CGND 11
P2D7
P2D8
P2D9
P2D10
P2D11
P2D12
DGND
DVDD18
P2D13
P2D14
P2D15
06452-004
NOTES
1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED
PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR
THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE.
TXENABLE/IQSELECT
DVDD33
DATACLK
P1D0
P1D1
P1D2
DVDD18
P1D3
DGND
P1D4
P1D5
P1D6
P1D7
P1D8
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
5. AD9779Aᆅগದዃ
9. AD9779Aᆅগࠀీ௮ຎ
ᆅগ
Պࡽ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ᆅগఁ!
CVDD18
CVDD18
CGND
CGND
REFCLK+
REFCLK−
CGND
CGND
CVDD18
CVDD18
CGND
AGND
SYNC_I+
SYNC_I−
DGND
DVDD18
P1D15
P1D14
௮ຎ
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
้ዓں
ֶ้ݴዓ
ֶ้ݴዓ
้ዓں
้ዓں
1.8 V้ዓۉᇸ
1.8 V้ዓۉᇸ
้ዓں
ఇెں
ֶݴཞօ
ֶݴཞօ
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD15 (MSB)
܋੨1ຕD14
ᆅগ
Պࡽ
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Rev. B | Page 14 of 56
ᆅগఁ!
P1D13
P1D12
P1D11
DGND
DVDD18
P1D10
P1D9
P1D8
P1D7
P1D6
P1D5
P1D4
P1D3
DGND
DVDD18
P1D2
P1D1
P1D0
௮ຎ
܋੨1ຕD13
܋੨1ຕD12
܋੨1ຕD11
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD10
܋੨1ຕD9
܋੨1ຕD8
܋੨1ຕD7
܋੨1ຕD6
܋੨1ຕD5
܋੨1ຕD4
܋੨1ຕD3
ຕጴں
1.8 Vຕጴۉᇸ
܋੨1ຕD2
܋੨1ຕD1
܋੨1ຕD0 (LSB)
AD9776A/AD9778A/AD9779A
ᆅগ
Պࡽ
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
ᆅগఁ!
௮ຎ
DATACLK
ຕ้ዓ
3.3 Vຕጴۉᇸ
݀ໃ๑ీă܋ڇ੨ఇ๕ူLj
ُᆅগᄺᆩፕIQSELECTă
܋੨2ຕD15 (MSB)
܋੨2ຕD14
܋੨2ຕD13
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD12
܋੨2ຕD11
܋੨2ຕD10
܋੨2ຕD9
܋੨2ຕD8
܋੨2ຕD7
܋੨2ຕD6
܋੨2ຕD5
1.8 Vຕጴۉᇸ
ຕጴں
܋੨2ຕD4
܋੨2ຕD3
܋੨2ຕD2
܋੨2ຕD1
܋੨2ຕD0 (LSB)
1.8 Vຕጴۉᇸ
3.3 Vຕጴۉᇸ
ֶݴཞօ
ֶݴཞօ
ຕጴں
PLLۨኸ๖
ෙ၍๕থ੨܋੨ຕ
ෙ၍๕থ੨܋੨ຕ/
ෙ၍๕থ੨܋੨้ዓ
ෙ၍๕থ੨܋੨ೌ႑ࡽ
ް࿋Ljߛۉೝᆶၳ
DVDD33
TXENABLE/
IQSELECT
P2D15
P2D14
P2D13
DVDD18
DGND
P2D12
P2D11
P2D10
P2D9
P2D8
P2D7
P2D6
P2D5
DVDD18
DGND
P2D4
P2D3
P2D2
P2D1
P2D0
DVDD18
DVDD33
SYNC_O−
SYNC_O+
DGND
PLL_LOCK
SDO
SDIO
SCLK
CSB
RESET
ᆅগ
Պࡽ
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Rev. B | Page 15 of 56
ᆅগఁ!
IRQ
AGND
IPTAT
VREF
I120
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
௮ຎ
ዐ൩൱
ఇెں
߾֪ᆅগăୁۉᇑਨܔ࿒ׯ܈Բ૩Lj
25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că
ُᆅগᆌԍޝă
एጚۉუ
120 μAएጚୁۉ
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
ఇెں
ཚڢ2ֶݴDACୁۉ
ཚڢ2ֶݴDACୁۉ
ఇెں
ཚڢ2ޤዺDACୁۉ
ཚڢ2ޤዺDACୁۉ
ఇెں
ཚڢ1ޤዺDACୁۉ
ཚڢ1ޤዺDACୁۉ
ఇెں
ཚڢ1ֶݴDACୁۉ
ཚڢ1ֶݴDACୁۉ
ఇెں
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
ఇెں
3.3 Vఇెۉᇸ
AD9776A/AD9778A/AD9779A
ۆ႙߾ፕ༬Ⴀ
100
4
3
fDATA = 160MSPS
90
2
fDATA = 200MSPS
SFDR (dBc)
INL (16-BIT LSB)
1
0
–1
–2
80
70
fDATA = 250MSPS
–3
60
–4
–5
10k
20k
30k
50k
40k
60k
50
CODE
0
20
40
60
80
100
fOUT (MHz)
06452-008
0
06452-005
–6
9. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
2×֭ኵ
6. AD9779Aۆ႙INL
100
1.5
fDATA = 200MSPS
fDATA = 100MSPS
1.0
90
SFDR (dBc)
DNL (16-BIT LSB)
0.5
0
–0.5
80
fDATA = 150MSPS
70
–1.0
60
–1.5
20k
30k
40k
50k
60k
50
CODE
0
20
40
60
100
50
fOUT (MHz)
7. AD9779Aۆ႙DNL
10. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
4×֭ኵ
100
100
fDATA = 100MSPS
fDATA = 50MSPS
90
80
06452-009
10k
06452-010
0
06452-006
–2.0
90
fDATA = 160MSPS
SFDR (dBc)
80
fDATA = 200MSPS
70
60
80
fDATA = 125MSPS
70
60
50
50
0
20
40
60
80
fOUT (MHz)
100
06452-007
SFDR (dBc)
fDATA = 250MSPS
0
10
20
30
40
fOUT (MHz)
11. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
8×֭ኵ
8. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj1×֭ኵ
Rev. B | Page 16 of 56
AD9776A/AD9778A/AD9779A
100
100
90
90
PLL OFF
PLL ON
SFDR (dBc)
fDATA = 200MSPS
70
fDATA = 250MSPS
60
80
70
60
50
50
20
40
60
80
100
fOUT (MHz)
0
06452-011
0
10
20
30
40
fOUT (MHz)
06452-014
SFDR (dBc)
fDATA = 160MSPS
80
15. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
4×֭ኵLjfDATA = 100 MSPSLjPLLਸ/࠲
12. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj
2×֭ኵ
100
100
0dBFS
–3dBFS
90
SFDR (dBc)
SFDR (dBc)
90
80
fDATA = 150MSPS
70
80
–6dBFS
70
fDATA = 100MSPS
60
60
fDATA = 200MSPS
40
60
80
100
fOUT (MHz)
0
06452-012
20
20
40
60
80
06452-015
50
0
80
06452-016
50
fOUT (MHz)
13. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj
4×֭ኵ
16. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
ຕጴଉײ
100
100
10mA
90
90
SFDR (dBc)
fDATA = 50MSPS
80
fDATA = 100MSPS
70
80
70
30mA
fDATA = 125MSPS
60
60
50
50
0
10
20
30
40
fOUT (MHz)
50
06452-013
SFDR (dBc)
20mA
0
20
40
60
fOUT (MHz)
17. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj
ଉୁۉײ
14. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj
8×֭ኵ
Rev. B | Page 17 of 56
AD9776A/AD9778A/AD9779A
100
100
fDATA = 160MSPS
fDATA = 200MSPS
90
fDATA = 250MSPS
80
IMD (dBc)
IMD (dBc)
90
70
80
fDATA = 75MSPS
70
fDATA = 100MSPS
fDATA = 50MSPS
60
450
425
400
375
350
325
300
200
175
150
125
75
fOUT (MHz)
06452-020
fOUT (MHz)
100
120
100
50
80
0
60
25
40
06452-017
20
275
fDATA = 125MSPS
50
0
250
50
225
60
21. AD9779AෙIMDᇑfOUT ࠲ڦဣLj
8×֭ኵ
18. AD9779AෙIMDᇑfOUT ࠲ڦဣLj
1×֭ኵ
100
100
90
90
80
80
IMD (dBc)
IMD (dBc)
fDATA = 160MSPS
fDATA = 200MSPS
70
PLL OFF
70
PLL ON
fDATA = 250MSPS
60
60
40
60
80
100 120 140
160 180 200
220
fOUT (MHz)
0
20
40
60
80
100
120
140
160
180
200
06452-021
20
06452-018
0
360
400
06452-022
50
50
fOUT (MHz)
22. AD9779AෙIMDᇑfOUT ࠲ڦဣLj
4×֭ኵLjfDAT A = 100 MSPSLjPLLਸ/࠲
19. AD9779AෙIMDᇑfOUT ࠲ڦဣLj
2×֭ኵ
100
100
95
90
90
IMD (dBc)
fDATA = 150MSPS
70
80
75
70
fDATA = 100MSPS
65
60
60
fDATA = 200MSPS
55
50
50
0
40
80
120
160
200
240
280
320
fOUT (MHz)
360
400
06452-019
IMD (dBc)
85
80
0
40
80
120
160
200
240
280
320
fOUT (MHz)
23. AD9779AෙIMDᇑfOUT ࠲ڦဣLj50߲ᅜฉഗॲLj
4×֭ኵLjfDATA = 200 MSPS
20. AD9779AෙIMDᇑfOUT ࠲ڦဣLj
4×֭ኵ
Rev. B | Page 18 of 56
AD9776A/AD9778A/AD9779A
100
*ATTEN 20dB
REF 0dBm
*PEAK
Log
10dB
95
EXT REF
DC-COUPLED
90
0dBFS
IMD (dBc)
85
–3dBFS
80
75
LGAV
51
W1 S2
S3 FC
AA
£(f):
FTUN
SWP
–6dBFS
70
65
60
55
40
80
120
160
200
240
280
320
360
400
fOUT (MHz)
START 1.0MHz
*RES BW 20kHz
24. AD9779A IMDႠీᇑfOUT ࠲ڦဣLj
ຕጴଉײ)ೕ୲*ాྷݔLj
4×֭ኵLjfDATA = 200 MSPS
STOP 400.0MHz
SWEEP 1.203s (601 pts)
VBW 20kHz
06452-024
0
06452-117
50
27. AD9779AມᅼೕLj4×֭ኵLj
fDATA = 100 MSPSLjfOUT = 30 MHzĂ35 MHz
100
–142
95
–146
90
20mA
85
–150
NSD (dBm/Hz)
IMD (dBc)
10mA
80
75
30mA
70
65
–3dBFS
–154
0dBFS
–158
–6dBFS
–162
60
–166
55
–170
40
80
120
160
200
240
280
320
360
400
fOUT (MHz)
0
06452-118
0
40
60
80
fOUT (MHz)
28. AD9779Aሯำ܈ᇑfOUT࠲ڦဣLjຕጴଉײ
)ೕ୲*ాྷݔLjڇᅼLj2×֭ኵLjfDATA = 200 MSPS
25. AD9779A IMDႠీᇑfOUT ࠲ڦဣLjଉײୁۉ
(ೕ୲)ాྷݔLj4×֭ኵLjfDATA = 200 MSPS
*ATTEN 20dB
REF 0dBm
*PEAK
log
10dB
20
06452-025
50
–150
EXT REF
DC-COUPLED
–154
NSD (dBm/Hz)
fDAC = 400MSPS
LGAV
51
W1 S2
S3 FC
AA
£(f):
FTUN
SWP
fDAC = 200MSPS
–158
–162
fDAC = 800MSPS
–166
26. AD9779AڇᅼೕLj
4×֭ኵLjfDATA = 100 MSPSLjfOUT = 30 MHz
0
20
40
60
fOUT (MHz)
80
100
06452-026
VBW 20kHz
STOP 400.0MHz
SWEEP 1.203s (601 pts)
06452-023
–170
START 1.0MHz
*RES BW 20kHz
29. AD9779Aሯำ܈ᇑfOUT ࠲ڦဣLjfDAC (ೕ୲)ాྷݔLj
क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS
Rev. B | Page 19 of 56
AD9776A/AD9778A/AD9779A
–150
–55
–60
–154
–158
ACLR (dBc)
NSD (dBm/Hz)
–65
fDAC = 200MSPS
fDAC = 400MSPS
–162
fDAC = 800MSPS
0dBFS, PLL ENABLED
–70
–6dBFS, PLL DISABLED
–75
–80
–166
–85
–170
0dBFS, PLL DISABLED
–3dBFS, PLL DISABLED
40
60
100
80
0
06452-027
20
fOUT (MHz)
20
40
60
80 100 120 140 160 180 200 220 240 260
fOUT (MHz)
30. AD9779Aሯำ܈ᇑfOUT ࠲ڦဣLj
fDAC (ೕ୲)ాྷݔLj−6 dBFSڇᅼ
06452-301
–90
0
33. AD9779Aܾڼ၎ତೕW-CDMAڦACLRLj4×֭ኵLj
fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF
–55
–55
–60
–60
0dBFS, PLL ENABLED
–65
0dBFS, PLL DISABLED
ACLR (dBc)
ACLR (dBc)
–65
–70
–75
–70
–6dBFS, PLL DISABLED
–75
0dBFS, PLL ENABLED
–3dBFS, PLL DISABLED
–80
–80
–6dBFS, PLL DISABLED
–85
–85
–90
–3dBFS, PLL DISABLED
0dBFS, PLL DISABLED
40
60
80 100 120 140 160 180 200 220 240 260
fOUT (MHz)
20
40
60
80 100 120 140 160 180 200 220 240 260
fOUT (MHz)
34. AD9779Aڼෙ၎ତೕW-CDMAڦACLRLj4×֭ኵLj
fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF
31. AD9779Aڼᅃ၎ତೕW-CDMAڦACLRLj4×֭ኵLj
fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF
REF –25.28dBm
*AVG
log
10dB
0
06452-300
20
06452-302
–90
0
*ATTEN 4dB
REF –30.28dBm
*AVG
log
10dB
*ATTEN 4dB
EXT REF
EXT REF
PAVG
10
W1 S2
VBW 300kHz
RMS RESULTS FREQ OFFSET REF BW
CARRIER POWER 5.000MHz
10.00MHz
–12.49dBm/
15.00MHz
3.84000MHz
3.840MHz
3.840MHz
3.840MHz
CENTER 151.38MHz
*RES BW 30kHz
SPAN 50MHz
SWEEP 162.2ms (601 pts)
LOWER
dBm
dBc
–76.75 –89.23
–80.94 –93.43
–79.95 –92.44
UPPER
dBm
dBc
–77.42 –89.91
–80.47 –92.96
–78.96 –91.45
VBW 300kHz
TOTAL CARRIER POWER –12.61dBm/15.3600MHz
REF CARRIER POWER –17.87dBm/3.84000MHz
06452-031
CENTER 143.88MHz
*RES BW 30kHz
1 –17.87dBm
2 –20.65dBm
3 –18.26dBm
4 –18.23dBm
32. AD9779A W-CDMA႑ࡽLj4×֭ኵLj
fDATA = 122.88 MSPSLjfDAC /4ۙ
FREQ OFFSET
5.000MHz
10.00MHz
15.00MHz
INTEG BW
3.840MHz
3.840MHz
3.840MHz
SPAN 50MHz
SWEEP 162.2ms (601 pts)
LOWER
dBm
dBc
–67.70 –85.57
–70.00 –97.87
–71.65 –99.52
UPPER
dBm
dBc
–67.70 –85.57
–69.32 –87.19
–71.00 –88.88
35. AD9779AܠሜհW-CDMA႑ࡽLj
4×֭ኵLjfDAC = 122.88 MSPSLjfDAC /4ۙ
Rev. B | Page 20 of 56
06452-032
PAVG
10
W1 S2
AD9776A/AD9778A/AD9779A
100
1.5
1.0
90
0.5
SFDR (dBc)
INL (14-BIT LSB)
fDATA = 200MSPS
fDATA = 160MSPS
0
80
fDATA = 250MSPS
70
–0.5
60
–1.0
4k
6k
8k
10k
CODE
0
20
40
60
100
80
06452-036
2k
0
06452-033
50
–1.5
fOUT (MHz)
36. AD9778Aۆ႙INL
4:/!BE:889BాټTGESᇑgPVU ࠲ڦဣLj
3ġ֭ኵ
0.6
0.4
–60
0
ACLR (dBc)
DNL (14-BIT LSB)
0.2
–0.2
–70
FIRST ADJACENT CHANNEL
THIRD ADJACENT
CHANNEL
–0.4
–80
–0.6
SECOND ADJACENT
CHANNEL
–0.8
–90
4k
6k
8k
10k
12k
14k
16k
CODE
0
37. AD9778Aۆ႙DNL
25
50
75
100
125
150
175
200
225
250
06452-037
2k
0
06452-034
–1.0
fOUT (MHz)
40. AD9778A ACLRLjڇሜհW-CDMA႑ࡽLj4×֭ኵLj
fDATA = 122.88 MSPSLjޗኵ = −3 dBFS
REF –25.39dBm
*AVG
log
10dB
100
*ATTEN 4dB
90
80
4× 200MSPS
70
4× 100MSPS
PAVG
10
W1 S2
CENTER 143.88MHz
*RES BW 30kHz
50
0
40
80
120
160
200
240
280
320
fOUT (MHz)
360
400
VBW 300kHz
RMS RESULTS FREQ OFFSET REF BW
CARRIER POWER 5.000MHz
–12.74dBm/
10.00MHz
3.84000MHz
15.00MHz
3.884MHz
3.840MHz
3.840MHz
SPAN 50MHz
SWEEP 162.2ms (601 pts)
LOWER
dBc
dBm
–76.49 –89.23
–80.13 –92.87
–80.90 –93.64
UPPER
dBc
dBm
–76.89 –89.63
–80.02 –92.76
–79.53 –92.27
41. AD9778A ACLRLjfDATA = 122.88 MSPSLj
4×֭ኵLjfDAC /4ۙ
38. AD9778A IMDᇑfOUT ࠲ڦဣLj
4×֭ኵ
Rev. B | Page 21 of 56
06452-038
60
06452-035
IMD (dBc)
4× 150MSPS
AD9776A/AD9778A/AD9779A
–150
0.20
0.15
–154
0.10
–158
DNL (12-BIT LSB)
NSD (dBm/Hz)
fDAC = 200MSPS
fDAC = 400MSPS
–162
fDAC = 800MSPS
0.05
0
–0.05
–0.10
–166
–170
–0.20
20
40
60
100
80
fOUT (MHz)
0
06452-039
0
512
1024
1536
2048
2560
3072
3584
4096
CODE
42. AD9778Aሯำ܈ᇑfOUT ࠲ڦဣLj
क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS
06452-042
–0.15
45. AD9776Aۆ႙DNL
–150
100
95
90
–154
85
fDAC = 400MSPS
–162
fDAC = 800MSPS
80
75
4× 100MSPS
4× 200MSPS
70
65
60
–170
50
4× 150MSPS
55
20
40
60
100
80
fOUT (MHz)
0
06452-040
0
40
80
120
160
200
240
280
320
360
400
06452-043
–166
100
06452-044
–158
IMD (dBc)
NSD (dBm/Hz)
fDAC = 200MSPS
fOUT (MHz)
54/!BE:889Bሯำ܈ᇑgPVU ࠲ڦဣLj
−7!eCGTڇᅼLjgEBUB !>!311!NTQT
46. AD9776A IMDᇑfOUT ࠲ڦဣLj
4×֭ኵ
100
0.4
0.3
90
SFDR (dBc)
fDATA = 160MSPS
0.1
0
80
fDATA = 250MSPS
70
fDATA = 200MSPS
–0.1
–0.2
60
–0.3
50
–0.4
0
512
1024
1536
2048
2560
3072
CODE
3584
4096
06452-041
INL (12-BIT LSB)
0.2
0
20
40
60
80
fOUT (MHz)
47. AD9776AాټSFDRᇑfOUT ࠲ڦဣLj
2×֭ኵ
Figure 44. AD9776A Typical INL
44. AD9776Aۆ႙INL
Rev. B | Page 22 of 56
AD9776A/AD9778A/AD9779A
–55
–150
fDAC = 200MSPS
–60
–154
fDAC = 400MSPS
–65
–70
NSD (dBm/Hz)
ACLR (dBc)
FIRST ADJACENT CHANNEL
THIRD ADJACENT
CHANNEL
–75
–158
fDAC = 800MSPS
–162
–80
SECOND ADJACENT
CHANNEL
–166
–85
–90
75
100
125
150
175
200
225
250
FOUT (MHz)
0
20
30
40
50
60
70
80
90
100
100
fOUT (MHz)
48. AD9776A ACLRᇑfOUT ࠲ڦဣLjfDATA = 122.88 MSPSLj
4×֭ኵLjfDAC /4ۙ
REF –25.29dBm
*AVG
log
10dB
10
06452-047
50
06452-048
25
06452-045
–170
0
50. AD9776Aሯำ܈ᇑfOUT ࠲ڦဣLj
क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS
*ATTEN 4dB
–150
fDAC = 200MSPS
fDAC = 400MSPS
NSD (dBm/Hz)
–154
–158
fDAC = 800MSPS
–162
–166
PAVG
10
W1 S2
VBW 300kHz
RMS RESULTS FREQ OFFSET REF BW
CARRIER POWER 5.000MHz
10.00MHz
–12.67dBm/
15.00MHz
3.84000MHz
3.884MHz
3.840MHz
3.840MHz
SPAN 50MHz
SWEEP 162.2ms (601 pts)
LOWER
dBm
dBc
–75.00 –87.67
–78.05 –90.73
–77.73 –90.41
UPPER
dBm
dBc
–75.30 –87.97
–77.99 –90.66
–77.50 –90.17
–170
0
10
20
30
40
50
60
70
80
90
fOUT (MHz)
06452-046
CENTER 143.88MHz
*RES BW 30kHz
51. AD9776Aሯำ܈ᇑfOUT ࠲ڦဣLj
−6 dBFSڇᅼLjfDATA = 200 MSPS
49. AD9776AڇሜհW-CDMA႑ࡽLj4×֭ኵLj
fDATA = 122.88 MSPSLjޗኵ = −3 dBFS
Rev. B | Page 23 of 56
AD9776A/AD9778A/AD9779A
ຍᇕ
ओݥݴ၍Ⴀ(INL)
ాټሗොۯༀ(ྷݔSFDR)
INLۨᅭྺํाఇెᇑၙڦፌٷೋֶLjၙ
ᆯٗଭۉೝڟଉײࣃڦ၍ඓۨă
ాټSFDRኸ႑ࡽރڦኵ܈ޗᇑރኵሗො႑ࡽኮֶLjᆩ
ݴԞ๖Ǘރኵሗො႑ࡽ࿋ᇀୁࢅຕ୲ᅃӷ
ڦೕ୲ኮक़ă
ྲݥݴ၍Ⴀ(DNL)
DNL࢚ଉڦຕጴஓ߀Վ1 LSB้ఇెኵ)ࡃᅃࣅྺ
ଉڦ*ײՎࣅă
ۙڇႠ
සࡕᅃ߲DACڦໜጣຕጴڦሺेܸሺेLjईኁԍ
փՎLjሶDACڦۙڇă
฿ۙဃֶ
ஓ0้ڦୁۉᇑၙ0ኵڦೋֶྺ฿ۙဃֶăܔᇀ
IOUTALjړྺඇ0้Ljྭྺ0 mAăܔᇀIOUTBLjړ
ྺඇ1้Ljྭྺ0 mAă
ሺᅮဃֶ
ሺᅮဃֶኸํाྷݔᇑၙྷݔኮֶLjํाྷݔ
ᆯਗ਼܈ᇑڹևਗ਼܈ኮֶඓۨă
ۉუ!ྷݔ
ۉუྷݔኸୁۉDAC܋ඹႹۉუྷݔڦăג
ፌٷ၌ኵ߾ፕీࣷᆅഐपԏࢅईऍحLjڞዂݥ၍
ႠႠీă
࿒܈ᅎ!
࿒܈ᅎ࢚ଉڦ࣍ৣ࿒(܈25°C)ኵᇑTMINईTMAXኵኮक़ڦ
ፌٷՎࣅྷݔă฿ۙࢅሺᅮᅎᆩฝ܈ଉྷݔײ
(FSR)ڦppm๖Ǘएጚۉუᅎᆩฝ܈ppm๖ă
ۉᇸᅞ(PSR)
PSR࢚ଉڦۉᇸٗፌၭۉۨܮუՎྺፌۉۨܮٷუ้Lj
ଉײڦፌٷՎࣅă
ॺ૬้क़!
ॺ૬้क़ኸڟٳժԍሞፌዕኵᅃۨဃֶాྷݔႴ
้ڦक़Ljٗገ࣑ਸ๔ഐ֪ଉă
ྔټሗොۯༀ(ྷݔSFDR)
ྔټSFDRኸ႑ࡽރڦኵ܈ޗᇑރኵሗො႑ࡽኮֶLjᆩ
ݴԞ๖Ǘރኵሗො႑ࡽ࿋ᇀຕ୲ڦೕ୲
DAC֑ᄣ୲ڦలઊຯ༬ೕ୲ڦೕྷݔኮాăُೕ
ాీڦଉᅃӯࣷԥ֭ኵ୳հഗᅞăᅺُLj༬Ⴀ࢚ଉ
ڦ֭ኵ୳հഗڦ၄ࡻ࣋ᅜतDACڦ܋ഄसิ
᳘ࢇୟ০ڦᆖၚă
ጺၿհ฿ኈ(THD)
THDኸമୃ߲ၿհڦݴׯࢅߵݛᇑ֪ڥएհڦߵݛ
ኵኮԲLjᆩӥݴԲईݴԞ๖ă
႑ሯԲ(SNR)
SNRኸ֪ڥ႑ࡽڦߵݛኵᇑأമୃ߲ၿհࢅୁ
ኮྔڦᆶೕݴଉڦࢅߵݛኮԲLjᆩݴԞ๖ă
֭ኵ୳հഗ!
සࡕᅜfDATAڦԠ୲)֭ኵ୲*ܔDACڦຕጴႜ֑ᄣLj
ሶᅜࠓॺᅃ߲ሞf DATA /2ৎਏᆶࡗڦټ܉ຕጴ୳հ
ഗăኄᄣᅜٷٷᅞཚ࿋ᇀfDAC)ຕ୲*ৎڦ
ၟă
ତڢႅԲ(ACLR)
ACLRኸᅃ߲ཚ֪ڦాڢଉࠀ୲ᇑഄ၎ତཚ֪ڦాڢଉࠀ
୲ኮԲLjᆩdBc๖ă
ްຕၟᅞ!
ሞدཥڦଇฉՎೕዐLj੍ৎܾڼዐೕೕ୲ׂࣷิଇ߲
ၟăኄၵၟࣷሰ݀ׯพഗࠀ୲ࢅဣཥڦټષݯăॽڼ
ܾްຕۙഗํڦևᇑڼᅃްຕۙഗزLjՍᅜᅞ
ܾڼዐೕৎڦডߛईডگೕ୲ၟă
Rev. B | Page 24 of 56
AD9776A/AD9778A/AD9779A
߾ፕᇱ
AD9776A/AD9778A/AD9779AਏᆶႹܠ༬ႠLjݥࢇᆶ
၍ࢅ၍ཚ႑ဣཥăยऺڇՉ݀ټพഗ้Ljഄມୟຕጴ႑
ࡽୟ০ࢅມཚڢDACࠓඹᅟᇑཚኟۙഗথ੨ă
ᇑᅜമ༵ࠃڦDAC၎ԲLjኄၵഗॲڦࢅ܈Ⴀీኧߛ߸
ټڦत߸ܠሜհׯࢇڦăຕጴᆅ֑ᆩण֭ኵ୳հഗࢅ
ຕጴኟۙഗᇀᅃ༹ظڦႎ୳հഗࠓLjᅺܸኄၵഗॲ
ీࠕኴႜຕጴኟฉՎೕă૧ᆩೌాཞօۉୟLj߲ܠഗॲ
ᅜԵُཞօLjईኁᇑဣཥ้ዓཞօă
AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/
AD9779Aڦ൶՚
REFCLKፌٷೕ୲ᇑۉᇸ࠲ڦဣ
AD9776A/AD9778A/AD9779Aኧፌٷ1100 MHz֑ڦᄣ
୲LjܔڍDVDD18ࢅCVDD18ᆶᅃၵ၌ă2ଚକ߳ۉ
ᇸۉუܔᆌڦᆶၳ߾ፕೕ୲ă
REFCLKޗኵ
ॽᅃֶ߲ݴኟ၀้ዓแेᇀREFCLK้LjAD9776/AD9778/
AD9779ฉڦPLL݆ํ၄ፌॅሯำႠీLjॽݥأREFCLK
ֶޗݴኵ༵ߛڟ2 Vރރኵă൩ጀᅪLjසࡕAD9776/AD9778
/AD9779๑ ᆩ LVPECLൻ ۯഗ Lj ሶ ړREFCLK ޗኵ ሞ
LVPECLۨܮኵ100 kΩ)ă
నᅃ߲ᆅগᆶၳLjൽਦᇀܔस٪ഗ0x0Eࢅ0x12ڦ࿋7
ႀڦኵă
0mA TO 2mA
(SOURCE)
AD9776A/AD9778A/AD9779Aీࠕၩأᆶኄၵփ૧ᆖ
ၚă൩ጀᅪLjኄၵᆖၚࣷໜጣ࿒ܸ܈ᅎǗᅺُLjසࡕထ
ྭํ၄ৎࢭፌॅڇڦՉټႠీLjీႴᄲॠ֪ኄၵᆖၚໜ
࿒ڦ܈ՎࣅLjժᇎᅜၯኟă
AUXP
VBIAS
0mA TO 2mA
(SINK)
AUXN
P/N
SOURCE/
SINC
I/Qཚڢሺᅮದ
ሺᅮದཚࡗۙኝDACሺᅮस٪ഗڦኵܸํ၄ăܔᇀI
DACLjኄၵኵ࿋ᇀ0x0Bࢅ0x0C I DAC੦स٪ഗዐăܔᇀ
Q DACLjኄၵኵ࿋ᇀ0x0Fࢅ0x10 Q DAC੦स٪ഗዐăኄ
ၵኵᆶ10࿋ăኴႜሺᅮց้LjӀቷࠦۨڦօޗሺٷई३
ၭഄዐᅃ߲स٪ഗڦኵLjࢫ֪ଉ߅ඡၟޗڦኵăසࡕ
߅ඡၟޗڦኵሺٷLjሶᆌཕኹLjገܸܔଷᅃ߲DAC੦
स٪ഗཞᄣۙڦኝLjڟ݆ཚࡗۙኝኄၵस٪ഗ๑
ၟᅞڟڥᅃօ߀ྺኹă
ᆌړጀᅪLjLOઍཚց܀૬ᇀሺᅮăփࡗLjሺᅮցీ
ࣷᆖၚLOցLjᅺྺሺᅮցీࣷ߀Վ႑ࡽࠌڦఇۉ
ೝăగၵۙഗڦୁ฿ۙᇑࠌఇۉೝ၎࠲ăᅺُLjॺᅱ
ሺᅮۙኝံᇀLOցኴႜă
ޤዺDAC֡ፕ
AD9776A/AD9778A/AD9779A༵ࠃକଇ߲ޤዺDACăኄၵ
DACڦଉײୁۉᆯ1.2 VټဤएጚۉუᇸࢅI120ᆅ
গᇑںኮक़ྔڦևۉፆਦۨăޤړዺDACሺᅮยዃྺଉ
)้ײ10࿋ኵLjෙ၍๕থ੨स٪ഗ0x0Dࢅ0x11*Ljٗएጚۉ
უٷݣഗ(ୁۉIREFERENCE)ޤڟዺDACएጚڦୁۉሺᅮԲ૩ྺ
16.67ăኄ๑ޤڥዺDAC1ࢅޤዺDAC2ڦଉୁۉײሀྺ
2 mAă
06452-303
૧ᆩఇెኟۙഗLjݥඹᅟํ၄ڇՉټ၍ۉăփ
ࡗLjኟۙഗᆶ߲ܠইگఇెႠీݥڦၙ༬ႠLjഄዐ
Ԉઔǖ
78. AD9776A/AD9778A/AD97779AޤڦዺDACᇸୁۉ/ဌୁۉ
ޤዺDAC1ޗୁۉڦኵᆯ0x0Dࢅ0x0EޤዺDAC1੦स٪ഗ
੦LjޤዺDAC2ޗୁۉڦኵᆯ0x11ࢅ0x12ޤዺDAC2੦
स٪ഗ੦ăኄၵޤዺDACీࠕ༵ࠃᇸୁۉईဌୁۉLjਏ
༹ᆯ߳ޤዺDAC੦स٪ഗڦ࿋6੦ă༵ࠃᇸୁۉई
ဌୁۉLjᆌሞۉୟยऺፔስăۉୟۨ႙ࢫLjሞۉ
ୁᇸࢅୁۉဌഗኮक़ൎ࣑ժᅮتă
ړDACࢫ܋থኟۙഗ้LjޤዺDACᅜᆩᇀLO
ڸၩăLOઍཚᆯኟۙഗڦ֖ୁ฿ۙۉუ
)ᅜतDAC฿ۙۉუ฿ದ*ᆅഐڦLjీࣷইگဣཥႠ
ీă
DACᇑኟۙഗۆڦ႙থ੨ස79๖ăۙഗڦ
ࠌఇۉუᅃӯᇺߛᇀDACڦۉუLjᅺُᆶՂᄲ๑ᆩ
ୁ᳘ࢇईୁۉೝገ࣑ăසࡕኟۙഗႴࠌڦఇ
ۉუᇑDACۉუದLjሶᅜ๑ᆩ79๖ڦୁݛ๕ă
ړኟۙഗ܋ઠጲDACڦሗො႑ࡽ)฿ኈࢅDAC
ၟ*ీᆖၚဣཥႠీ้Ljॺᅱ๑ᆩگཚईټཚ୳հഗăॽ
୳հഗݣሞ79๖࿋ዃᅜ०ࣅ୳հഗยऺLjᅺྺᇸፆ
ੇࢅሜፆੇඹᅟยऺྺথৎ50 Ωă
Rev. B | Page 44 of 56
AD9776A/AD9778A/AD9779A
ሺᅮࢅ฿ۙၯኟࡕ!
90
AUX1_P
AD9779A
500Ω
250Ω
93
OUT1_P
RBIP
50Ω
82pF
C1I
RBIN
92 50Ω
89
39pF
C2I
21
82pF
C3I
ሺᅮࢅ฿ۙၯኟڦࡕᅜٗ80ࢅ81ੂă80၂๖
କሺᅮࢅ฿ۙၯኟኮമኟۙഗڦೕă81၂๖
କၯኟኮࢫڦೕă2.1 GHzೕ୲ڦتLOઍཚᅙԥᅞ
ڟሯำೝăሏᆩၯኟᅜํ၄ࡕLjڍසࡕ࿒݀܈
ิডٷՎࣅLjሶႴᄲዘႎၯኟă
IBBP
RSLI
100Ω
22
OUT1_N
250Ω
LPI
390nH
LNI
390nH
IBBN
൩ጀᅪLjሺᅮದ߀କೕ୲ၟᅞLjڍධ٪ሞ
၂ڦၟăᇆၟઠᇸᇀኟۙഗڦ၎࿋฿ದă၎࿋
฿ದᇑሺᅮ฿ದᅜཚࡗၟڦႚጒઠ൶ݴăጀᅪ80ዐ
ڦၟ၎ܔডೝ།Lj81ዐڦၟሶໜೕ୲ሺेܸူইă
၎࿋฿ದᇑೕ୲၎࠲Ljᅺُ၎࿋฿ದዷڦڞၟਏᆶኄ
ዖൡၽ༬ኙă
AUX1_N
500Ω
87
AUX2_N
250Ω
84
LNQ
390nH
RBQN
50Ω
82pF
C1Q
9
RBQP
83 50Ω
250Ω
82pF
C3Q
LPQ
390nH
QBBN
RSLQ
100Ω
10
OUT2_P
86
39pF
C2Q
QBBP
AUX2_P
500Ω
0
06452-093
500Ω
OUT2_N
REF LVL
0dBm
RBW
VBW
SWT
3kHz
3kHz
56s
REF ATT
MIXER
UNIT
30dB
–40dBm
dBm
–10
–20
–30
79. ޤዺDACୁ᳘ࢇኟۙഗۆڦ႙ᆩ݆
–40
LOઍཚց
–50
LOઍཚցᆶෙዖ֡ፕዐፌްሗڦᅃዖăኄᆯ฿ۙ
ޤዺDACڦࠓਦۨڦLjස78๖ăྺሞۉୟዐํ၄
LOઍཚցLjኄၵޤዺDAC຺ڦୟ߳ጲۼᅜཚࡗ
ᅃ߲500 ΩۉፆথںLjժཚࡗᅃ߲250 Ωۉፆথ຺ڟୟኟ
ۙഗ႑ࡽ܋ኮᅃăኄၵথڦፕᆩॽݥၭڦ
ୁۉൻۯኟۙഗڦ܋ۅLj๑ഄዐᅃୟኟۙ
ഗ႑ࡽ܋ሺेྲၭୁೋዃă
–60
ྺํ၄LOઍཚցLjᆩࢽᆌٗޤዺDACࡽޙस٪ഗڦఐ
ණཉॲਸ๔Ljࢫڿሺగ߲ޤዺDACޗڦୁۉኵăྜ
ׯኮࢫLjᆌॠ֪ኟۙഗ܋LOઍཚޗڦኵăසࡕ
LOઍཚޗኵሺٷLj൩߸߀ۙኝޤڦዺDACޙڦ
ࡽLjईኁۙኝଷᅃ߲ޤዺDACڦୁۉăྺକइڥᆶၳ
ڦ໙݆LjీႴᄲႜଁသă
–70
–80
–100
CENTER 2.1GHz
20MHz
SPAN 200MHz
06452-304
–90
81. AD9779AࢅADL5372Lj2.1 GHzܠᅼ႑ࡽLjঢ়ࡗሺᅮࢅ
LOցᆫࣅ
0
REF LVL
0dBm
RBW
VBW
SWT
20kHz
20kHz
1.25s
REF ATT
MIXER
UNIT
20dB
–40dBm
dBm
–10
–20
–30
–40
๑ᆩAD9776A/AD9778A/AD9779AೠࠚӱLjLOઍཚཚ
ᅜۙኝڟԨڹሯำೝLjփࡗኄժփ࿘ۨLjࣷໜ࿒ܸ܈Վ
ࣅă
–50
–60
–70
–80
CENTER 2.1GHz
20MHz
SPAN 200MHz
06452-305
–90
–100
81. AD9779AࢅADL5372Lj2.1 GHzܠᅼ႑ࡽLjঢ়ࡗሺᅮࢅ
LOցᆫࣅ
Rev. B | Page 45 of 56
AD9776A/AD9778A/AD9779A
ຕ܋੨!
ມ܋੨ఇ๕!
AD9776A/AD9778A/AD9779Aీᅜଇዖຕఇ๕߾
ፕǖມ܋੨ఇ๕ࢅ܋ڇ੨ఇ๕ăఐණఇ๕ມ܋੨ఇ๕(ڇ
܋੨࿋ = 0)Lj߳DACٗጆᆩ܋੨থຕă܋ڇ੨ఇ
๕(܋ڇ੨࿋ = 1)ူLjଇ߲DACٗ܋੨1থຕLjDAC1
ࢅDAC2ຕٱLjTXENABLEᆩઠॽຕᆅڞణ
ՔDACăມ܋੨ఇ๕ူLjTXENABLEᆩઠ࠲ຕጴຕ
ୟ০ă
ມ܋੨ఇ๕ူLj߳EBDڦຕሞ၎ᆌڦጺ၍)Q2E
\26;1^ईQ3E\26;1^*ฉথăJࢅRຕཞ้ٳڟLjժሞ
EBUBDML႑ࡽڦฉืᄂႜ֑ᄣăUYFOBCMF႑ࡽՂ
Ⴗྺߛ֍ీ๑ీ݀พୟ০ă!
ຕᅜDATACLKྺ֖
ړຕᅜEBUBDML้֖ྺLjᇑBE:887B0!
BE:889B0BE:88:Bڦথ੨ፌྺ०ڇăEBUBDMLྺ
ᆩઠ٪ຕాڦև้ዓ࣐ڦ؋ӲԨDŽࡤగዖࠦۨჽ
DžăᅺُLjසࡕࢇޙຕ၎ܔᇀEBUBDMLॺڦ૬
ࢅԍ้क़Lj৽ీኟඓ٪ຕă93ߴକᅜ
EBUBDMLྺ้Ⴞ֖܋ڇڦ੨ఇ๕ࢅມ܋੨ఇ๕ၘဦ้
Ⴞă!
ມ܋੨ఇ๕ူLjՂႷᅜຕ୲༵ࠃຕă܋ڇ੨ఇ
๕ူLjՂႷᅜ߳DACຕ୲ڦଇԠ༵ࠃຕăຕ
ڦፌߛ୲ྺ300 MSPSLjᅺُሞ܋ڇ੨ఇ๕ူLj߲
DACڦຕ୲ፌߛٳ150 MHză
ሞມ܋੨ࢅ܋ڇ੨ఇ๕ူLjᅜᆩᅃ߲ຕ้ዓ
(DATACLK)႑ࡽፕྺ้ࠦۨक़एإLjᅜՍٗFPGAईഄ
ຕᇸइڥຕăُ႑ࡽᅜຕ୲߾ፕă
܋ڇ੨ఇ๕!
tSDATACLK
܋ڇ੨ఇ๕ူLjଇ߲DACڦຕሞ܋੨1ጺ၍(P1D
[15:0])ฉথăIࢅQຕᄣԨٱLjժሞDATACLKڦฉ
ืᄂႜ֑ᄣăᇑຕᅃڢLj࣏ՂႷሞTXENABLE(ᆅ
গ39)ฉ༵ࠃᅃ߲ኡد႑ࡽLjᅜՍॽຕᆅڞ၎ᆌ
ڦDACă ړTXENABLEྺ ߛ ้ Lj ܔᆌ ڦຕ ጴ ໃ I
DACăړTXENABLEྺ้گLjܔᆌڦຕጴໃQ DACă
ٱఇ๕ူຕጴথ੨้ڦႾස83๖ă
tHDATACLK
DATA
06452-308
DATACLK
82. ຕ܋੨้ႾLjຕᅜDATACLKྺ֖
28၂๖କሞഗॲ߾ڦፕ࿒ాྷݔ܈ຕॺڦ૬ࢅԍ
้क़ᄲ൱Ljཞ้၂๖କፆشڔ੨(KOW)ăፆشڔ੨থ
੨ॺڦ૬ࢅԍ้क़ኮࢅLjྺକඓԍኟඓ֑ᄣLjኄ
ᆶၳຕՂႷ၄ሞഗॲฉڦፌ้܌क़ă
DATACLKೕ୲ยዃ
DATACLK႑ ࡽ ٗ ా և DAC֑ ᄣ ้ ዓ DACCLKइ ڥă
DATACLKڦೕ୲ൽਦᇀ߲ܠՊײยዃăᅃӯܸჾLj
DATACLKڦೕ୲ڪᇀຕ୲ăDACCLKᇑDATACLK࠲ڦဣ๕සူǖ
f DACCLK
f DATACLK
IF ZS SP u DATACLKDIV
u
u
Q࿋(स٪ഗ0x02ڦ࿋0)੦ຕڦದܔຩႾăړQ
࿋ยྺఐණኵ0้LjໃDACڦI-QܔྺܔᆌᇀTXENABLEံڦߛࢫگଇ߲ຕጴăړQ࿋ยྺ1้Ljໃ
DACڦI-QܔྺܔᆌᇀTXENABLEံߛࢫڦگଇ߲
ຕጴă൩ጀᅪLjஃӀቷࢆዖຩႾದܔLjܔᆌᇀTXENABLEߛڦຕۼԥᆅڞI DACLjܔᆌᇀTXENABLEگ
ڦຕۼԥᆅڞQ DACă
ഄዐLjՎଉIFĂZSĂSPࢅDATACLKDIVڦኵස27๖ă
DATACLK
P1D[15:0]
P1D1
P1D2
P1D3
P1D4
P1D5
P1D6
P1D7
P1D8
TXENABLE
I DAC[15:0]
P1D1
P1D3
P1D5
Q DAC[15:0]
P1D2
P1D4
P1D6
I DAC[15:0]
P1D1
P1D3
P1D5
Q DAC[15:0]
P1D0
P1D2
P1D4
Q FIRST = 1
83. ܋ڇ੨ఇ๕ຕጴথ੨้Ⴞ
Rev. B | Page 46 of 56
06452-306
Q FIRST = 0
AD9776A/AD9778A/AD9779A
DATACLKDIVৈᆖၚDATACLKೕ୲Ljܸփᆖၚຕ
֑ᄣ้ዓڦೕ୲ăྺ๑ຕ֑ᄣೕ୲fDATACLK๔ዕᇑ
ྭຕ୲ԍᅃዂLjDATACLKDIVᆌยྺ00ă
ZS
1(ଭኵག؊্ᆩ)
2(ଭኵག؊๑ీ)
0.5(܋ڇ੨๑ీ)
1(ስມ܋੨)
1Ă2ई4
SP
DATACLKDIV
tSREFCLK
ں
स٪ഗ
0x01
࿋
[7:6]
0x01
[0]
0x02
[6]
0x03
[5:4]
tHREFCLK
ຕᅜREFCLKྺ֖
గၵဣཥዐLjᆩREFCLKԲᆩDATACLKፕྺຕ
้Ⴞ֖߸ݛՍăසࡕDACCLKڦೕ୲ڪᇀຕڦ
ೕ୲)֭ኵ*Ljሶ၎ܔᇀREFCLK±28๖้Ⴞࡀ߭ڦຕ
ᅜথ๑ᆩLjႴ߸ܠ୯ăසࡕDACCLKڦೕ୲ٷ
ᇀຕڦೕ୲Ljሶᅜ૧ᆩݴೕഗׂิDATACLK
)ᅜतాևຕ֑ᄣ้ዓ*ăُݴೕഗࣷሞREFCLKࢅDATACLKኮक़ሰׯ၎࿋ఇࢵLjڞዂ֑ᄣ้क़փඓۨăྺକඓ૬
ຕথ੨ॺڦۨࠦڦ૬ࢅԍ้क़LjՂႷၩأኄዖ၎࿋ఇ
ࢵă
06452-309
ኵ
֭ኵဣຕ(1Ă2Ă4ई8)
tH_SYNC
tS_SYNC
REFCLK
27. ٗDACCLKइڥDATACLKݴڦೕኵ
Վଉ
IF
SYNC_I
DATA
84. ຕ܋੨้ႾLjຕᅜREFCLKྺ֖LjfDACCLK = fREFCLK
൩ጀᅪLjSYNC_Iॺڦ૬ࢅԍ้क़၎ܔᇀREFCLK
ܸჾLjڍSYNC_IᅜాևDACCLK୲ႜ֑ᄣăړ
֑ ᆩ PLL้ Lj SYNC_IՂ Ⴗ ዃ ࿋ ᅜ ፁ ၎ ܔᇀ REFCLK
(tS_SYNC)ॺڦ૬้क़ᄲ൱LjڍփీሞాևSYNC_I֑ᄣ้ዓ
ڦമᅃ߲ฉืᄂኮമዃ࿋ă࣑ჾኮLjSYNC_Iዃ࿋ᄂՂႷݣ
ሞჄଇ߲ፆشڔ੨ኮक़Ljኄၵፆشڔ੨ᅜDACCLK
୲ዘްڦLjܸփREFCLK୲ăኍܔPLL༵ࠃڦDACCLK
ೕ୲຺ྺڦԠREFCLKೕ୲ڦ൧Lj85ڦᅽᆖևݴ၂๖
କ SYNC_Iዃ ࿋ ڦᆶ ၳ ش੨ ă ᅺ ُ Lj ፌ ॺ ܌૬ ้ क़ ྺ
tS_SYNCLjፌॺ૬้क़ྺtDACCLK − tH_SYNCă
tDACCLK
SYNC_I
tH_SYNC
tS_SYNC
REFCLK
DACCLK
tSREFCLK
tHREFCLK
06452-310
ྺକၩأ၎࿋ఇࢵLjՂႷ๑ᆩSYNC_Iᆅগ)ᆅগ13ࢅ
14* Lj ഽ ೨ ຕ ሞ ༬ ۨ REFCLKᄂ ႜ ֑ ᄣ ă REFCLKĂ
SYNC_Iࢅຕኮक़࠲ڦဣස84ࢅ85๖ăᅺُLj
ྺକ੍ॽںຕدഗॲLjSYNC_IࢅຕՂႷፁ
28้ڦႾᄲ൱ă
DATA
Figure 85. Input Data Port Timing, Data Referenced to REFCLK,
fDACCLK = fREFCLK × 4
85. ຕ܋੨้ႾLjຕᅜREFCLKྺ֖LjfDACCLK = fREFCLK × 4
28. ຕ้Ⴞࡀ߭ᇑ࿒܈
้Ⴞ֖ຕ
ຕ၎ܔᇀREFCLK±
ຕ၎ܔᇀDATACLK
SYNC_I±REFCLK±
࿒܈
−40°C
+25°C
+85°C
−40°C +85°C
−40°C
+25°C
+85°C
−40°C +85°C
−40°C
+25°C
+85°C
−40°C +85°C
Min tS (ns)
−0.80
−1.00
−1.10
−0.80
2.50
2.70
3.00
3.00
0.30
0.25
0.15
0.30
PLL্ᆩ
Min tH (ns)
3.35
3.50
3.80
3.80
−0.05
−0.20
−0.40
−0.05
0.65
0.75
0.90
0.90
Rev. B | Page 47 of 56
Min KOW (ns)
2.55
2.50
2.70
3.00
2.45
2.50
2.60
2.95
0.95
1.00
1.05
1.20
Min tS (ns)
−0.83
−1.06
−1.19
−0.83
2.50
2.70
3.00
3.00
0.27
0.19
0.06
0.27
PLL๑ీ
Min tH (ns)
3.87
4.04
4.37
4.37
−0.05
−0.20
−0.40
−0.05
1.17
1.29
1.47
1.47
Min KOW (ns)
2.99
2.98
3.16
3.54
2.45
2.50
2.60
2.95
1.39
1.48
1.51
1.74
AD9776A/AD9778A/AD9779A
ᆫࣅຕ้Ⴞ!
AD9776A/AD9778A/AD9779AਏᆶೌాۉୟLjሎႹᆩࢽۙ
ኝDATACLKᇑDCLK_SMP(֑ᄣຕాڦև้ዓ)
ኮक़࠲ڦဣLjᅜᆫࣅຕ้Ⴞăኄዖᆫࣅཚࡗᅃဣ
ଚෙ၍๕থ੨स٪ഗ܁ႀ֡ፕઠํ၄ă้Ⴞᆫࣅᅜሞᆩ
ࢽڦჹ߭੦ኮူྜׯLjᄺᅜܔഗॲႜՊײLj๑ኮጲ
ۯԍሞᅃ้ۨڦႾᇆଉ(้Ⴞᇆଉದዃ)ăࠀీৈሞ
ຕᅜDATACLKీ֍้֖ྺ๑ᆩăࢫჄևݴ
ॽၘဦຫዖ݆ݛă
DATA
TIMING ERROR = 0
TIMING
MARGIN[3:0]
D
TIMING
ERROR
DETECTION
CLK
PD1[0]
D
ΔtM
ΔtM
ΔtM
ΔtM
TIMING ERROR = 1
DATA TIMING ERROR TYPE = 1
DATA
ACTUAL
SAMPLING
INSTANT
DELAYED
CLOCK
SAMPLING
06452-403
DELAYED
DATA
SAMPLING
TIMING ERROR = 1
DATA TIMING ERROR TYPE = 0
87. ᇆଉ֪ຕ้ڦႾ
ړጲ้ۯႾᆫࣅఇ๕๑ీ(स٪ഗ0x03ڦ࿋7=1)้Ljഗॲ
Ⴤ॔ຕ้ႾٱဃIRQ࿋ࢅຕ้Ⴞٱဃૌ႙࿋ăॠ֪
ॺڟ૬ٱဃ้LjDATACLKჽ[3:0]ሺेǗॠ֪ڟԍٱ
ဃ้LjDATACLKჽ[3:0]३ณăᆩࢽᅜ࣮ړ܁മ๑ᆩ
ڦDATACLKჽ[3:0]ยዃኵă
TIMING
ERROR TYPE
Q
CLK
DATACLK
DELAY[3:0]
้ۯႾᆫࣅ!
ΔtD
DATACLK
06452-402
DCLK_SMP
ΔtM
ጲ้ۯႾᆫࣅ!
TIMING
ERROR IRQ
Q
ΔtM
DATA
86၂๖ᆩઠॠ֪֑ᄣ้Ⴞٱဃժۙኝຕথ੨้Ⴞۉڦ
ୟăDCLK_SMP႑ࡽᆩઠ٪ຕాڦև้ዓăፌ
ዕLjُ႑ࡽڦฉืᄂႴᄲتᇀຕᆶၳ֑ᄣዜڦዐ
႐ăഄํ၄ݛ๕ۙኝ้क़ჽtDLjᅜ߀ՎDATACLK้
ႾLjܸٗ߀Վຕ၎ܔᇀDCLK_SMP้ٳڟڦक़ă
ΔtM
ΔtM
86. ้Ⴞٱဃॠ֪ࢅᆫࣅۉୟ
أକഗॲຕୟ০ᆩํڦा֑ᄣຕྔLjٱဃॠ֪ۉୟ
ׂ࣏ࣷิଇፇ֑ᄣຕ(ྺᇆଉ֪ຕ)ăᅃፇ֑ᄣຕ
ሞํाຕ֑ᄣۅኮമ٪Ljଷᅃፇ֑ᄣຕሞํाຕ
֑ᄣۅኮࢫ٪ăසࡕᇆଉ֪ຕᇑํाຕದLj
ሶණྺ֑ᄣᆶၳLjுᆶٱဃăසࡕํाຕᇑᇆଉ֪ຕ
փದLjሶࣷำٱă
ຕ้Ⴞᇆଉ[3:0]Վଉਦۨᇆଉ֪ຕሞํाຕ֑ᄣ
ۅኮമࢅኮࢫܠ৳ႜ٪ăᅺُLjຕ้ႾᇆଉՎଉਦ
ۨথ੨Ⴔᄲܠณॺ૬ࢅԍᇆଉLj֍ీ๑ຕ้Ⴞٱဃ
IRQԍၳ(֡ፕဃ)ăᆯُኪLjኻᄲॺ૬ࢅԍ
ᇆଉইڟຕ้Ⴞᇆଉ[3:0]ኵᅜူLj้ႾٱဃIRQ৽ࣷ
ዃ1Ljڍժփᅃۨᅪ࿆ጣ٪ഗॲዐڦຕփኟඓă
้ۯႾᆫࣅఇ๕(स٪ഗ0x03ڦ࿋7 = 0)ူLjഗॲփࣷ߀
ՎᆩࢽՊײยዃڦDATACLKჽ[3:0]ኵăఐණ൧ူLj
DATACLKჽ๑ీ࿋ၳăᄲ๑ᆩDATACLKჽ[3:0]
ኵLj࿋ՂႷยྺߛăሞ0000011111ాྷݔยዃDATACLKჽ้Ljჽ(ਨ้ܔक़)ྷݔሀྺ700 ps6.5 nsă29
ଚକኝ߲࿒ాྷݔ܈օڿሺۆڦ႙ჽă
29. ኝ߲࿒ాྷݔ܈ຕჽ၍ۆڦ႙ჽ
ჽ
ଭஓჽ
(๑ీჽ၍้ڦჽ)
ೝڇ࿋ჽ
−40°C
630
+25°C
700
+85°C
740
ڇ࿋
ps
175
190
210
ps
ॽഗॲዃᇀۯఇ๕้Lj৽ࣷघऄֶٱၯᄓஇडăසࡕ
IRQ๑ీLjሶॠ֪ॺڟ૬/ԍ؋ׂ้ࣷิዐăದዃ
ᅃْഗॲLj৽ࣷኴႜᅃֶْٱၯᄓ֡ፕăܔຕ้Ⴞᇆଉ
[3:0]ईDATACLKჽ[3:0]ኵፔڦඪࢆ߀ՎLj݀ةࣷۼႎ
ٱֶڦၯᄓ֡ፕă
݀ิٱဃ้Ljأକยዃຕ้ႾٱဃIRQྔLj࣏ࣷยዃຕ
้Ⴞٱဃૌ႙࿋ăຕ้Ⴞٱဃૌ႙࿋ྺ้گLj๖ԍ
ٱဃǗྺߛ้Lj๖ॺ૬ٱဃă87၂๖କຕথ੨ڦ
้Ⴞࢅຕ้Ⴞٱဃૌ႙࿋ڦጒༀă
Rev. B | Page 48 of 56
AD9776A/AD9778A/AD9779A
ഗॲཞօ!
ဣཥႴ൱ీࣷܔཞօ༵ଇዖփཞᄲ൱ăగၵဣཥᄲ൱
߲ܠDACԵُཞօăኧ݀พݴणईհຐႚ৽้ׯኄዖ
൧LjᅺྺႴᄲ๑ᆩߵܠཀ၍ઠ݀พ၎࠲႑ࡽăُ้Lj
DACႴᄲԵُ၎࿋ܔጚLjڍీփᄲ൱DACᇑဣ
ཥप้֖ዓܔጚăሞ֑ᆩ้ްݴᆩ݀พ૾ୟڦဣཥዐLj
ᅃ߲ई߲ܠDACీႴᄲᇑဣཥप้֖ዓཞօăཞօஇ
ड߁ຎևࢅݴഗॲᇑဣཥ้ዓཞօևॽݴຫኄଇዖཉॲ
ူڦഗॲཞօၜă
ཞօஇड߁ຎ!
88၂๖କೌాཞօஇडڦăཞօஇडڦएԨ֡ፕ
ׂิྺ܈DACCLKዜ؛߲ڇڦ๔ࣅஞ؋Ljᅜॽ้ዓ݀
ิጒༀऐஇडยዃྺᅙኪጒༀă؛๔ࣅஞ؋ॽ้ዓጒༀ
[4:0]ڦኵሜ้ዓ݀ิጒༀऐLjፕྺഄူᅃ߲ጒༀăසࡕ
ཞօஇडኟඓׂิ؛๔ࣅஞ؋Ljሶॽሞ32߲DACCLK
ዜዐڦᅃ߲DACCLKዜాᆶၳă้ዓ݀ิጒༀऐᆶ32
߲ጒༀᅜDACCLK୲߾ፕLjᅺُሞڼᅃ߲ஞ؋ኮࢫথ
ڦڟ߲؛๔ࣅஞ؋ेࣷۼሜጒༀऐణമሞڦጒༀLjٗ
ܸ๑ഗॲᅜኟඓ้ڦዓ߾ፕă
PLL
BYPASS INTERNAL
PLL
BIT 0 (1× INTERPOLATION)
BIT 1 (2×)
BIT 2 (4×)
BIT 3 (8×)
BIT 4 (8× WITH
ZERO STUFFING)
MUX
DELAY REGISTER
(REG 0x0, BITS[7:4])
fSYNC_1 < fDATA/2^N
ERROR DETECT
CIRCUITRY
ཞօஞ؋ႴڦSYNC_Iฉืᄂ
1DŽఐණDž
2
4
8
16
ၳยዃ
ၳยዃ
ၳยዃ
૩සLjසࡕ๑ᆩೕ୲ྺfDACCLK/4ڦSYNC_I႑ࡽLjሶܔ
ᇀSYNC_IԲኵ[2:0]Lj011ࢅ100ྺᆶၳยዃă011ยዃڞ
ዂ32߲DACCLKዜׂิᅃ߲؛๔ࣅஞ؋Lj100ยዃڞ
ዂ64߲DACCLKዜׂิᅃ߲؛๔ࣅஞ؋ăଇዖ൧
ํ၄ኟඓڦഗॲཞօă
ཞօ้Ⴞٱဃॠ֪!
SYNC IRQ
PULSE
GENERATION
LOGIC
06452-094
SYNC
DELAY
SYNC_I
Բኵ[2:0]
000
001
010
011
100
101
110
111
้ዓጒༀ[4:0]ኵ้ዓ݀ิጒༀऐሞ؛๔ࣅ้ްڦ࿋ጒ
ༀăཚࡗ߀ՎُኵLjᅜۙኝాև้ዓ၎ܔᇀSYNC_I႑ࡽ
้ڦႾă้ዓጒༀ[4:0]ኵڿሺ1Ljాև้ዓ৽༵ࣷമᅃ߲
DACCLKዜă
LOAD DACCLK OFFSET VALUE (REG 0x07,
BITS[4:0]), ONE DACCLK CYCLE/INCREMENT
SYNC_I
30. ኧ߳ዖSYNC_Iೕ୲Ⴔڦยዃ
REFCLK
DACCLK
CLOCK
GENERATION
STATE
MACHINE
ڦԲኵႜᅞăኻᄲஞ؋ׂิۉୟᅜ32߲DACCLKዜ
ڦԠ ຕ ׂ ิ ஞ ؋ Lj SYNC_Iೕ ୲ Ս ᅜ گᇀ
DACCLK/32ăඪࢆ൧ူLjSYNC_Iڦፌٷೕ୲ՂႷگᇀ
fDATACLKă
88. ཞօۉୟࠀీ
ఁᅭฉLjྺକԍኟඓཞօLjSYNC_Iሞ32้߲ዓዜ
)ई32้߲ዓዜڦԠຕ*ዐᆌᆶᅃ߲ฉืᄂăᅜܔஞ
؋ ׂ ิ இ ड ႜ Պ ײLj ๑ ኮ ሞ SYNC_Iೕ ୲ ߛ ᇀ
DACCLK/32้ᅞஞ؋ăܠᇆஞ؋ᅜӀቷ30ଚ
ཞօஇडਏᆶᇑຕ้Ⴞ၎ຼٱڦဃॠ֪ۉୟă
SYNC_I้Ⴞᇆଉ[3:0]Վଉਦۨཞօথ੨Ⴔᄲܠณॺ૬ࢅԍ
ᇆଉLj֍ీ๑ཞօ้ႾٱဃIRQ࿋ԍၳ)न֡ፕ
ဃ*ăᅺُLjኻᄲॺ૬ࢅԍᇆଉইڟSYNC_I้Ⴞᇆଉ
[3:0]ኵᅜူLjཞօٱဃIRQ࿋৽ࣷዃ1Ljڍኄժփᅃۨᅪ࿆
ጣSYNC_I٪փኟඓă
ړཞօ้ႾٱဃIRQ࿋ዃ1้Ljᅜ֑ൽৰኟٯแᅜ࣬ް้
Ⴞᇆଉăᅃዖٯแሡ้३ณ้ႾᇆଉLjڟཞօ้Ⴞٱ
ဃIRQൣ0ྺኹăࢫॽSYNC_Iჽሺेଇ߲ሺଉLjॠֱ
้Ⴞᇆଉሺे࣏३ณăසࡕ้ႾᇆଉሺेLjሶीჄڿ
ሺSYNC_IჽڦኵLjڟᇆଉڟٳፌྺٷኹăڍLjසࡕ
ڿሺSYNC_Iჽڞዂ้Ⴞᇆଉ३ณLjሶᆌ܌ჽLjڟ
้Ⴞᇆଉڟٳፌॅྺኹă
Rev. B | Page 49 of 56
AD9776A/AD9778A/AD9779A
ഗॲᇑဣཥ้ዓཞօ!
AD9776A/AD9778A/AD9779A༵ࠃକஞ؋ఇ๕ཞօݛӄ(९
89)Ljᅜॽᅃ߲ဣཥా߲ܠഗॲڦDACᇑཞᅃ
DACCLKᄂ ཞ օ ă ా և ้ ዓ ཚ ࡗ ၠ SYNC_I
(SYNC_I+ĂSYNC_I−)༵ࠃᅃ߲ᅃْႠஞ؋ईᅃ߲ዜ႑
ࡽܸํ၄ཞօăSYNC_I႑ࡽӀቷాևDACCLK֑ᄣ୲้
ዓႜ֑ᄣă
90၂๖କSYNC_I၎ܔᇀREFCLK้ڦႾă൩ጀ
ᅪLj้Ⴞ၎ܔᇀREFCLK႑ࡽܸჾLjڍSYNC_I
ᅜDACCLK୲ႜ֑ᄣăኄᅪ࿆ጣLjSYNC_I႑ࡽڦฉื
ᄂՂႷ݀ิሞമᅃDACCLKฉืᄂڦԍ้क़ኮࢫLjܸփ
ሞമᅃREFCLKฉืᄂتă
SYNC_Iೕ୲ਏᆶᅜူ၌ǖ
ړഗॲ݀ิ้Ⴞٱဃ้LjIRQᆅগ(ᆅগ71)ᆩፕԒয়Ljᆌړ
ᇎᅜֱკDŽཚࡗ܁ൽस٪ഗ0x19Džᅜඓۨඓൎࠤڦቱཉ
ॲăIRQᆅগਸ႙ۉگೝᆶၳăᆌሞഗॲྔևઙ
ߛIRQᆅগăُᆅগᅜথڟഄഗॲڦਸIRQ
ᆅগLjᅜ๑ኄၵᆅগႚׯ၍“ई”থă
ዐ൩൱֡ፕ!
fSYNC_I ≤ fDATA
ాև้ዓཞօ้Ljᆶഗॲڦຕ֑ᄣ้ዓ၎࿋ܔጚă
ຕ้Ⴞ࠲ဣᅜᆩREFCLKईDATACLKፕྺ֖ă
ܔᇀኄዖཞօݛӄLjᆶഗॲྺٗഗॲLjဣཥ้ዓׂิ/
ݴದႊೌ؊ړዷഗॲă߳DACڦSYNC_I႑ࡽኮक़้ڦዓ
ೋᅎՂႷگăཞᄣLj߳DACڦREFCLK႑ࡽኮक़้ڦዓ
ೋᅎᄺՂႷگăDACኮक़ኄၵ႑ࡽڦඪࢆೋᅎۼՂႷሞ
้Ⴞᇨ໙ዐेᅜ୯ă89၂๖କ้ዓࢅཞօݛӄ๖
૩ă
ᆶଇ߲փཞٱڦဃՔኾᅜ݀ةዐ൩൱ǖຕ้Ⴞٱဃ
Քኾࢅཞօ้ႾٱဃՔኾăఐණ൧ူLjኻᄲᆶᅃ߲ٱဃ
Քኾዃ1LjIRQᆅগՍྺۉگೝᆶၳăᅜೡԸᆶٱဃՔ
ኾईኻೡԸഄዐڦᅃ߲LjݞኹഄघऄIRQᆅগฉڦዐă
ٱဃՔኾࣷԥ٪ժԍᆶၳLj܁ڟൽዐस٪ഗ0x19
ईኁٱဃՔኾ࿋ԥޮ߃ă
MATCHED
LENGTH TRACES
REFCLK
OUT
SYNC_I
SYSTEM CLOCK
LOW SKEW
CLOCK DRIVER
REFCLK
OUT
SYNC_I
LOW SKEW
CLOCK DRIVER
06452-311
PULSE
GENERATOR
MATCHED
LENGTH TRACES
89. ஞ؋ఇ๕ူܠڦഗॲཞօ
SYNC_I
tH_SYNC
tS_SYNC
06452-312
REFCLK
DACCLK
90. ܠഗॲԵُཞօ้LjSYNC_I၎ܔᇀREFCLK้ڦႾ
Rev. B | Page 50 of 56
AD9776A/AD9778A/AD9779A
ࠀࡼ!
9199၂๖ڇDACఇ๕ࢅມDACఇ๕ူ1.8 Vࢅ3.3 Vຕጴࢅ้ዓۉᇸࡼࠀڦăُྔLjڇDACఇ๕ူ3.3 Vఇెۉᇸ)ᇑఇ
๕ࢅ܈࠲*ࡼࠀڦ/ྺୁۉ102 mW/31 mALjມDACఇ๕ူྺ182 mW/55 mAăPLL๑ీ้Lj1.8 V้ዓۉᇸୁۉڦ/ࠀࡼሺ
े50 mA/90 mWă
0.075
0.7
8× INTERPOLATION
0.6
4× INTERPOLATION
4× INTERPOLATION,
ZERO STUFFING
8× INTERPOLATION,
ZERO STUFFING
0.5
ALL INTERPOLATION MODES
POWER (W)
POWER (W)
0.050
2× INTERPOLATION,
ZERO STUFFING
0.4
2× INTERPOLATION
0.3
1× INTERPOLATION,
ZERO STUFFING
0.025
0.2
1× INTERPOLATION
0.1
0
25
50
75
100
125
150
175
200
225
250
fDATA (MSPS)
0
06452-076
0
25
50
75
100
150
175
200
225
250
94. ࠀࡼLjຕጴ3.3 VۉᇸLjৈIຕLjํຕఇ๕Lj
Ԉઔۙఇ๕ࢅଭኵག؊
91. ጺࠀࡼLjৈIຕLjํຕఇ๕
0.4
1.0
4× INTERPOLATION
8× INTERPOLATION, ALL
MODULATION MODES
8× INTERPOLATION,
ZERO STUFFING
0.9
8× INTERPOLATION
125
fDATA (MSPS)
06452-080
0
4× INTERPOLATION,
ALL MODULATION
MODES
0.8
0.3
0.2
POWER (W)
POWER (W)
0.7
2× INTERPOLATION
0.6
2× INTERPOLATION,
ALL MODULATION MODES
0.5
0.4
0.3
0.1
0.2
2× INTERPOLATION,
ZERO STUFFING
4× INTERPOLATION,
ZERO STUFFING
1× INTERPOLATION
0.1
1× INTERPOLATION,
ZERO STUFFING
1× INTERPOLATION
0
50
75
100
125
150
175
200
225
250
fDATA (MSPS)
0
06452-078
25
25
50
100 125 150 175 200 225 250 275 300
fDATA (MSPS)
95. ጺࠀࡼLjມDACఇ๕
92. ࠀࡼLjຕጴ1.8 VۉᇸLjৈIຕLj
ํຕఇ๕LjփԈઔଭኵག؊
0.8
0.08
8× INTERPOLATION, fDAC /8,
fDAC /4,
fDAC /2,
NO MODULATION
0.7
4× INTERPOLATION
0.6
0.06
8× INTERPOLATION
POWER (W)
4× INTERPOLATION
0.04
2× INTERPOLATION
0.5
0.4
2× INTERPOLATION
0.3
0.2
0.02
1× INTERPOLATION
1× INTERPOLATION,
NO MODULATION
0.1
0
25
50
75
100
125
150
175
200
225
fDATA (MSPS)
250
93. ࠀࡼLj้ዓ1.8 VۉᇸLjৈIຕLjํຕఇ๕Lj
Ԉઔۙఇ๕LjփԈઔଭኵག؊
0
25
50
75
100
125
150
175
200
225
250
fDATA (MSPS)
96. ࠀࡼLjຕጴ1.8 VۉᇸLjIࢅQຕLjມDACఇ๕Lj
փԈઔଭኵག؊
Rev. B | Page 51 of 56
06452-081
0
0
06452-079
POWER (W)
75
06452-077
0
0
AD9776A/AD9778A/AD9779A
0.125
ۖࢅۉႩఇ๕!
POWER (W)
8× INTERPOLATION, fDAC /8,
fDAC /4,
fDAC /2,
NO
MODULATION
0.100
4× INTERPOLATION
0.075
2× INTERPOLATION
0.050
0.025
0
25
50
75
100
125
150
175
200
225
250
fDATA (MSPS)
06452-082
1× INTERPOLATION,
NO MODULATION
0
97. ࠀࡼLj้ዓ1.8 VۉᇸLjIࢅQຕLjມDACఇ๕Lj
փԈઔଭኵག؊
AD9776A/AD9778A/AD9779Aਏᆶܠዖۖۉఇ๕Ljຕጴᆅ
ĂዷTxDACࢅޤዺDACᅜݴ՚ईཞ้ۖۉăཚࡗෙ၍
๕থ੨܋੨LjᅜॽዷTxDACዃᇀႩईۖۉఇ๕ăႩ
ఇ๕ူLjTxDAC࠲ԿLjܸٗইࡼࠀگăփࡗLjएጚۉ
უᇸධԍཚۉLjᅜՍీٗႩఇ๕࣬ްăۖۉఇ
๕࿋)स٪ഗ0x00ڦ࿋4*ዃ1้Ljᆶఇెࢅຕጴۉୟۖ
ۉLjԈઔएጚۉუᇸăఇ๕ူLjෙ၍๕থ੨܋੨ධԍ
ऄۯăఇ๕ԲႩఇ๕߸ูۉLjڍഔ้ۯक़ᄺ߸ă
ޤዺDACᄺᅜཚࡗෙ၍๕থ੨܋੨ՊײႩఇ๕ă
ጲۉۖۯ๑ీ࿋)स٪ഗ0x00ڦ࿋3*੦ഗॲຕጴևۖڦݴ
ీࠀۉăጲీࠀۉۖۯᇑTXENABLEᆅগ)ᆅগ39*ᅃഐ݀
ࣩፕᆩLjၘ൧९31ă
31
TXENABLE
(ᆅগ39)
0
0.075
POWER (W)
1
0.025
50
75
100
125
150
175
200
225
250
06452-083
25
1200
06452-084
0
0
fDATA (MSPS)
98. ࠀࡼLjຕጴ3.3 VۉᇸLjIࢅQຕLj
ມDACఇ๕
0.16
0.14
POWER (W)
0.12
0.10
0.08
0.06
0.04
0.02
0
0
200
400
සࡕጲۉۖۯ๑ీ࿋ = 0Ljሶᆩ0ൣຕୟ
০ă
සࡕጲۉۖۯ๑ీ࿋ = 1Ljሶൣ߲ܠREFCLK
ዜڦຕLjࢫॽຕጴᆅጲۯዃᇀۖۉጒ
ༀăDACĂएጚۉუᇸࢅෙ၍๕থ੨܋੨փ
ᆖၚă
ALL INTERPOLATION MODES
0.050
௮ຎ
600
800
1000
fDAC (MSPS)
99. ݒSinc୳հഗڦDVDD18ࠀࡼ
Rev. B | Page 52 of 56
ኟ߾ፕ
AD9776A/AD9778A/AD9779A
ೠࠚӱ߁ຎ!
ۆ႙ೠࠚยዃස100๖ăᅜᆩᅃ߲ኟ၀հईݛհ้
ዓፕྺDAC֑ᄣ้ዓᇸă้ዓڦೕࣷ܈كথᆖၚഗॲ
Ⴀీăᄲ൱๑ᆩگሯำĂگ۶้ۯዓᇸă
ೠࠚӱ֡ፕ!
AD9776A/AD9778A/AD9779Aೠࠚӱኼሞӻዺᆩࢽຄ
ဒഗॲ֡ڦፕLjժೠࠚഗॲڦႠీăᄲ๑ᆩೠࠚӱLjᆩࢽ
ႴጚԢᅃPCĂ5 VۉᇸĂ้ዓᇸࢅຕጴຕᇸăᆩࢽ࣏
Ⴔᄲཚࡗೕݴဆᅏई๖հഗઠ࠵ִDACă
ೠࠚӱڦᆶՂᄲথၘ९101ă
CLOCK
GENERATOR
ADAPTER
CABLES
CLKIN
SPI PORT
SPECTRUM
ANALYZER
AD9776A/
AD9778A/
AD9779A
DIGITAL
PATTERN
GENERATOR
EVALUATION
BOARD
CLOCK IN
06452-097
1.8V POWER SUPPLY
DATACLK OUT
3.3V POWER SUPPLY
100. ۆ႙֪ยዃ
DVDD18
DVDD33
P4 DIGITAL INPUT CONNECTOR
CVDD18
J1 CLOCK IN
AD9779A
JP4
JP15
JP8
JP14
JP3
JP16
JP2
JP17
S7 DCLKOUT
J2
5V SUPPLY
MODULATOR
OUTPUT
S5 OUTPUT 1
ADL537x
+5V
GND
S6 OUTPUT 2
LOCAL OSC
INPUT
ANALOG
DEVICES
AD9776A/
AD9778A/
AD9779A
06452-095
SPI PORT
AVDD33
101. ၂๖ᆶথڦAD9776A/AD9778A/AD9779Aೠࠚӱ
Rev. B | Page 53 of 56
AD9776A/AD9778A/AD9779A
૧ᆩೠࠚӱໜॲڦLjᆩࢽᅜాೌܔದዃस٪ഗႜ
Պײăཚࡗෙ၍๕থ੨܋੨Ljᅜॽഗॲยዃྺඪࢆᆩ
߾ڦፕఇ๕ă102၂๖କॲڦఐණش੨ă
ೠࠚӱฉ࣏ᆶADL537xۙഗLjᅜՍܔRFጱဣཥႜೠ
ࠚăೠࠚӱၘڦဦጨଙࢅෙ၍๕থ੨ॲᅜٗADIࠅິ
ྪበူሜă
1. SET INTERPOLATION RATE
2. SET INTERPOLATION FILTER MODE
3. SET INPUT DATA FORMAT
06452-099
4. SET DATACLK POLARITY TO MATCH INPUT TIMING
102. ෙ၍๕থ੨܋੨ॲش੨
Rev. B | Page 54 of 56
AD9776A/AD9778A/AD9779A
ྔႚ٫!
0.75
0.60
0.45
16.00 BSC SQ
1.20
MAX
14.00 BSC SQ
100
1
76
76
75
SEATING
PLANE
100
1
75
PIN 1
BOTTOM VIEW
(PINS UP)
TOP VIEW
(PINS DOWN)
CONDUCTIVE
HEAT SINK
51
50
25
50
1.05
1.00
0.95
7°
3.5°
0°
0.50 BSC
0.27
0.22
0.17
0.15
0.05
COPLANARITY
0.08
26
6.50
NOM
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MS-026-AED-HDT
072408-A
51
25
26
0.20
0.09
103. 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ
[TQFP_EP](SV-100-1)
٫(ڇ࿋ǖmm)
۩ࠔኸళ
႙ࡽ
AD9776ABSVZ 1
AD9776ABSVZRL1
AD9778ABSVZ1
AD9778ABSVZRL1
AD9779ABSVZ1
AD9779ABSVZRL1
AD9776A-EBZ1
AD9778A-EBZ1
AD9779A-EBZ1
1
࿒!ྷݔ܈
−40°C +85°C
−40°C +85°C
−40°C +85°C
−40°C +85°C
−40°C +85°C
−40°C +85°C
ހጎ௮ຎ!
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP)
ೠࠚӱ!
ೠࠚӱ!
ೠࠚӱ!
Z = ࢇޙRoHSՔጚڦग़ඹഗॲă
Rev. B | Page 55 of 56
ހጎၜ!
SV-100-1
SV-100-1
SV-100-1
SV-100-1
SV-100-1
SV-100-1
AD9776A/AD9778A/AD9779A
ጀ
©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06452-0-9/08(B)
Rev. B | Page 56 of 56