AD9776ABSVZRL

ມཚ‫ ڢ‬12/14/16࿋ 1GSPSຕఇገ࣑ഗ AD9776A/AD9778A/AD9779A ༬Ⴀ ߁ຎ ‫)ࡼࠀگ‬ඇև߾ፕཉॲူ*ǖ1.0 W (1 GSPS)Lj!!!!!!!!!!!!!! 100ᆅগĂ஋୞ࡰಎTQFP‫ހ‬ጎ AD9776A/AD9778A/AD9779A‫ݴ‬՚๟ມཚ‫ڢ‬Ă12/14/16࿋Ă ߛ‫ۯ‬ༀ‫ྷݔ‬ຕఇገ࣑ഗ(DAC)Lj༵ࠃ1 GSPS֑ᄣ໏୲Lj੗ ᅜׂิፌߛ‫ٳ‬లઊຯ༬ೕ୲‫ܠڦ‬ሜհăኄၵഗॲਏᆶኍ‫ܔ‬ ኱থՎೕ‫د‬๼ᆌᆩ৊ႜᆫࣅ‫ڦ‬༬ႠLjԈઔްຕຕጴۙ዆ᅜ तሺᅮᇑ฿ۙց‫׋‬ăDAC๼‫؜‬ঢ়ࡗᆫࣅLj੗ᅜᇑఇెኟ঍ ۙ዆ഗ࿮‫ފ‬থ੨Lj૩සADIࠅິ‫ڦ‬ADL537x FMODဣଚۙ ዆ഗăෙ၍๕থ੨ሎႹ‫ܔ‬Ⴙ‫ాܠ‬և֖ຕ৊ႜՊ‫܁࣮ࢅײ‬ă ஢ଉ‫ײ‬๼‫ୁۉ؜‬੗ᅜሞ10 mA዁30 mA‫ాྷݔ‬৊ႜՊ‫ײ‬ăኄ ၵഗॲ֑ᆩံ৊‫ڦ‬0.18 μm CMOS߾ᅝ዆ሰLj֑ᆩ1.8 Vࢅ 3.3 V‫ۉ‬ᇸࠃ‫ۉ‬Ljጺࠀࡼྺ1.0 WLjժ֑ᆩ100ᆅগ‫ג‬ԋ຺‫ݛ‬ Ռೝ‫ހ‬ጎ(TQFP)ă ᆌᆩ ׂ೗਋ঋ! ࿮၍ए‫إ‬ยแǖW-CDMAĂCDMA2000ĂTD-SCDMAĂWiMAXĂ 1. 600 mW (500 MSPS) ‫ڇ‬ሜհW-CDMA ACLR = 80 dBc (80 MHz ዐೕ) ੗ۙఇె๼‫؜‬ǖ8.7 mA዁31.7 mA)RL = 25 Ω዁50 Ω* ႎᆗ‫ڦ‬2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙ዆ഗ੗ᅜॽሜհ‫ݣ‬ሞDAC ‫੻ټ‬ዐ‫ڦ‬ඪࢆ࿋ዃ ‫ޤ‬ዺDAC੗ᅜ੦዆ྔևVGAत฿ۙ ‫ܠ‬ႊೌཞօথ੨ ߛႠీĂ‫گ‬ሯำ໮၎࣍(PLL)้ዓԠೕഗ ຕጴ‫ݒ‬sinc୳հഗ GSMĂLTE 2. 3. ຕጴߛ/‫گ‬ዐೕࢇ‫ׯ‬ ాևຕጴฉՎೕࠀీ ݀พ‫ݴ‬ण 4. 5. ੻‫ټ‬ཚ႑ǖLMDS/MMDSĂ‫ۅܔۅ‬ ૧ᆩ‫گג‬ሯำᇑ঍ۙ฿ኈ(IMD)༬ႠLjٗए‫ߛڟټ‬ዐ ೕ‫ټ੻ڦ‬႑ࡽ੗ᅜํ၄ߛዊଉࢇ‫ׯ‬ă ጆᆶ‫ڦ‬DAC๼‫؜‬ਸ࠲रຍ੗ሺഽ‫ۯ‬ༀႠీă ‫ୁۉ‬๼‫؜‬ದዃ०ՍLj੗ᅜᆩᇀ߳ዖ‫܋ڇ‬ईֶ‫ۉݴ‬ୟྊ ೫঳ࠓă CMOSຕ਍๼෇থ੨Ljਏᆶ੗ۙ‫ॺڦ‬૬ᇑԍ‫ీࠀ׼‬ă ႎᆗ‫ڦ‬2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙ዆ഗ੗ᅜॽሜհ ‫ݣ‬ሞDAC‫੻ټ‬ዐ‫ڦ‬ඪࢆ࿋ዃă ‫ۆ‬႙႑ࡽ૾ QUADRATURE MODULATOR/ MIXER/ AMPLIFIER COMPLEX I AND Q DC LO DC DIGITAL INTERPOLATION FILTERS I DAC POST DAC ANALOG FILTER Q DAC AD9776A/AD9778A/AD9779A A 06452-114 FPGA/ASIC/DSP ཮1 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved. ADIዐ࿔Ӳຕ਍๮֩๟ᆈ࿔Ӳຕ਍๮֩‫ڦ‬ᅳ࿔Lj৤൩ଌ঴‫݋‬ᅳዐ੗ీ٪ሞ‫ڦ‬ᇕჾፇኯई‫݋‬ᅳ‫ٱ‬ဃLjADIփ‫݋ܔ‬ᅳዐ٪ሞ‫ֶڦ‬ᅴईᆯׂُิ‫ٱڦ‬ဃ޶ሴăසႴඓණඪࢆَᇕ‫ڦ‬ጚඓႠLj൩֖੊ADI༵ࠃ ‫ڦ‬ፌႎᆈ࿔Ӳຕ਍๮֩ă AD9776A/AD9778A/AD9779A  ణ୤ ༬Ⴀ 1 ! ᆌᆩ 1 DAC֑ᄣ้ዓᇸ 39 ߁ຎ ‫ݒ‬Sinc୳հഗ 38 1 ! ኱থ๼෇้ዓ 39 ׂ೗਋ঋ 1 ! ้ዓԠೕ 39 ‫ۆ‬႙႑ࡽ૾ 1 ! ൻ‫ۯ‬REFCLK๼෇ 42 Ⴊ۩૦๏ 3 ׂิ஢ଉ‫ୁۉײ‬ 43 ࠀీ઀཮ 4 ! 43 रຍࡀ߭ 5 ሺᅮࢅ฿ۙၯኟ ! ኱ୁࡀ߭ 5 ! ຕጴࡀ߭ 6 ! ຕጴ๼෇ຕ਍้Ⴞࡀ߭ 7 ! ঍ୁࡀ߭ 8 ! ਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ 9 ๼෇ຕ਍‫܋‬੨ 46 ! ඤፆ 9 ! ‫܋ڇ‬੨ఇ๕ 46 ! ాևएጚ‫ۉ‬უᇸ 44 I/Qཚ‫ڢ‬ሺᅮ೅ದ 44 ‫ޤ‬ዺDAC֡ፕ 44 LOઍཚց‫׋‬ 45 ሺᅮࢅ฿ۙၯኟ঳ࡕ 45 9 ! ມ‫܋‬੨ఇ๕ 46 ᆅগದዃࢅࠀీ௮ຎ 10 ! ๼෇ຕ਍ᅜDATACLKྺ֖੊ 46 ‫ۆ‬႙߾ፕ༬Ⴀ 16 ! ๼෇ຕ਍ᅜREFCLKྺ֖੊ 47 ຍᇕ 24 ! ᆫࣅຕ਍๼෇้Ⴞ 48 ߾ፕᇱ૙ 25 ഗॲཞօ 49 ! ཞօஇड߁ຎ 49 25 ! ഗॲᇑဣཥ้ዓཞօ 50 ෙ၍๕থ੨ 26 ! ዐ܏൩൱֡ፕ 50 ! ‫ز‬ႜথ੨‫ڦ‬ཚᆩ֡ፕ 26 ࠀࡼ 51 ! ኸସጴব 26 ! 52 ! ‫ز‬ႜথ੨‫܋‬੨ᆅগࠀీ௮ຎ 27 ೠࠚӱ߁ຎ 53 27 ! 53 ෙ၍๕থ੨स٪ഗᆙพ 28 ྔႚ؅٫ 55 ֭ኵ୳հഗ঳ࠓ 33 ! 55 ! ֭ኵ୳հഗ‫੻ټ‬၌዆ 37 ESDয়ߢ AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/ AD9779A‫ڦ‬൶՚ MSB/LSB‫د‬๼ Rev. B | Page 2 of 56 ۖ‫ࢅۉ‬Ⴉ௥ఇ๕ ೠࠚӱ֡ፕ ۩ࠔኸళ AD9776A/AD9778A/AD9779A Ⴊ۩૦๏ 2008౎9ሆ—Ⴊ۩ӲA዁Ⴊ۩ӲB ‫ز‬ႜྔยথ੨(SPI)ඇև߀ྺෙ၍๕থ੨ 1 ෸‫཮أ‬79ǗዘႎӀႾՊࡽ 41 ߸߀༬Ⴀև‫ݴ‬ 1 ߸߀LOઍཚց‫׋‬և‫ݴ‬ 45 ߸߀ᆌᆩև‫ݴ‬ 1 ߸߀՗28 47 ߸߀՗1‫ڦ‬ओ‫ݥݴ‬၍Ⴀ(INL)֖ຕ 5 ߸߀ᆫࣅຕ਍๼෇้Ⴞև‫ݴ‬ 48 ߸߀՗2‫ڦ‬DAC้ዓ๼෇(REFCLK+, REFCLK−)֖ຕ 6 ߸߀ཞօஇड߁ຎև‫ݴ‬ 49 ߸߀՗3‫ڦ‬๼෇ຕ਍֖ຕ 7 ߸߀཮88 49 ߸߀՗3‫ڦ‬ԍ‫้׼‬क़֖ຕ 7 ߸߀཮101 53 ՗3ሺेෙ၍๕থ੨֖ຕ 7 ෸‫أ‬๑ᆩADL5372ኟ঍ۙ዆ഗև‫཮ࢅݴ‬104 51 ՗3ሺेް࿋֖ຕ 7 ෸‫أ‬ೠࠚӱᇱ૙཮և‫཮ࢅݴ‬105ǗዘႎӀႾՊࡽ 52 ߸߀՗3‫ڦ‬࿂ጀ 7 ෸‫཮أ‬106 53 ཮3ሺे஋୞ࡰಎጀ๥Lj߸߀՗7 10 ෸‫཮أ‬107 54 ཮4ሺे஋୞ࡰಎጀ๥Lj߸߀՗8 12 ෸‫཮أ‬108 55 ཮5ሺे஋୞ࡰಎጀ๥Lj߸߀՗9 14 ෸‫཮أ‬109 56 ߸߀DATACLKჽ‫ྷݔ׿‬և‫ݴ‬ 25 ෸‫཮أ‬110 57 ߸߀ӲԨस٪ഗև‫ݴ‬ 25 ෸‫཮أ‬111 58 ߸߀՗10 25 ෸‫཮أ‬112 59 ߸߀՗12 26 ߸ႎྔႚ؅٫ 60 ߸߀՗13 28 ߸߀՗14 29 2008౎3ሆ—Ⴊ۩Ӳ0዁Ⴊ۩ӲA ߸߀֭ኵ୳հഗ঳ࠓև‫ݴ‬ 33 ߸߀༬Ⴀ 1 ߸߀཮60 34 ሺेጀ๥2 4 ߸߀՗19 36 ߸߀՗2 5 ߸߀֭ኵ୳հഗ‫੻ټ‬၌዆և‫ݴ‬ 37 ߸߀՗3 6 ߸߀཮70 37 ߸߀ඤፆև‫ݴ‬ 7 ሺेຕጴۙ዆և‫ݴ‬ 37 ֭෇՗6 8 ሺे՗20ࢅ՗21ǗዘႎӀႾՊࡽ 38 ߸߀՗7‫ڦ‬ᆅগ39௮ຎ 9 ሺे‫ݒ‬Sinc୳հഗև‫ݴ‬ 38 ߸߀՗8‫ڦ‬ᆅগ39௮ຎ 10 ሺे཮71ǗዘႎӀႾՊࡽ 38 ߸߀՗9‫ڦ‬ᆅগ39௮ຎ 12 ߸߀้ዓԠೕև‫ݴ‬ 39 ߸߀߾ፕᇱ૙և‫ݴ‬ 23 ߸߀཮72 39 ߸߀՗10 23 ߸߀ದዃPLLೕ܎჋ስኵև‫ݴ‬ 39 ߸߀՗13 26 ߸߀૧ᆩ࿒‫܈‬ॠ֪ದዃPLLೕ܎჋ስև‫ݴ‬ 41 ߸߀՗14 27 ߸߀૧ᆩ٪‫ئ‬ഗ৊ႜᅙኪ࿒‫܈‬ၯጚև‫ݴ‬ 41 ߸߀֭ኵ୳հഗ঳ࠓև‫ݴ‬ 33 ߸߀“ᅃહᆦᅥ”‫ڦ‬ഗॲ჋ၜև‫ݴ‬ 41 ༺࣑DAC֑ᄣ้ዓᇸև‫ݴ‬ 36 ሺे՗26 41 ༺࣑݀พୟ০ሺᅮࢅ฿ۙၯኟև‫ݴ‬ 40 ߸߀ాևएጚ‫ۉ‬უᇸև‫ݴ‬ 43 ༺࣑๼෇ຕ਍‫܋‬੨և‫ݴ‬ 42 ݀พୟ০ሺᅮࢅ฿ۙၯኟՔ༶߀ྺሺᅮࢅ฿ۙၯኟ 44 ༺࣑ഗॲཞօև‫ݴ‬ 45 ߸߀I/Qཚ‫ڢ‬ሺᅮ೅ದև‫ݴ‬ 44 ෸‫཮أ‬112዁཮117 58 ߸߀‫ޤ‬ዺDAC֡ፕև‫ݴ‬ 44 ߸࣑཮79 45 2007౎8ሆ—Ⴊ۩Ӳ0ǖ‫؛‬๔Ӳ Rev. B | Page 3 of 56 AD9776A/AD9778A/AD9779A ࠀీ઀཮ DELAY LINE CLOCK GENERATION/DISTRIBUTION SYNC_I DATACLK CLOCK MULTIPLIER 2×/4×/8× DELAY LINE DATA ASSEMBLER SINC^-1 2× 2× 2× n × fDAC /8 n = 0, 1, 2 ... 7 Q LATCH 2× 2× 2× SINC^-1 DIGITAL CONTROLLER 10 16-BIT I DAC 16-BIT Q DAC OUT1_P OUT1_N OUT2_P OUT2_N VREF I120 GAIN 10 GAIN SERIAL PERIPHERAL INTERFACE POWER-ON RESET 10 AD9779A GAIN AUX1_P AUX1_N GAIN AUX2_P AUX2_N 06452-001 10 SDO SDIO SCLK CSB P2D[15:0] REFCLK– COMPLEX MODULATOR P1D[15:0] I LATCH REFCLK+ REFERENCE AND BIAS SYNC_O ཮2. AD9779Aࠀీ઀཮ Rev. B | Page 4 of 56 AD9776A/AD9778A/AD9779A  रຍࡀ߭! ኱ୁࡀ߭ TMIN዁TMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ‫֑ٷ‬ᄣ໏୲Lj ‫ݥأ‬ଷᆶຫ௽Lj ՗1 ֖ຕ ‫ݴ‬Ր୲ ৛‫܈‬ ! ྲ‫ݥݴ‬၍Ⴀ(DNL) ! ओ‫ݥݴ‬၍Ⴀ(INL) ዷDAC๼‫؜‬ ! ฿ۙဃֶ ! ሺᅮဃֶ(๑ᆩాևएጚ‫ۉ‬უᇸ) ! ஢ଉ‫ײ‬๼‫ୁۉ؜‬1 ! ๼‫ۉ؜‬უ‫ྷݔ‬ ! ๼‫ۉ؜‬ፆ ! ዷDAC‫ۙڇ‬Ⴀ ዷDAC࿒‫܈‬೏ᅎ ฿ۙ ሺᅮ एጚ‫ۉ‬უ ‫ޤ‬ዺDAC๼‫؜‬ ‫ݴ‬Ր୲ ஢ଉ‫ײ‬๼‫ୁۉ؜‬1 ๼‫ۉ؜‬უ‫ྷݔ‬DŽᇸDž ๼‫ۉ؜‬უ‫ྷݔ‬DŽဌDž ๼‫ۉ؜‬ፆ ‫ޤ‬ዺDAC‫ۙڇ‬Ⴀ ፌၭኵ 1 एᇀ10 kΩྔև‫ۉ‬ፆ 2 ၘ൧९ࠀࡼև‫ݴ‬ă ፌၭኵ ±0.1 ±0.86 −0.001 8.66 −1.0 0 ±2 20.2 AD9778A ‫ۆ‬႙ኵ ፌ‫ٷ‬ኵ 14 ፌၭኵ ±0.65 ±1.5 +0.001 −0.001 31.66 +1.0 8.66 −1.0 0 ±2 20.2 AD9779A ‫ۆ‬႙ኵ ፌ‫ٷ‬ኵ ‫ڇ‬࿋ 16 Bits ±2.1 ±6.0 +0.001 −0.001 31.66 +1.0 8.66 −1.0 0 ±2 20.2 10 ԍኤ 10 ԍኤ 10 ԍኤ 0.04 100 30 0.04 100 30 0.04 100 30 10 −1.998 0 0.8 एጚ‫ۉ‬უ ాևएጚ‫ۉ‬უ. ๼‫ۉ؜‬ፆ ఇె‫ۉ‬ᇸ‫ۉ‬უ AVDD33 CVDD18 ຕጴ‫ۉ‬ᇸ‫ۉ‬უ DVDD33 DVDD18 ࠀࡼ2 1×ఇ๕LjfDAC=100 MSPSLjIF=1MHz 2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLL࠲ 2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLLਸ 4×ఇ๕LjfDAC/4ۙ዆LjfDAC=500 MSPSLj IF = 137.5 MHzLjQ DAC࠲ 8×ఇ๕LjfDAC/4ۙ዆LjfDAC = 1 GSPSLj IF = 262.5 MHz ! ۖ‫ۉ‬ఇ๕ ! ‫ۉ‬ᇸ‫ۉ‬უᅞ዆Բ(AVDD33) ߾ፕ‫ྷݔ‬ AD9776A ‫ۆ‬႙ኵ ፌ‫ٷ‬ኵ 12 10 +1.998 1.6 1.6 −1.998 0 0.8 LSB LSB +0.001 31.66 +1.0 ppm/°C ppm/°C ppm/°C 10 +1.998 1.6 1.6 −1.998 0 0.8 +1.998 1.6 1.6 1 ԍኤ 1 ԍኤ 1 ԍኤ 1.2 5 1.2 5 1.2 5 % FSR % FSR mA V MΩ Bits mA V V MΩ V kΩ 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 V V 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 V V 250 498 588 572 300 250 498 588 572 300 250 498 588 572 300 mW mW mW mW 980 2.5 −0.3 −40 +25 980 9.8 +0.3 +85 2.5 −0.3 −40 Rev. B | Page 5 of 56 +25 980 9.8 +0.3 +85 2.5 −0.3 −40 +25 mW 9.8 +0.3 +85 mW % FSR/V °C AD9776A/AD9778A/AD9779A ຕጴࡀ߭ TMIN዁TMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ‫֑ٷ‬ᄣ໏୲Lj‫ݥأ‬ ଷᆶຫ௽LjLVDSൻ‫ۯ‬ഗࢅথ๭ഗग़ඹIEEE-1596ၭ‫૾ྷݔ‬ୟLj‫ݥأ‬ଷᆶຫ௽ă ՗2 ֖ຕ! CMOS๼෇இड‫ۉ‬ೝ ๼෇VINஇडߛ ๼෇VINஇड‫گ‬ ֭ኵ้ፌ‫ٷ‬๼෇ຕ਍໏୲ 1× 2× 4× 8× CMOS๼‫؜‬இड‫ۉ‬ೝ(DATACLK, PIN 37)1 ! ๼‫؜‬VOUTஇडߛ ! ๼‫؜‬VOUTஇड‫گ‬ DATACLK๼‫؜‬቞੣Բ LVDSথ๭ഗ๼෇(SYNC_I+, SYNC_I−) ! ๼෇‫ۉ‬უ‫ྷݔ‬VIAईVIB ! ๼෇ֶ‫ݴ‬ពኵVIDTH ! ๼෇ֶ‫׿ݴ‬ውVIDTHH − VIDTHL ! থ๭ഗֶ‫ݴ‬๼෇ፆੇRIN LVDS๼෇໏୲ SYNC_I዁REFCLKॺ૬้क़ SYNC_I዁REFCLKԍ‫้׼‬क़ LVDSൻ‫ۯ‬ഗ๼‫(؜‬SYNC_O+, SYNC_O−) ๼‫ۉ؜‬უߛVOAईVOB ๼‫ۉ؜‬უ‫گ‬VOAईVOB ๼‫ۉݴֶ؜‬უ|VOD| ๼‫؜‬฿ۙ‫ۉ‬უVOS ๼‫؜‬ፆੇRO DAC้ዓ๼෇(REFCLK+, REFCLK−) ! ֶ‫ރރݴ‬ኵ‫ۉ‬უ ! ࠌఇ‫ۉ‬უ ! ፌ‫้ٷ‬ዓ໏୲ 1 ཉॲ! ፌၭኵ!‫ۆ‬႙ኵ!ፌ‫ٷ‬ኵ! ‫ڇ‬࿋ 2.0 0.8 DVDD18, CVDD18 = 1.8 V ± 5% DVDD18, CVDD18 = 1.9 V ± 5% DVDD18, CVDD18 = 2.0 V ± 2% 300 250 200 112.5 125 137.5 MSPS MSPS MSPS MSPS MSPS MSPS 2.4 250 MHzೕ୲Lj5 pF޶ሜ 40 V V 50 0.4 60 V V % SYNC_I+ = VIA, SYNC_I− = VIB 825 −100 1575 +100 20 80 120 250 fSYNC_Iᆌᆩ޹े၌዆Ǘ֖९՗14ዐस٪ഗ0x05Lj ࿋[3:1]‫ڦ‬௮ຎ 0.4 0.55 mV mV mV Ω MSPS ns ns SYNC_O+ = VOA, SYNC_O− = VOB, 100 Ω ‫܋‬থ‫ۉ‬ፆ 1375 ‫܋ڇ‬ 1025 150 1150 80 DVDD18, CVDD18 = 1.8 V ± 5%, PLL࠲ DVDD18, CVDD18 = 1.9 V ± 5%, PLL࠲ DVDD18, CVDD18 = 2.0 V ± 2%, PLL࠲ DVDD18, CVDD18 = 2.0 V ± 2%, PLLਸ 400 300 900 1000 1100 250 ཉॲǖ100 MHz DATACLKೕ୲Lj1 kΩ޶ሜLjፌ‫ٷ‬8 mAൻ‫ీۯ‬૰ă‫ܔ‬ᇀ߸ߛ໏‫܈‬ई߸‫޶ٷ‬ሜLjፌॅፔ݆๟‫ُܔ‬႑ࡽ๑ᆩྔև࣐؋ഗă Rev. B | Page 6 of 56 200 100 250 1250 120 800 400 2000 500 mV mV mV mV Ω mV mV MHz MHz MHz MHz AD9776A/AD9778A/AD9779A ຕጴ๼෇ຕ਍้Ⴞࡀ߭! ໯ᆶఇ๕Lj−40°C዁+85°Că ՗3 ֖ຕ! ๼෇ຕ਍1 ! ॺ૬้क़ ! ԍ‫้׼‬क़ ! ॺ૬้क़ ! ԍ‫้׼‬क़ ჽ‫׿‬ 1×֭ኵ 2×֭ኵ 4×֭ኵ 8×֭ኵ ! ‫ݒ‬Sinc ෙ၍๕থ੨ ! ፌ‫้ٷ‬ዓ໏୲(SCLK) ! ፌ‫܌‬ஞ؋੻‫ۉߛ(܈‬ೝ)tPWH ! ፌ‫܌‬ஞ؋੻‫ۉگ(܈‬ೝ)tPWL ! ॺ૬้क़tDS ! ԍ‫้׼‬क़tDH ! ॺ૬้क़tDS ! ຕ਍ᆶၳtDV ཉॲ ፌၭኵ! ๼෇ຕ਍዁DATACLK ๼෇ຕ਍዁DATACLK ๼෇ຕ਍዁REFCLK ๼෇ຕ਍዁REFCLK 3.0 −0.05 −0.80 3.80 ᆶई࿮ۙ዆! ᆶई࿮ۙ዆! ᆶई࿮ۙ዆! ᆶई࿮ۙ዆! 2 ፌ‫ٷ‬ኵ DACCLKዜ೺ DACCLKዜ೺ DACCLKዜ೺ DACCLKዜ೺ DACCLKዜ೺ 40 12.5 12.5 SDIO዁SCLK SDIO዁SCLK CSB዁SCLK SDO዁SCLK ‫ڇ‬࿋ ns ns ns ns 25 70 146 297 18 2.8 0.0 2.8 2.0 ฉ‫้ۉ‬क़2 ް࿋ ! ፌ‫܌‬ஞ؋੻‫ۉߛ(܈‬ೝ) 1 ‫ۆ‬႙ኵ 260 2 MHz ns ns ns ns ns ns ms DACCLKዜ೺ ‫ۨܮ‬ኵሞPLL্ᆩཉॲူ֪‫ڥ‬ă้Ⴞᇑ࿒‫࠲ڦ܈‬ဣᅜतຕ਍ᆶၳፆ‫شڔ‬੨(ྺඓԍኟඓ֑ᄣLjഗॲᆶၳຕ਍ՂႷ‫؜‬၄‫ !ڦ‬ፌ ‫้܌‬क़)९՗28ă ‫ړ‬स٪ഗ0x00࿋4ٗ1ႀྺ0้LjٗCSBฉืᄂ֪‫ڦڥ‬ኵǗVREFඁ᳘‫ۉ‬ඹྺ0.1 μFă Rev. B | Page 7 of 56 AD9776A/AD9778A/AD9779A ঍ୁࡀ߭ TMIN዁TMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ‫֑ٷ‬ᄣ໏୲Lj ‫ݥأ‬ଷᆶຫ௽Lj ՗4 参数 AD9776A AD9778A AD9779A ፌၭኵ!‫ۆ‬႙ኵ ፌ‫ٷ‬ኵ ፌၭኵ!‫ۆ‬႙ኵፌ‫ٷ‬ኵ ፌၭኵ!‫ۆ‬႙ኵፌ‫ٷ‬ኵ ‫ڇ‬࿋! ࿮ሗො‫ۯ‬ༀ‫(ྷݔ‬SFDR) fDAC = 100 MSPS, fOUT = 20 MHz fDAC = 200 MSPS, fOUT = 50 MHz fDAC = 400 MSPS, fOUT = 70 MHz fDAC = 800 MSPS, fOUT = 70 MHz 82 81 80 85 82 81 80 85 82 82 80 87 dBc dBc dBc dBc 87 80 75 75 87 85 81 80 91 85 81 81 dBc dBc dBc dBc −152 −155 −157.5 −155 −159 −160 −158 −160 −161 dBm/Hz dBm/Hz dBm/Hz 76 69 78 73 79 74 dBc dBc 77.5 76 80 78 81 78 dBc dBc ມᅼ঍ۙ฿ኈ(IMD) fDAC = 200 MSPS, fOUT = 50 MHz fDAC = 400 MSPS, fOUT = 60 MHz fDAC = 400 MSPS, fOUT = 80 MHz fDAC = 800 MSPS, fOUT = 100 MHz ሯำ೷௢‫(܈‬NSD)LjӗᅼLj500 kHzᅼक़ਐ fDAC = 200 MSPS, fOUT = 80 MHz fDAC = 400 MSPS, fOUT = 80 MHz fDAC = 800 MSPS, fOUT = 80 MHz W-CDMAତ‫ڢ‬ႅ୑Բ(ACLR)Lj‫ڇ‬ሜհ fDAC = 491.52 MSPS, fOUT = 100 MHz fDAC = 491.52 MSPS, fOUT = 200 MHz W-CDMA‫ܾڼ‬ତ‫ڢ‬ႅ୑Բ(ACLR)Lj‫ڇ‬ሜհ fDAC = 491.52 MSPS, fOUT = 100 MHz fDAC = 491.52 MSPS, fOUT = 200 MHz Rev. B | Page 8 of 56 AD9776A/AD9778A/AD9779A ਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ ՗5 ֖ຕ! AVDD33, DVDD33 DVDD18, CVDD18 AGND DGND CGND I120, VREF, IPTAT ၎‫ܔ‬ᇀ! AGND, DGND, CGND AGND, DGND, CGND DGND, CGND AGND, CGND AGND, DGND AGND AGND OUT1_P, OUT1_N, OUT2_P, OUT2_N, AUX1_P, AUX1_N, AUX2_P, AUX2_N P1D[15:0], P2D[15:0] DGND DATACLK, TXENABLE DGND REFCLK+, REFCLK− CGND RESET, IRQ, PLL_LOCK, SYNC_O+, SYNC_O−, SYNC_I+, SYNC_I−, CSB, SCLK, SDIO, SDO ঳࿒! ٪‫ئ‬࿒‫!!ྷݔ܈‬ DGND ‫ۨܮ‬ኵ −0.3 V ዁+3.6 V −0.3 V ዁+2.1 V −0.3 V ዁+0.3 V −0.3 V ዁ +0.3 V −0.3 V ዁ +0.3 V −0.3 V ዁ AVDD33 + 0.3 V −1.0 V ዁ AVDD33 + 0.3 V −0.3 V ዁ DVDD33 + 0.3 V −0.3 V ዁ DVDD33 + 0.3 V −0.3 V ዁ CVDD18 + 0.3 V −0.3 V ዁ DVDD33 + 0.3 V ጀᅪLj‫؜ג‬ฉຎਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ੗ీࣷ‫ڞ‬ዂഗॲᆦ৳Ⴀ໦ ࣋ăኄၵኻ๟ፌ‫ۨܮٷ‬ኵLjփᅪ࿆ጣഗॲ੗ᅜሞኄၵईኁ ඪࢆഄ໲‫؜ג‬Ԩरຍࡀ߭ກዐࠀీႠ֡ፕቤব૛Ք௽‫ڦ‬ཉ ॲူీࠕኟ‫߾׉‬ፕă‫׊‬೺ሞਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵཉॲူ߾ፕࣷ ᆖၚഗॲ‫ڦ‬੗੍Ⴀă ඤፆ ‫ܔ‬ᇀ100ᆅগĂොඤሺഽ႙TQFP‫ހ‬ጎLjྺํ၄ፌॅොඤႠ ీLjᆌॽ஋୞ࡰಎ(EPAD)ࡰথ዁থ‫֫ں‬ă ‫ۆ‬႙θJAࢅθJCࡀ߭๢ᆩᇀৢኹ੣ഘူ‫ڦ‬4֫‫ۉ‬ୟӱă੣ഘୁ ‫ۯ‬੗ሺഽොඤLjᆶၳই‫گ‬θJAă ՗6. ඤፆ ‫ހ‬ጎૌ႙! 100ᆅগTQFP ! ࡰথEPAD ! փࡰEPAD θJA θJB θJC ‫ڇ‬࿋ 19.1 27.4 12.4 7.1 °C/W °C/W ESD য়ߢ +125°C −65°C ዁ +150°C Rev. B | Page 9 of 56 ESD(ৢ‫ߌ௺)ۉݣۉ‬ഗॲă ‫ۉټ‬ഗॲࢅ‫ۉ‬ୟӱ੗ీࣷሞுᆶִਥ‫ڦ‬൧઄ူ‫ۉݣ‬ă ৑࠶Ԩׂ೗ਏᆶጆ૧ईጆᆶԍࢺ‫ۉ‬ୟLj‫ڍ‬ሞᇜ‫ీߛڟ‬ ଉESD้Ljഗॲ੗ీࣷ໦࣋ăᅺُLjᆌ‫֑ړ‬ൽ๢‫ڦړ‬ ESD‫ٯݔݞ‬แLjᅜՆ௨ഗॲႠీူইईࠀీෟ฿ă AD9776A/AD9778A/AD9779A AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AGND AVDD33 AVDD33 AGND AVDD33 ᆅগದዃࢅࠀీ௮ຎ 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9776A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D11 17 59 NC P1D10 18 58 NC P1D9 19 57 NC P1D8 20 56 NC P1D7 21 55 P2D0 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D6 24 52 P2D1 P1D5 25 51 P2D2 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 06452-002 P2D3 P2D4 P2D5 P2D6 P2D7 P2D8 DGND DVDD18 P2D9 P2D10 P2D11 TXENABLE/IQSELECT NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. DVDD33 DATACLK NC NC NC DVDD18 NC DGND P1D0 P1D1 P1D2 P1D3 P1D4 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC = NO CONNECT ཮3. AD9776Aᆅগದዃ ՗7. AD9776Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ᆅগఁ‫!׬‬ CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 ௮ຎ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ้ዓ‫ں‬ ֶ‫้ݴ‬ዓ๼෇ ֶ‫้ݴ‬ዓ๼෇ ้ዓ‫ں‬ ้ዓ‫ں‬ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ఇె‫ں‬ ֶ‫ݴ‬ཞօ๼෇ ֶ‫ݴ‬ཞօ๼෇ ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ᆅগ Պࡽ 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Rev. B | Page 10 of 56 ᆅগఁ‫!׬‬ P1D11 P1D10 P1D9 P1D8 P1D7 DGND DVDD18 P1D6 P1D5 P1D4 P1D3 P1D2 P1D1 P1D0 NC DGND ௮ຎ ‫܋‬੨1ຕ਍๼෇D11(MSB) ‫܋‬੨1ຕ਍๼෇D10 ‫܋‬੨1ຕ਍๼෇D9 ‫܋‬੨1ຕ਍๼෇D8 ‫܋‬੨1ຕ਍๼෇D7 ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D6 ‫܋‬੨1ຕ਍๼෇D5 ‫܋‬੨1ຕ਍๼෇D4 ‫܋‬੨1ຕ਍๼෇D3 ‫܋‬੨1ຕ਍๼෇D2 ‫܋‬੨1ຕ਍๼෇D1 ‫܋‬੨1ຕ਍๼෇D0(LSB) փ૶থ ຕጴ‫ں‬ AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 ᆅগఁ‫!׬‬ DVDD18 NC NC NC DATACLK DVDD33 TXENABLE/ IQSELECT P2D11 P2D10 P2D9 DVDD18 DGND P2D8 P2D7 P2D6 P2D5 P2D4 P2D3 P2D2 P2D1 DVDD18 DGND P2D0 NC NC NC NC DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK ௮ຎ 1.8 Vຕጴ‫ۉ‬ᇸ փ૶থ փ૶থ փ૶থ ຕ਍้ዓ๼‫؜‬ 3.3 Vຕጴ‫ۉ‬ᇸ ݀ໃ๑ీă‫܋ڇ‬੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ‫܋‬੨2ຕ਍๼෇D11 (MSB) ‫܋‬੨2ຕ਍๼෇D10 ‫܋‬੨2ຕ਍๼෇D9 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D8 ‫܋‬੨2ຕ਍๼෇D7 ‫܋‬੨2ຕ਍๼෇D6 ‫܋‬੨2ຕ਍๼෇D5 ‫܋‬੨2ຕ਍๼෇D4 ‫܋‬੨2ຕ਍๼෇D3 ‫܋‬੨2ຕ਍๼෇D2 ‫܋‬੨2ຕ਍๼෇D1 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D0 (LSB) փ૶থ փ૶থ փ૶থ փ૶থ 1.8 Vຕጴ‫ۉ‬ᇸ 3.3 Vຕጴ‫ۉ‬ᇸ ֶ‫ݴ‬ཞօ๼‫؜‬ ֶ‫ݴ‬ཞօ๼‫؜‬ ຕጴ‫ں‬ PLL໮ۨኸ๖ ෙ၍๕থ੨‫܋‬੨ຕ਍๼‫؜‬ ෙ၍๕থ੨‫܋‬੨ຕ਍๼෇/๼‫؜‬ ෙ၍๕থ੨‫܋‬੨้ዓ ᆅগ Պࡽ 69 70 71 72 73 ᆅগఁ‫!׬‬ CSB RESET IRQ AGND IPTAT 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 Rev. B | Page 11 of 56 ௮ຎ ෙ၍๕থ੨‫܋‬੨ೌ჋႑ࡽ ް࿋Ljߛ‫ۉ‬ೝᆶၳ ዐ܏൩൱ ఇె‫ں‬ ߾‫֪׍‬๬ᆅগă ๼‫ୁۉ؜‬ᇑਨ‫ܔ‬࿒‫ׯ܈‬Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍ‫ޝ׼‬੣ă एጚ‫ۉ‬უ๼‫؜‬ 120 μAएጚ‫ୁۉ‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ ఇె‫ں‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ AGND AVDD33 AGND AVDD33 AGND AVDD33 OUT2_P AGND OUT2_N AUX2_P AGND AGND AUX2_N AUX1_P AUX1_N AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 AD9776A/AD9778A/AD9779A 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9778A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D13 17 59 NC P1D12 18 58 NC P1D11 19 57 P2D0 P1D10 20 56 P2D1 P1D9 21 55 P2D2 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D8 24 52 P2D3 P1D7 25 51 P2D4 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 P2D6 P2D5 P2D7 P2D8 P2D9 P2D10 DGND P2D11 DVDD18 P2D13 DVDD33 P2D12 06452-003 NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. TXENABLE/IQSELECT DATACLK NC NC P1D0 DVDD18 DGND P1D1 P1D2 P1D3 P1D4 P1D5 P1D6 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC = NO CONNECT ཮4. AD9778Aᆅগದዃ ՗8. AD9778Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 ᆅগఁ‫!׬‬ CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 P1D13 P1D12 ௮ຎ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ้ዓ‫ں‬ ֶ‫้ݴ‬ዓ๼෇ ֶ‫้ݴ‬ዓ๼෇ ้ዓ‫ں‬ ้ዓ‫ں‬ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ఇె‫ں‬ ֶ‫ݴ‬ཞօ๼෇ ֶ‫ݴ‬ཞօ๼෇ ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D13 (MSB) ‫܋‬੨1ຕ਍๼෇D12 ᆅগ Պࡽ 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Rev. B | Page 12 of 56 ᆅগఁ‫!׬‬ P1D11 P1D10 P1D9 DGND DVDD18 P1D8 P1D7 P1D6 P1D5 P1D4 P1D3 P1D2 P1D1 DGND DVDD18 P1D0 NC NC ௮ຎ ‫܋‬੨1ຕ਍๼෇D11 ‫܋‬੨1ຕ਍๼෇D10 ‫܋‬੨1ຕ਍๼෇D9 ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D8 ‫܋‬੨1ຕ਍๼෇D7 ‫܋‬੨1ຕ਍๼෇D6 ‫܋‬੨1ຕ਍๼෇D5 ‫܋‬੨1ຕ਍๼෇D4 ‫܋‬੨1ຕ਍๼෇D3 ‫܋‬੨1ຕ਍๼෇D2 ‫܋‬੨1ຕ਍๼෇D1 ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D0 (LSB) փ૶থ փ૶থ AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 ᆅগఁ‫!׬‬ ௮ຎ DATACLK ຕ਍้ዓ๼‫؜‬ 3.3 Vຕጴ‫ۉ‬ᇸ ݀ໃ๑ీă‫܋ڇ‬੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ‫܋‬੨2ຕ਍๼෇D13 (MSB) ‫܋‬੨2ຕ਍๼෇D12 ‫܋‬੨2ຕ਍๼෇D11 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D10 ‫܋‬੨2ຕ਍๼෇D9 ‫܋‬੨2ຕ਍๼෇D8 ‫܋‬੨2ຕ਍๼෇D7 ‫܋‬੨2ຕ਍๼෇D6 ‫܋‬੨2ຕ਍๼෇D5 ‫܋‬੨2ຕ਍๼෇D4 ‫܋‬੨2ຕ਍๼෇D3 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D2 ‫܋‬੨2ຕ਍๼෇D1 ‫܋‬੨2ຕ਍๼෇D0 (LSB) փ૶থ փ૶থ 1.8 Vຕጴ‫ۉ‬ᇸ 3.3 Vຕጴ‫ۉ‬ᇸ ֶ‫ݴ‬ཞօ๼‫؜‬ ֶ‫ݴ‬ཞօ๼‫؜‬ ຕጴ‫ں‬ PLL໮ۨኸ๖ ෙ၍๕থ੨‫܋‬੨ຕ਍๼‫؜‬ ෙ၍๕থ੨‫܋‬੨ຕ਍๼෇/๼‫؜‬ ෙ၍๕থ੨‫܋‬੨้ዓ ෙ၍๕থ੨‫܋‬੨ೌ჋႑ࡽ ް࿋Ljߛ‫ۉ‬ೝᆶၳ DVDD33 TXENABLE/ IQSELECT P2D13 P2D12 P2D11 DVDD18 DGND P2D10 P2D9 P2D8 P2D7 P2D6 P2D5 P2D4 P2D3 DVDD18 DGND P2D2 P2D1 P2D0 NC NC DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK CSB RESET ᆅগ Պࡽ 71 72 73 ᆅগఁ‫!׬‬ IRQ AGND IPTAT ௮ຎ 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 एጚ‫ۉ‬უ๼‫؜‬ 120 μAएጚ‫ୁۉ‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ ఇె‫ں‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ Rev. B | Page 13 of 56 ዐ܏൩൱ ఇె‫ں‬ ߾‫֪׍‬๬ᆅগă ๼‫ୁۉ؜‬ᇑਨ‫ܔ‬࿒‫ׯ܈‬Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍ‫ޝ׼‬੣ă AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AGND AVDD33 AVDD33 AGND AVDD33 AD9776A/AD9778A/AD9779A 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9779A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D15 17 59 P2D0 P1D14 18 58 P2D1 P1D13 19 57 P2D2 P1D12 20 56 P2D3 P1D11 21 55 P2D4 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D10 24 52 P2D5 P1D9 25 51 P2D6 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 P2D7 P2D8 P2D9 P2D10 P2D11 P2D12 DGND DVDD18 P2D13 P2D14 P2D15 06452-004 NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. TXENABLE/IQSELECT DVDD33 DATACLK P1D0 P1D1 P1D2 DVDD18 P1D3 DGND P1D4 P1D5 P1D6 P1D7 P1D8 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 ཮5. AD9779Aᆅগದዃ ՗9. AD9779Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 ᆅগఁ‫!׬‬ CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 P1D15 P1D14 ௮ຎ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ้ዓ‫ں‬ ֶ‫้ݴ‬ዓ๼෇ ֶ‫้ݴ‬ዓ๼෇ ้ዓ‫ں‬ ้ዓ‫ں‬ 1.8 V้ዓ‫ۉ‬ᇸ 1.8 V้ዓ‫ۉ‬ᇸ ้ዓ‫ں‬ ఇె‫ں‬ ֶ‫ݴ‬ཞօ๼෇ ֶ‫ݴ‬ཞօ๼෇ ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D15 (MSB) ‫܋‬੨1ຕ਍๼෇D14 ᆅগ Պࡽ 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Rev. B | Page 14 of 56 ᆅগఁ‫!׬‬ P1D13 P1D12 P1D11 DGND DVDD18 P1D10 P1D9 P1D8 P1D7 P1D6 P1D5 P1D4 P1D3 DGND DVDD18 P1D2 P1D1 P1D0 ௮ຎ ‫܋‬੨1ຕ਍๼෇D13 ‫܋‬੨1ຕ਍๼෇D12 ‫܋‬੨1ຕ਍๼෇D11 ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D10 ‫܋‬੨1ຕ਍๼෇D9 ‫܋‬੨1ຕ਍๼෇D8 ‫܋‬੨1ຕ਍๼෇D7 ‫܋‬੨1ຕ਍๼෇D6 ‫܋‬੨1ຕ਍๼෇D5 ‫܋‬੨1ຕ਍๼෇D4 ‫܋‬੨1ຕ਍๼෇D3 ຕጴ‫ں‬ 1.8 Vຕጴ‫ۉ‬ᇸ ‫܋‬੨1ຕ਍๼෇D2 ‫܋‬੨1ຕ਍๼෇D1 ‫܋‬੨1ຕ਍๼෇D0 (LSB) AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 ᆅগఁ‫!׬‬ ௮ຎ DATACLK ຕ਍้ዓ๼‫؜‬ 3.3 Vຕጴ‫ۉ‬ᇸ ݀ໃ๑ీă‫܋ڇ‬੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ‫܋‬੨2ຕ਍๼෇D15 (MSB) ‫܋‬੨2ຕ਍๼෇D14 ‫܋‬੨2ຕ਍๼෇D13 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D12 ‫܋‬੨2ຕ਍๼෇D11 ‫܋‬੨2ຕ਍๼෇D10 ‫܋‬੨2ຕ਍๼෇D9 ‫܋‬੨2ຕ਍๼෇D8 ‫܋‬੨2ຕ਍๼෇D7 ‫܋‬੨2ຕ਍๼෇D6 ‫܋‬੨2ຕ਍๼෇D5 1.8 Vຕጴ‫ۉ‬ᇸ ຕጴ‫ں‬ ‫܋‬੨2ຕ਍๼෇D4 ‫܋‬੨2ຕ਍๼෇D3 ‫܋‬੨2ຕ਍๼෇D2 ‫܋‬੨2ຕ਍๼෇D1 ‫܋‬੨2ຕ਍๼෇D0 (LSB) 1.8 Vຕጴ‫ۉ‬ᇸ 3.3 Vຕጴ‫ۉ‬ᇸ ֶ‫ݴ‬ཞօ๼‫؜‬ ֶ‫ݴ‬ཞօ๼‫؜‬ ຕጴ‫ں‬ PLL໮ۨኸ๖ ෙ၍๕থ੨‫܋‬੨ຕ਍๼‫؜‬ ෙ၍๕থ੨‫܋‬੨ຕ਍๼෇/๼‫؜‬ ෙ၍๕থ੨‫܋‬੨้ዓ ෙ၍๕থ੨‫܋‬੨ೌ჋႑ࡽ ް࿋Ljߛ‫ۉ‬ೝᆶၳ DVDD33 TXENABLE/ IQSELECT P2D15 P2D14 P2D13 DVDD18 DGND P2D12 P2D11 P2D10 P2D9 P2D8 P2D7 P2D6 P2D5 DVDD18 DGND P2D4 P2D3 P2D2 P2D1 P2D0 DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK CSB RESET ᆅগ Պࡽ 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Rev. B | Page 15 of 56 ᆅগఁ‫!׬‬ IRQ AGND IPTAT VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 ௮ຎ ዐ܏൩൱ ఇె‫ں‬ ߾‫֪׍‬๬ᆅগă๼‫ୁۉ؜‬ᇑਨ‫ܔ‬࿒‫ׯ܈‬Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍ‫ޝ׼‬੣ă एጚ‫ۉ‬უ๼‫؜‬ 120 μAएጚ‫ୁۉ‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ ఇె‫ں‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬2‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1‫ޤ‬ዺDAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ཚ‫ڢ‬1ֶ‫ݴ‬DAC‫ୁۉ‬๼‫؜‬ ఇె‫ں‬ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ ఇె‫ں‬ 3.3 Vఇె‫ۉ‬ᇸ AD9776A/AD9778A/AD9779A ‫ۆ‬႙߾ፕ༬Ⴀ 100 4 3 fDATA = 160MSPS 90 2 fDATA = 200MSPS SFDR (dBc) INL (16-BIT LSB) 1 0 –1 –2 80 70 fDATA = 250MSPS –3 60 –4 –5 10k 20k 30k 50k 40k 60k 50 CODE 0 20 40 60 80 100 fOUT (MHz) 06452-008 0 06452-005 –6 ཮9. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 2×֭ኵ ཮6. AD9779A‫ۆ‬႙INL 100 1.5 fDATA = 200MSPS fDATA = 100MSPS 1.0 90 SFDR (dBc) DNL (16-BIT LSB) 0.5 0 –0.5 80 fDATA = 150MSPS 70 –1.0 60 –1.5 20k 30k 40k 50k 60k 50 CODE 0 20 40 60 100 50 fOUT (MHz) ཮7. AD9779A‫ۆ‬႙DNL ཮10. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵ 100 100 fDATA = 100MSPS fDATA = 50MSPS 90 80 06452-009 10k 06452-010 0 06452-006 –2.0 90 fDATA = 160MSPS SFDR (dBc) 80 fDATA = 200MSPS 70 60 80 fDATA = 125MSPS 70 60 50 50 0 20 40 60 80 fOUT (MHz) 100 06452-007 SFDR (dBc) fDATA = 250MSPS 0 10 20 30 40 fOUT (MHz) ཮11. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 8×֭ኵ ཮8. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj1×֭ኵ Rev. B | Page 16 of 56 AD9776A/AD9778A/AD9779A 100 100 90 90 PLL OFF PLL ON SFDR (dBc) fDATA = 200MSPS 70 fDATA = 250MSPS 60 80 70 60 50 50 20 40 60 80 100 fOUT (MHz) 0 06452-011 0 10 20 30 40 fOUT (MHz) 06452-014 SFDR (dBc) fDATA = 160MSPS 80 ཮15. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵLjfDATA = 100 MSPSLjPLLਸ/࠲ ཮12. AD9779A‫ྔټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 2×֭ኵ 100 100 0dBFS –3dBFS 90 SFDR (dBc) SFDR (dBc) 90 80 fDATA = 150MSPS 70 80 –6dBFS 70 fDATA = 100MSPS 60 60 fDATA = 200MSPS 40 60 80 100 fOUT (MHz) 0 06452-012 20 20 40 60 80 06452-015 50 0 80 06452-016 50 fOUT (MHz) ཮13. AD9779A‫ྔټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵ ཮16. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj ຕጴ஢ଉ‫ײ‬ 100 100 10mA 90 90 SFDR (dBc) fDATA = 50MSPS 80 fDATA = 100MSPS 70 80 70 30mA fDATA = 125MSPS 60 60 50 50 0 10 20 30 40 fOUT (MHz) 50 06452-013 SFDR (dBc) 20mA 0 20 40 60 fOUT (MHz) ཮17. AD9779A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj ๼‫؜‬஢ଉ‫ୁۉײ‬ ཮14. AD9779A‫ྔټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 8×֭ኵ Rev. B | Page 17 of 56 AD9776A/AD9778A/AD9779A 100 100 fDATA = 160MSPS fDATA = 200MSPS 90 fDATA = 250MSPS 80 IMD (dBc) IMD (dBc) 90 70 80 fDATA = 75MSPS 70 fDATA = 100MSPS fDATA = 50MSPS 60 450 425 400 375 350 325 300 200 175 150 125 75 fOUT (MHz) 06452-020 fOUT (MHz) 100 120 100 50 80 0 60 25 40 06452-017 20 275 fDATA = 125MSPS 50 0 250 50 225 60 ཮21. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj 8×֭ኵ ཮18. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj 1×֭ኵ 100 100 90 90 80 80 IMD (dBc) IMD (dBc) fDATA = 160MSPS fDATA = 200MSPS 70 PLL OFF 70 PLL ON fDATA = 250MSPS 60 60 40 60 80 100 120 140 160 180 200 220 fOUT (MHz) 0 20 40 60 80 100 120 140 160 180 200 06452-021 20 06452-018 0 360 400 06452-022 50 50 fOUT (MHz) ཮22. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵLjfDAT A = 100 MSPSLjPLLਸ/࠲ ཮19. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj 2×֭ኵ 100 100 95 90 90 IMD (dBc) fDATA = 150MSPS 70 80 75 70 fDATA = 100MSPS 65 60 60 fDATA = 200MSPS 55 50 50 0 40 80 120 160 200 240 280 320 fOUT (MHz) 360 400 06452-019 IMD (dBc) 85 80 0 40 80 120 160 200 240 280 320 fOUT (MHz) ཮23. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj50߲ᅜฉഗॲLj 4×֭ኵLjfDATA = 200 MSPS ཮20. AD9779Aෙ঩IMDᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵ Rev. B | Page 18 of 56 AD9776A/AD9778A/AD9779A 100 *ATTEN 20dB REF 0dBm *PEAK Log 10dB 95 EXT REF DC-COUPLED 90 0dBFS IMD (dBc) 85 –3dBFS 80 75 LGAV 51 W1 S2 S3 FC AA £(f): FTUN SWP –6dBFS 70 65 60 55 40 80 120 160 200 240 280 320 360 400 fOUT (MHz) START 1.0MHz *RES BW 20kHz ཮24. AD9779A IMDႠీᇑfOUT ‫࠲ڦ‬ဣLj ຕጴ஢ଉ‫ײ‬๼෇)๼‫؜‬ೕ୲‫*ాྷݔ‬Lj 4×֭ኵLjfDATA = 200 MSPS STOP 400.0MHz SWEEP 1.203s (601 pts) VBW 20kHz 06452-024 0 06452-117 50 ཮27. AD9779Aມᅼೕ೷Lj4×֭ኵLj fDATA = 100 MSPSLjfOUT = 30 MHzĂ35 MHz 100 –142 95 –146 90 20mA 85 –150 NSD (dBm/Hz) IMD (dBc) 10mA 80 75 30mA 70 65 –3dBFS –154 0dBFS –158 –6dBFS –162 60 –166 55 –170 40 80 120 160 200 240 280 320 360 400 fOUT (MHz) 0 06452-118 0 40 60 80 fOUT (MHz) ཮28. AD9779Aሯำ೷௢‫܈‬ᇑfOUT‫࠲ڦ‬ဣLjຕጴ஢ଉ‫ײ‬ )๼‫؜‬ೕ୲‫*ాྷݔ‬Lj‫ڇ‬ᅼ๼෇Lj2×֭ኵLjfDATA = 200 MSPS ཮25. AD9779A IMDႠీᇑfOUT ‫࠲ڦ‬ဣLj஢ଉ‫ײ‬๼‫ୁۉ؜‬ (๼‫؜‬ೕ୲‫)ాྷݔ‬Lj4×֭ኵLjfDATA = 200 MSPS *ATTEN 20dB REF 0dBm *PEAK log 10dB 20 06452-025 50 –150 EXT REF DC-COUPLED –154 NSD (dBm/Hz) fDAC = 400MSPS LGAV 51 W1 S2 S3 FC AA £(f): FTUN SWP fDAC = 200MSPS –158 –162 fDAC = 800MSPS –166 ཮26. AD9779A‫ڇ‬ᅼೕ೷Lj 4×֭ኵLjfDATA = 100 MSPSLjfOUT = 30 MHz 0 20 40 60 fOUT (MHz) 80 100 06452-026 VBW 20kHz STOP 400.0MHz SWEEP 1.203s (601 pts) 06452-023 –170 START 1.0MHz *RES BW 20kHz ཮29. AD9779Aሯำ೷௢‫܈‬ᇑfOUT ‫࠲ڦ‬ဣLjfDAC (๼‫؜‬ೕ୲‫)ాྷݔ‬Lj क़ਐ500 kHz‫ڦ‬ӗᅼ๼෇LjfDATA = 200 MSPS Rev. B | Page 19 of 56 AD9776A/AD9778A/AD9779A –150 –55 –60 –154 –158 ACLR (dBc) NSD (dBm/Hz) –65 fDAC = 200MSPS fDAC = 400MSPS –162 fDAC = 800MSPS 0dBFS, PLL ENABLED –70 –6dBFS, PLL DISABLED –75 –80 –166 –85 –170 0dBFS, PLL DISABLED –3dBFS, PLL DISABLED 40 60 100 80 0 06452-027 20 fOUT (MHz) 20 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) ཮30. AD9779Aሯำ೷௢‫܈‬ᇑfOUT ‫࠲ڦ‬ဣLj fDAC (๼‫؜‬ೕ୲‫)ాྷݔ‬Lj−6 dBFS‫ڇ‬ᅼ๼෇ 06452-301 –90 0 ཮33. AD9779A‫ܾڼ‬၎ତೕ܎W-CDMA‫ڦ‬ACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙ዆ॽए‫ټ‬႑ࡽገ࣑ྺIF –55 –55 –60 –60 0dBFS, PLL ENABLED –65 0dBFS, PLL DISABLED ACLR (dBc) ACLR (dBc) –65 –70 –75 –70 –6dBFS, PLL DISABLED –75 0dBFS, PLL ENABLED –3dBFS, PLL DISABLED –80 –80 –6dBFS, PLL DISABLED –85 –85 –90 –3dBFS, PLL DISABLED 0dBFS, PLL DISABLED 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) 20 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) ཮34. AD9779A‫ڼ‬ෙ၎ତೕ܎W-CDMA‫ڦ‬ACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙ዆ॽए‫ټ‬႑ࡽገ࣑ྺIF ཮31. AD9779A‫ڼ‬ᅃ၎ତೕ܎W-CDMA‫ڦ‬ACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙ዆ॽए‫ټ‬႑ࡽገ࣑ྺIF REF –25.28dBm *AVG log 10dB 0 06452-300 20 06452-302 –90 0 *ATTEN 4dB REF –30.28dBm *AVG log 10dB *ATTEN 4dB EXT REF EXT REF PAVG 10 W1 S2 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz 10.00MHz –12.49dBm/ 15.00MHz 3.84000MHz 3.840MHz 3.840MHz 3.840MHz CENTER 151.38MHz *RES BW 30kHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –76.75 –89.23 –80.94 –93.43 –79.95 –92.44 UPPER dBm dBc –77.42 –89.91 –80.47 –92.96 –78.96 –91.45 VBW 300kHz TOTAL CARRIER POWER –12.61dBm/15.3600MHz REF CARRIER POWER –17.87dBm/3.84000MHz 06452-031 CENTER 143.88MHz *RES BW 30kHz 1 –17.87dBm 2 –20.65dBm 3 –18.26dBm 4 –18.23dBm ཮32. AD9779A W-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLjfDAC /4ۙ዆ FREQ OFFSET 5.000MHz 10.00MHz 15.00MHz INTEG BW 3.840MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –67.70 –85.57 –70.00 –97.87 –71.65 –99.52 UPPER dBm dBc –67.70 –85.57 –69.32 –87.19 –71.00 –88.88 ཮35. AD9779A‫ܠ‬ሜհW-CDMA႑ࡽLj 4×֭ኵLjfDAC = 122.88 MSPSLjfDAC /4ۙ዆ Rev. B | Page 20 of 56 06452-032 PAVG 10 W1 S2 AD9776A/AD9778A/AD9779A 100 1.5 1.0 90 0.5 SFDR (dBc) INL (14-BIT LSB) fDATA = 200MSPS fDATA = 160MSPS 0 80 fDATA = 250MSPS 70 –0.5 60 –1.0 4k 6k 8k 10k CODE 0 20 40 60 100 80 06452-036 2k 0 06452-033 50 –1.5 fOUT (MHz) ཮36. AD9778A‫ۆ‬႙INL ཮4:/!BE:889B‫ాټ‬TGESᇑgPVU ‫࠲ڦ‬ဣLj 3ġ֭ኵ 0.6 0.4 –60 0 ACLR (dBc) DNL (14-BIT LSB) 0.2 –0.2 –70 FIRST ADJACENT CHANNEL THIRD ADJACENT CHANNEL –0.4 –80 –0.6 SECOND ADJACENT CHANNEL –0.8 –90 4k 6k 8k 10k 12k 14k 16k CODE 0 ཮37. AD9778A‫ۆ‬႙DNL 25 50 75 100 125 150 175 200 225 250 06452-037 2k 0 06452-034 –1.0 fOUT (MHz) ཮40. AD9778A ACLRLj‫ڇ‬ሜհW-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLj‫ޗ‬ኵ = −3 dBFS REF –25.39dBm *AVG log 10dB 100 *ATTEN 4dB 90 80 4× 200MSPS 70 4× 100MSPS PAVG 10 W1 S2 CENTER 143.88MHz *RES BW 30kHz 50 0 40 80 120 160 200 240 280 320 fOUT (MHz) 360 400 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz –12.74dBm/ 10.00MHz 3.84000MHz 15.00MHz 3.884MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBc dBm –76.49 –89.23 –80.13 –92.87 –80.90 –93.64 UPPER dBc dBm –76.89 –89.63 –80.02 –92.76 –79.53 –92.27 ཮41. AD9778A ACLRLjfDATA = 122.88 MSPSLj 4×֭ኵLjfDAC /4ۙ዆ ཮38. AD9778A IMDᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵ Rev. B | Page 21 of 56 06452-038 60 06452-035 IMD (dBc) 4× 150MSPS AD9776A/AD9778A/AD9779A –150 0.20 0.15 –154 0.10 –158 DNL (12-BIT LSB) NSD (dBm/Hz) fDAC = 200MSPS fDAC = 400MSPS –162 fDAC = 800MSPS 0.05 0 –0.05 –0.10 –166 –170 –0.20 20 40 60 100 80 fOUT (MHz) 0 06452-039 0 512 1024 1536 2048 2560 3072 3584 4096 CODE ཮42. AD9778Aሯำ೷௢‫܈‬ᇑfOUT ‫࠲ڦ‬ဣLj क़ਐ500 kHz‫ڦ‬ӗᅼ๼෇LjfDATA = 200 MSPS 06452-042 –0.15 ཮45. AD9776A‫ۆ‬႙DNL –150 100 95 90 –154 85 fDAC = 400MSPS –162 fDAC = 800MSPS 80 75 4× 100MSPS 4× 200MSPS 70 65 60 –170 50 4× 150MSPS 55 20 40 60 100 80 fOUT (MHz) 0 06452-040 0 40 80 120 160 200 240 280 320 360 400 06452-043 –166 100 06452-044 –158 IMD (dBc) NSD (dBm/Hz) fDAC = 200MSPS fOUT (MHz) ཮54/!BE:889Bሯำ೷௢‫܈‬ᇑgPVU ‫࠲ڦ‬ဣLj −7!eCGT‫ڇ‬ᅼ๼෇LjgEBUB !>!311!NTQT ཮46. AD9776A IMDᇑfOUT ‫࠲ڦ‬ဣLj 4×֭ኵ 100 0.4 0.3 90 SFDR (dBc) fDATA = 160MSPS 0.1 0 80 fDATA = 250MSPS 70 fDATA = 200MSPS –0.1 –0.2 60 –0.3 50 –0.4 0 512 1024 1536 2048 2560 3072 CODE 3584 4096 06452-041 INL (12-BIT LSB) 0.2 0 20 40 60 80 fOUT (MHz) ཮47. AD9776A‫ాټ‬SFDRᇑfOUT ‫࠲ڦ‬ဣLj 2×֭ኵ Figure 44. AD9776A Typical INL ཮44. AD9776A‫ۆ‬႙INL Rev. B | Page 22 of 56 AD9776A/AD9778A/AD9779A –55 –150 fDAC = 200MSPS –60 –154 fDAC = 400MSPS –65 –70 NSD (dBm/Hz) ACLR (dBc) FIRST ADJACENT CHANNEL THIRD ADJACENT CHANNEL –75 –158 fDAC = 800MSPS –162 –80 SECOND ADJACENT CHANNEL –166 –85 –90 75 100 125 150 175 200 225 250 FOUT (MHz) 0 20 30 40 50 60 70 80 90 100 100 fOUT (MHz) ཮48. AD9776A ACLRᇑfOUT ‫࠲ڦ‬ဣLjfDATA = 122.88 MSPSLj 4×֭ኵLjfDAC /4ۙ዆ REF –25.29dBm *AVG log 10dB 10 06452-047 50 06452-048 25 06452-045 –170 0 ཮50. AD9776Aሯำ೷௢‫܈‬ᇑfOUT ‫࠲ڦ‬ဣLj क़ਐ500 kHz‫ڦ‬ӗᅼ๼෇LjfDATA = 200 MSPS *ATTEN 4dB –150 fDAC = 200MSPS fDAC = 400MSPS NSD (dBm/Hz) –154 –158 fDAC = 800MSPS –162 –166 PAVG 10 W1 S2 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz 10.00MHz –12.67dBm/ 15.00MHz 3.84000MHz 3.884MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –75.00 –87.67 –78.05 –90.73 –77.73 –90.41 UPPER dBm dBc –75.30 –87.97 –77.99 –90.66 –77.50 –90.17 –170 0 10 20 30 40 50 60 70 80 90 fOUT (MHz) 06452-046 CENTER 143.88MHz *RES BW 30kHz ཮51. AD9776Aሯำ೷௢‫܈‬ᇑfOUT ‫࠲ڦ‬ဣLj −6 dBFS‫ڇ‬ᅼ๼෇LjfDATA = 200 MSPS ཮49. AD9776A‫ڇ‬ሜհW-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLj‫ޗ‬ኵ = −3 dBFS Rev. B | Page 23 of 56 AD9776A/AD9778A/AD9779A ຍᇕ ओ‫ݥݴ‬၍Ⴀ(INL) ‫ాټ‬࿮ሗො‫ۯ‬ༀ‫(ྷݔ‬SFDR) INLۨᅭྺํाఇె๼‫؜‬ᇑ૙ၙ๼‫ڦ؜‬ፌ‫ٷ‬ೋֶLj૙ၙ๼ ‫؜‬ᆯٗଭ‫ۉ‬ೝ‫ڟ‬஢ଉ‫ײ‬໯ࣃ‫ڦ‬኱၍ඓۨă ‫ాټ‬SFDRኸ๼‫؜‬႑ࡽ‫ރڦ‬ኵ‫܈ޗ‬ᇑ‫ރ‬ኵሗො႑ࡽኮֶLjᆩ ‫ݴ‬Ԟ՗๖Ǘ޿‫ރ‬ኵሗො႑ࡽ࿋ᇀ኱ୁࢅ๼෇ຕ਍໏୲ᅃӷ ‫ڦ‬ೕ୲ኮक़ă ྲ‫ݥݴ‬၍Ⴀ(DNL) DNL࢚ଉ‫ڦ‬๟ຕጴ๼෇ஓ߀Վ1 LSB้ఇెኵ)ࡃᅃࣅྺ஢ ଉ‫ڦ*ײ‬Վࣅă ‫ۙڇ‬Ⴀ සࡕᅃ߲DAC‫ڦ‬๼‫؜‬ໜጣຕጴ๼෇‫ڦ‬ሺेܸሺेLjईኁԍ ‫׼‬փՎLjሶ޿DAC๟‫ڦۙڇ‬ă ฿ۙဃֶ ஓ0้‫ڦ‬๼‫ୁۉ؜‬ᇑ૙ၙ0ኵ‫ڦ‬ೋֶ‫ྺ׬‬฿ۙဃֶă‫ܔ‬ᇀ IOUTALj‫ړ‬๼෇ྺඇ0้Lj೺ྭ๼‫ྺ؜‬0 mAă‫ܔ‬ᇀIOUTBLj‫ړ‬ ๼෇ྺඇ1้Lj೺ྭ๼‫ྺ؜‬0 mAă ሺᅮဃֶ ሺᅮဃֶኸํा๼‫ྷݔ؜‬ᇑ૙ၙ๼‫ྷݔ؜‬ኮֶLjํा‫ྷݔ‬ ᆯ஢ਗ਼‫܈‬๼‫؜‬ᇑ‫ڹ‬ևਗ਼‫܈‬๼‫؜‬ኮֶඓۨă ๼‫ۉ؜‬უ‫!ྷݔ‬ ๼‫ۉ؜‬უ‫ྷݔ‬ኸ‫ୁۉ‬๼‫؜‬DAC๼‫܋؜‬ඹႹ‫ۉ‬უ‫ྷݔڦ‬ă‫ג‬ ‫؜‬ፌ‫ٷ‬၌ኵ߾ፕ੗ీࣷᆅഐ๼‫؜‬पԏࢅईऍ‫ح‬Lj‫ڞ‬ዂ‫ݥ‬၍ ႠႠీă ࿒‫܈‬೏ᅎ! ࿒‫܈‬೏ᅎ࢚ଉ‫ڦ‬๟࣍ৣ࿒‫(܈‬25°C)ኵᇑTMINईTMAXኵኮक़‫ڦ‬ ፌ‫ٷ‬Վࣅ‫ྷݔ‬ă฿ۙࢅሺᅮ೏ᅎᆩ௅ฝ๧‫܈‬஢ଉ‫ྷݔײ‬ (FSR)‫ڦ‬ppm՗๖Ǘएጚ‫ۉ‬უ೏ᅎᆩ௅ฝ๧‫܈‬ppm՗๖ă ‫ۉ‬ᇸᅞ዆(PSR) PSR࢚ଉ‫ڦ‬๟‫ۉ‬ᇸٗፌၭ‫ۉۨܮ‬უՎྺፌ‫ۉۨܮٷ‬უ้Lj ஢ଉ‫ײ‬๼‫ڦ؜‬ፌ‫ٷ‬Վࣅă ॺ૬้क़! ॺ૬้क़ኸ๼‫ڟٳ؜‬ժԍ‫׼‬ሞፌዕኵᅃۨဃֶ‫ాྷݔ‬໯Ⴔ ‫้ڦ‬क़Ljٗ๼‫؜‬ገ࣑ਸ๔ഐ֪ଉă ‫ྔټ‬࿮ሗො‫ۯ‬ༀ‫(ྷݔ‬SFDR) ‫ྔټ‬SFDRኸ๼‫؜‬႑ࡽ‫ރڦ‬ኵ‫܈ޗ‬ᇑ‫ރ‬ኵሗො႑ࡽኮֶLjᆩ ‫ݴ‬Ԟ՗๖Ǘ޿‫ރ‬ኵሗො႑ࡽ࿋ᇀ๼෇ຕ਍໏୲‫ڦ‬ೕ୲዁ DAC๼‫֑؜‬ᄣ໏୲‫ڦ‬లઊຯ༬ೕ୲‫ڦ‬ೕ܎‫ྷݔ‬ኮాăُೕ ܎ా‫ీڦ‬ଉᅃӯࣷԥ֭ኵ୳հഗᅞ዆ăᅺُLj޿༬Ⴀ࢚ଉ ‫ڦ‬๟֭ኵ୳հഗ‫ڦ‬՗၄ࡻ࣋ᅜत዁DAC๼‫ڦ܋؜‬ഄ໲सิ ᳘ࢇୟ০‫ڦ‬ᆖၚă ጺၿհ฿ኈ(THD) THDኸമୃ߲ၿհ‫ڦݴׯ‬਩‫ࢅߵݛ‬ᇑ໯֪‫ڥ‬एհ‫ڦ‬਩‫ߵݛ‬ ኵኮԲLjᆩӥ‫ݴ‬Բई‫ݴ‬Ԟ՗๖ă ႑ሯԲ(SNR) SNRኸ໯֪‫ڥ‬๼‫؜‬႑ࡽ‫ڦ‬਩‫ߵݛ‬ኵᇑ‫أ‬മୃ߲ၿհࢅ኱ୁ ኮྔ‫ڦ‬໯ᆶೕ೷‫ݴ‬ଉ‫ڦ‬਩‫ࢅߵݛ‬ኮԲLjᆩ‫ݴ‬Ԟ՗๖ă ֭ኵ୳հഗ! සࡕᅜfDATA‫ڦ‬Ԡ୲)֭ኵ୲*‫ܔ‬DAC‫ڦ‬ຕጴ๼෇৊ႜ֑ᄣLj ሶ੗ᅜࠓॺᅃ߲ሞf DATA /2޹ৎਏᆶ෍ࡗ‫ڦټ܉‬ຕጴ୳հ ഗăኄᄣ੗ᅜ‫ٷٷ‬ᅞ዆ཚ‫׉‬࿋ᇀfDAC)๼‫؜‬ຕ਍໏୲*޹ৎ‫ڦ‬ ৥ၟă ତ‫ڢ‬ႅ୑Բ(ACLR) ACLRኸᅃ߲ཚ‫֪ڦాڢ‬ଉࠀ୲ᇑഄ၎ତཚ‫֪ڦాڢ‬ଉࠀ ୲ኮԲLjᆩdBc՗๖ă ްຕ৥ၟᅞ዆! ሞ‫د‬ཥ‫ڦ‬ଇ܎ฉՎೕዐLj੍ৎ‫ܾڼ‬ዐೕೕ୲ׂࣷิଇ߲৥ ၟăኄၵ৥ၟࣷሰ‫݀ׯ‬พഗࠀ୲ࢅဣཥ‫ڦ੻ټ‬ષ‫ݯ‬ăॽ‫ڼ‬ ܾްຕۙ዆ഗ‫ํڦ‬ևᇑ‫ڼ‬ᅃްຕۙ዆ഗ‫૴ز‬LjՍ੗ᅜᅞ዆ ‫ܾڼ‬ዐೕ޹ৎ‫ڦ‬ডߛईড‫گ‬ೕ୲৥ၟă Rev. B | Page 24 of 56 AD9776A/AD9778A/AD9779A ߾ፕᇱ૙ AD9776A/AD9778A/AD9779AਏᆶႹ‫ܠ‬༬ႠLj‫׉ݥ‬๢ࢇᆶ ၍ࢅ࿮၍ཚ႑ဣཥăยऺ‫ڇ‬Չ‫݀ټ‬พഗ้Ljഄມୟຕጴ႑ ࡽୟ০ࢅມཚ‫ڢ‬DAC঳ࠓ࢔ඹᅟᇑ೵ཚኟ঍ۙ዆ഗথ੨ă ᇑᅜമ༵ࠃ‫ڦ‬DAC၎ԲLjኄၵഗॲ‫ڦ‬໏‫ࢅ܈‬Ⴀీኧ‫ߛ߸׼‬ ‫੻ټڦ‬त߸‫ܠ‬ሜհ‫ׯࢇڦ‬ăຕጴᆅ൤֑ᆩण֭ኵ୳հഗࢅ ຕጴኟ঍ۙ዆ഗᇀᅃ༹‫ظڦ‬ႎ୳հഗ঳ࠓLjᅺܸኄၵഗॲ ీࠕኴႜຕጴኟ঍ฉՎೕă૧ᆩೌాཞօ‫ۉ‬ୟLj‫߲ܠ‬ഗॲ ੗ᅜԵُཞօLjईኁᇑဣཥ้ዓཞօă AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/ AD9779A‫ڦ‬൶՚ REFCLKፌ‫ٷ‬ೕ୲ᇑ‫ۉ‬ᇸ‫࠲ڦ‬ဣ AD9776A/AD9778A/AD9779Aኧ‫׼‬ፌ‫ٷ‬1100 MHz‫֑ڦ‬ᄣ໏ ୲Lj‫ܔڍ‬DVDD18ࢅCVDD18ᆶᅃၵ၌዆ă՗2ଚ‫؜‬କ߳‫ۉ‬ ᇸ‫ۉ‬უ‫ܔ‬ᆌ‫ڦ‬ᆶၳ߾ፕೕ୲ă REFCLK‫ޗ‬ኵ ॽᅃֶ߲‫ݴ‬ኟ၀้ዓแेᇀREFCLK้LjAD9776/AD9778/ AD9779ฉ‫ڦ‬PLL࿮݆ํ၄ፌॅሯำႠీLj‫ॽݥأ‬REFCLK ֶ‫ޗݴ‬ኵ༵ߛ‫ڟ‬2 V‫ރރ‬ኵă൩ጀᅪLjසࡕAD9776/AD9778 /AD9779๑ ᆩ LVPECLൻ ‫ ۯ‬ഗ Lj ሶ ‫ ړ‬REFCLK‫ ޗ‬ኵ ሞ LVPECL‫ۨܮ‬ኵ‫100 kΩ)ă నᅃ߲๼‫؜‬ᆅগᆶၳLjൽਦᇀ‫ܔ‬स٪ഗ0x0Eࢅ0x12‫ڦ‬࿋7 ໯ႀ‫ڦ‬ኵă 0mA TO 2mA (SOURCE) AD9776A/AD9778A/AD9779Aీࠕၩ‫أ‬໯ᆶኄၵփ૧ᆖ ၚă൩ጀᅪLjኄၵᆖၚࣷໜጣ࿒‫ܸ܈‬೏ᅎǗᅺُLjසࡕထ ྭํ၄ৎࢭፌॅ‫ڇڦ‬Չ‫ټ‬ႠీLj੗ీႴᄲॠ֪ኄၵᆖၚໜ ࿒‫ڦ܈‬ՎࣅLjժᇎᅜၯኟă AUXP VBIAS 0mA TO 2mA (SINK) AUXN P/N SOURCE/ SINC I/Qཚ‫ڢ‬ሺᅮ೅ದ ሺᅮ೅ದ๟ཚࡗۙኝDACሺᅮस٪ഗ‫ڦ‬ኵܸํ၄ă‫ܔ‬ᇀI DACLjኄၵኵ࿋ᇀ0x0Bࢅ0x0C I DAC੦዆स٪ഗዐă‫ܔ‬ᇀ Q DACLjኄၵኵ࿋ᇀ0x0Fࢅ0x10 Q DAC੦዆स٪ഗዐăኄ ၵኵᆶ10࿋ăኴႜሺᅮց‫้׋‬LjӀቷࠦۨ‫ڦ‬օ‫ޗ‬ሺ‫ٷ‬ई३ ၭഄዐᅃ߲स٪ഗ‫ڦ‬ኵLj඗ࢫ֪ଉ߅ඡ৥ၟ‫ޗڦ‬ኵăසࡕ ߅ඡ৥ၟ‫ޗڦ‬ኵሺ‫ٷ‬LjሶᆌཕኹLjገܸ‫ܔ‬ଷᅃ߲DAC੦዆ स٪ഗ‫׈‬๬ཞᄣ‫ۙڦ‬ኝLj኱‫ڟ‬࿮݆ཚࡗۙኝኄၵस٪ഗ๑ ৥ၟᅞ዆‫ڟڥ‬৊ᅃօ߀฀ྺኹă ᆌ‫ړ‬ጀᅪLjLOઍཚց‫܀׋‬૬ᇀሺᅮăփࡗLjሺᅮց‫׋‬੗ీ ࣷᆖၚLOց‫׋‬Ljᅺྺሺᅮց‫׋‬੗ీࣷ߀Վ႑ࡽ‫ࠌڦ‬ఇ‫ۉ‬ ೝăగၵۙ዆ഗ‫ڦ‬኱ୁ฿ۙᇑࠌఇ‫ۉ‬ೝ၎࠲ăᅺُLjॺᅱ ሺᅮۙኝံᇀLOց‫׋‬ኴႜă ‫ޤ‬ዺDAC֡ፕ AD9776A/AD9778A/AD9779A༵ࠃକଇ߲‫ޤ‬ዺDACăኄၵ DAC‫ڦ‬஢ଉ‫ײ‬๼‫ୁۉ؜‬๟ᆯ1.2 V‫ټ‬ဤएጚ‫ۉ‬უᇸࢅI120ᆅ গᇑ‫ں‬ኮक़‫ྔڦ‬և‫ۉ‬ፆਦۨă‫ޤړ‬ዺDACሺᅮยዃྺ஢ଉ ‫)้ײ‬10࿋ኵLjෙ၍๕থ੨स٪ഗ0x0Dࢅ0x11*Ljٗएጚ‫ۉ‬ უ‫ٷݣ‬ഗ‫(ୁۉ‬IREFERENCE)‫ޤڟ‬ዺDACएጚ‫ڦୁۉ‬ሺᅮԲ૩ྺ 16.67ăኄ๑‫ޤڥ‬ዺDAC1ࢅ‫ޤ‬ዺDAC2‫ڦ‬஢ଉ‫ୁۉײ‬ሀྺ 2 mAă 06452-303 ૧ᆩఇెኟ঍ۙ዆ഗLj‫׉ݥ‬ඹᅟํ၄‫ڇ‬Չ‫ټ‬࿮၍‫ۉ‬ăփ ࡗLjኟ঍ۙ዆ഗᆶ‫߲ܠ‬ই‫گ‬ఇెႠీ‫ݥڦ‬૙ၙ༬ႠLjഄዐ Ԉઔǖ ཮78. AD9776A/AD9778A/AD97779A‫ޤڦ‬ዺDACᇸ‫ୁۉ‬/ဌ‫ୁۉ‬ ‫ޤ‬ዺDAC1‫ޗୁۉڦ‬ኵᆯ0x0Dࢅ0x0E‫ޤ‬ዺDAC1੦዆स٪ഗ ੦዆Lj‫ޤ‬ዺDAC2‫ޗୁۉڦ‬ኵᆯ0x11ࢅ0x12‫ޤ‬ዺDAC2੦዆ स٪ഗ੦዆ăኄၵ‫ޤ‬ዺDACీࠕ༵ࠃᇸ‫ୁۉ‬ईဌ‫ୁۉ‬Ljਏ ༹๟ᆯ߳‫ޤ‬ዺDAC੦዆स٪ഗ‫ڦ‬࿋6੦዆ă༵ࠃᇸ‫ୁۉ‬ई ဌ‫ୁۉ‬Ljᆌሞ‫ۉ‬ୟยऺ঩܎ፔ‫؜‬჋ስă‫ۉ‬ୟۨ႙ࢫLjሞ‫ۉ‬ ୁᇸࢅ‫ୁۉ‬ဌ๭ഗኮक़ൎ࣑ժ࿮ᅮ‫ت‬ă ‫ړ‬DAC๼‫ࢫ܋؜‬থኟ঍ۙ዆ഗ้Lj‫ޤ‬ዺDAC੗ᅜᆩᇀLO ‫ڸ‬ၩă޿LOઍཚ๟ᆯኟ঍ۙ዆ഗ‫ڦ‬๼෇֖੊኱ୁ฿ۙ‫ۉ‬უ )ᅜतDAC๼‫؜‬฿ۙ‫ۉ‬უ฿ದ*ᆅഐ‫ڦ‬Lj੗ీࣷই‫گ‬ဣཥႠ ీă DACᇑኟ঍ۙ዆ഗ‫ۆڦ‬႙থ੨ස཮79໯๖ăۙ዆ഗ‫ڦ‬๼෇ ࠌఇ‫ۉ‬უᅃӯᇺߛᇀDAC‫ڦ‬๼‫ۉ؜‬უLjᅺُᆶՂᄲ๑ᆩ঍ ୁ᳘ࢇई኱ୁ‫ۉ‬ೝገ࣑ăසࡕኟ঍ۙ዆ഗ໯Ⴔ‫ࠌڦ‬ఇ๼෇ ‫ۉ‬უᇑDAC‫ۉ‬უ೅ದLjሶ੗ᅜ๑ᆩ཮79໯๖‫ڦ‬኱ୁ‫ݛ‬๕ă ‫ړ‬ኟ঍ۙ዆ഗ๼෇‫܋‬ઠጲDAC‫ڦ‬ሗො႑ࡽ)฿ኈࢅDAC৥ ၟ*੗ీᆖၚဣཥႠీ้Ljॺᅱ๑ᆩ‫گ‬ཚई‫ټ‬ཚ୳հഗăॽ ୳հഗ‫ݣ‬ሞ཮79໯๖࿋ዃ੗ᅜ०ࣅ୳հഗยऺLjᅺྺᇸፆ ੇࢅ޶ሜፆੇ࢔ඹᅟยऺྺথৎ50 Ωă Rev. B | Page 44 of 56 AD9776A/AD9778A/AD9779A ሺᅮࢅ฿ۙၯኟ঳ࡕ! 90 AUX1_P AD9779A 500Ω 250Ω 93 OUT1_P RBIP 50Ω 82pF C1I RBIN 92 50Ω 89 39pF C2I 21 82pF C3I ሺᅮࢅ฿ۙၯኟ‫ڦ‬঳ࡕ੗ᅜٗ཮80ࢅ཮81ੂ‫؜‬ă཮80၂๖ କሺᅮࢅ฿ۙၯኟኮമኟ঍ۙ዆ഗ‫ڦ‬๼‫؜‬ೕ೷ă཮81၂๖ କၯኟኮࢫ‫ڦ‬๼‫؜‬ೕ೷ă2.1 GHzೕ୲‫ڦت‬LOઍཚᅙԥᅞ ዆‫ڟ‬ሯำ຤ೝăሏᆩၯኟ੗ᅜํ၄޿঳ࡕLj‫ڍ‬සࡕ࿒‫݀܈‬ ิড‫ٷ‬ՎࣅLjሶႴᄲዘႎၯኟă IBBP RSLI 100Ω 22 OUT1_N 250Ω LPI 390nH LNI 390nH IBBN ൩ጀᅪLjሺᅮ೅ದ߀฀କ޶ೕ୲৥ၟᅞ዆Lj‫ڍ‬ධ඗٪ሞ௽ ၂‫ڦ‬৥ၟă฻ᇆ৥ၟઠᇸᇀኟ঍ۙ዆ഗ‫ڦ‬၎࿋฿ದă၎࿋ ฿ದᇑሺᅮ฿ದ੗ᅜཚࡗ৥ၟ‫ڦ‬ႚጒઠ൶‫ݴ‬ăጀᅪ཮80ዐ ‫ڦ‬৥ၟ၎‫ܔ‬ডೝ།Lj཮81ዐ‫ڦ‬৥ၟሶໜೕ୲ሺेܸူইă ၎࿋฿ದᇑೕ୲၎࠲Ljᅺُ၎࿋฿ದ቞ዷ‫ڦڞ‬৥ၟਏᆶኄ ዖൡၽ༬ኙă AUX1_N 500Ω 87 AUX2_N 250Ω 84 LNQ 390nH RBQN 50Ω 82pF C1Q 9 RBQP 83 50Ω 250Ω 82pF C3Q LPQ 390nH QBBN RSLQ 100Ω 10 OUT2_P 86 39pF C2Q QBBP AUX2_P 500Ω 0 06452-093 500Ω OUT2_N REF LVL 0dBm RBW VBW SWT 3kHz 3kHz 56s REF ATT MIXER UNIT 30dB –40dBm dBm –10 –20 –30 ཮79. ‫ޤ‬ዺDAC঍ୁ᳘ࢇ዁ኟ঍ۙ዆ഗ‫ۆڦ‬႙ᆩ݆ –40 LOઍཚց‫׋‬ –50 LOઍཚց‫׋‬๟໯ᆶෙዖ֡ፕዐፌްሗ‫ڦ‬ᅃዖăኄ๟ᆯ฿ۙ ‫ޤ‬ዺDAC‫ڦ‬঳ࠓ໯ਦۨ‫ڦ‬Ljස཮78໯๖ăྺሞ‫ۉ‬ୟዐํ၄ LOઍཚց‫׋‬Ljኄၵ‫ޤ‬ዺDAC‫຺ڦ‬ୟ๼‫߳؜‬ጲ‫ۼ‬੗ᅜཚࡗ ᅃ߲500 Ω‫ۉ‬ፆথ‫ں‬Ljժཚࡗᅃ߲250 Ω‫ۉ‬ፆ૶থ‫຺ڟ‬ୟኟ ঍ۙ዆ഗ႑ࡽ๼෇‫܋‬ኮᅃăኄၵ૶থ‫ڦ‬ፕᆩ๟ॽ‫׉ݥ‬ၭ‫ڦ‬ ‫ୁۉ‬ൻ‫ۯ‬዁ኟ঍ۙ዆ഗ๼෇‫ڦ܋‬঳‫ۅ‬Lj๑ഄዐᅃୟኟ঍ۙ ዆ഗ႑ࡽ๼෇‫܋‬ሺेྲၭ኱ୁೋዃă –60 ྺํ၄LOઍཚց‫׋‬Ljᆩࢽᆌٗ‫ޤ‬ዺDAC‫ࡽޙ‬स٪ഗ‫ڦ‬ఐ ණཉॲਸ๔Lj඗ࢫ‫ڿ‬ሺగ߲‫ޤ‬ዺDAC๼‫ޗڦୁۉ؜‬ኵăྜ ‫ׯ‬ኮࢫLjᆌॠ֪ኟ঍ۙ዆ഗ๼‫܋؜‬LOઍཚ‫ޗڦ‬ኵăසࡕ LOઍཚ‫ޗ‬ኵሺ‫ٷ‬Lj൩‫׈‬๬߸߀໯ۙኝ‫ޤڦ‬ዺDAC‫ޙڦ‬ ࡽLjईኁۙኝଷᅃ߲‫ޤ‬ዺDAC‫ڦ‬๼‫ୁۉ؜‬ăྺକइ‫ڥ‬ᆶၳ ‫ڦ‬໙݆Lj੗ీႴᄲ৊ႜଁသă –70 –80 –100 CENTER 2.1GHz 20MHz SPAN 200MHz 06452-304 –90 ཮81. AD9779AࢅADL5372Lj2.1 GHz‫ܠ‬ᅼ႑ࡽLjঢ়ࡗሺᅮࢅ LOց‫׋‬ᆫࣅ 0 REF LVL 0dBm RBW VBW SWT 20kHz 20kHz 1.25s REF ATT MIXER UNIT 20dB –40dBm dBm –10 –20 –30 –40 ๑ᆩAD9776A/AD9778A/AD9779AೠࠚӱLjLOઍཚཚ‫׉‬੗ ᅜۙኝ‫ڟ‬Ԩ‫ڹ‬ሯำ຤ೝLjփࡗኄժփ࿘ۨLjࣷໜ࿒‫ܸ܈‬Վ ࣅă –50 –60 –70 –80 CENTER 2.1GHz 20MHz SPAN 200MHz 06452-305 –90 –100 ཮81. AD9779AࢅADL5372Lj2.1 GHz‫ܠ‬ᅼ႑ࡽLjঢ়ࡗሺᅮࢅ LOց‫׋‬ᆫࣅ Rev. B | Page 45 of 56 AD9776A/AD9778A/AD9779A ๼෇ຕ਍‫܋‬੨! ມ‫܋‬੨ఇ๕! AD9776A/AD9778A/AD9779Aీᅜଇዖຕ਍๼෇ఇ๕߾ ፕǖມ‫܋‬੨ఇ๕ࢅ‫܋ڇ‬੨ఇ๕ăఐණఇ๕๟ມ‫܋‬੨ఇ๕(‫ڇ‬ ‫܋‬੨࿋ = 0)Lj߳DACٗጆᆩ๼෇‫܋‬੨থ๭ຕ਍ă‫܋ڇ‬੨ఇ ๕(‫܋ڇ‬੨࿋ = 1)ူLjଇ߲DAC਩ٗ‫܋‬੨1থ๭ຕ਍LjDAC1 ࢅDAC2ຕ਍঍‫ٱ‬LjTXENABLE๼෇ᆩઠॽຕ਍ᆅ‫ڞ‬዁ణ ՔDACăມ‫܋‬੨ఇ๕ူLjTXENABLE๼෇ᆩઠ࠲܏ຕጴຕ ਍ୟ০ă ມ‫܋‬੨ఇ๕ူLj߳EBD‫ڦ‬ຕ਍ሞ၎ᆌ‫ڦ‬๼෇ጺ၍)Q2E \26;1^ईQ3E\26;1^*ฉথ๭ăJࢅRຕ਍ཞ้‫ٳڟ‬Ljժሞ EBUBDML႑ࡽ‫ڦ‬ฉืᄂ৊ႜ֑ᄣăUYFOBCMF႑ࡽՂ Ⴗྺߛ֍ీ๑ీ݀พୟ০ă! ๼෇ຕ਍ᅜDATACLKྺ֖੊ ‫ړ‬๼෇ຕ਍ᅜEBUBDML๼‫้੊֖ྺ؜‬LjᇑBE:887B0! BE:889B0BE:88:B‫ڦ‬থ੨ፌྺ०‫ڇ‬ăEBUBDML๼‫ྺ؜‬ ᆩઠ໮٪๼෇ຕ਍‫ాڦ‬և้ዓ‫࣐ڦ‬؋ӲԨDŽࡤగዖࠦۨჽ ‫׿‬DžăᅺُLjසࡕ‫ࢇޙ‬๼෇ຕ਍၎‫ܔ‬ᇀEBUBDML‫ॺڦ‬૬ ࢅԍ‫้׼‬क़Lj৽ీኟඓ໮٪๼෇ຕ਍ă཮93ߴ‫؜‬କᅜ EBUBDMLྺ้Ⴞ֖੊‫܋ڇڦ‬੨ఇ๕ࢅມ‫܋‬੨ఇ๕ၘဦ้ Ⴞ཮ă! ມ‫܋‬੨ఇ๕ူLjՂႷᅜ๼෇ຕ਍໏୲༵ࠃຕ਍ă‫܋ڇ‬੨ఇ ๕ူLjՂႷᅜ߳DAC๼෇ຕ਍໏୲‫ڦ‬ଇԠ༵ࠃຕ਍ăຕ਍ ๼෇‫ڦ‬ፌߛ໏୲ྺ300 MSPSLjᅺُሞ‫܋ڇ‬੨ఇ๕ူLj௅߲ DAC‫ڦ‬๼෇ຕ਍໏୲ፌߛ੗‫ٳ‬150 MHză ሞມ‫܋‬੨ࢅ‫܋ڇ‬੨ఇ๕ူLj੗ᅜᆩᅃ߲ຕ਍้ዓ๼‫؜‬ (DATACLK)႑ࡽፕྺ้ࠦۨक़ए‫إ‬LjᅜՍٗFPGAईഄ໲ ຕ਍ᇸइ‫ڥ‬ຕ਍ăُ๼‫؜‬႑ࡽᅜ๼෇ຕ਍໏୲߾ፕă ‫܋ڇ‬੨ఇ๕! tSDATACLK ‫܋ڇ‬੨ఇ๕ူLjଇ߲DAC‫ڦ‬ຕ਍਩ሞ‫܋‬੨1๼෇ጺ၍(P1D [15:0])ฉথ๭ăIࢅQຕ਍ᄣԨ঍‫ٱ‬LjժሞDATACLK‫ڦ‬ฉ ืᄂ৊ႜ֑ᄣăᇑຕ਍ᅃ‫ڢ‬Lj࣏ՂႷሞTXENABLE๼෇(ᆅ গ39)ฉ༵ࠃᅃ߲ኡ‫د‬๼႑ࡽLjᅜՍॽ๼෇ຕ਍ᆅ‫ڞ‬዁၎ᆌ ‫ ڦ‬DACă ‫ ړ‬TXENABLEྺ ߛ ้ Lj ‫ ܔ‬ᆌ ‫ ڦ‬ຕ ਍ ጴ ໃ ዁ I DACă‫ړ‬TXENABLEྺ‫้گ‬Lj‫ܔ‬ᆌ‫ڦ‬ຕ਍ጴໃ዁Q DACă ঍‫ٱ‬ఇ๕ူຕጴথ੨‫้ڦ‬Ⴞස཮83໯๖ă tHDATACLK DATA 06452-308 DATACLK ཮82. ๼෇ຕ਍‫܋‬੨้ႾLjຕ਍ᅜDATACLKྺ֖੊ ՗28၂๖କሞഗॲ‫߾ڦ‬ፕ࿒‫ాྷݔ܈‬๼෇ຕ਍‫ॺڦ‬૬ࢅԍ ‫้׼‬क़ᄲ൱Ljཞ้၂๖କፆ‫شڔ‬੨(KOW)ăፆ‫شڔ‬੨๟থ ੨‫ॺڦ‬૬ࢅԍ‫้׼‬क़ኮࢅLj՗௽ྺକඓԍኟඓ֑ᄣLjኄ๟ ᆶၳຕ਍ՂႷ‫؜‬၄ሞഗॲฉ‫ڦ‬ፌ‫้܌‬क़ă DATACLKೕ୲ยዃ DATACLK႑ ࡽ ٗ ా և DAC֑ ᄣ ้ ዓ DACCLKइ ‫ ڥ‬ă DATACLK๼‫ڦ؜‬ೕ୲ൽਦᇀ‫߲ܠ‬Պ‫ײ‬ยዃăᅃӯܸჾLj DATACLK‫ڦ‬ೕ୲‫ڪ‬ᇀ๼෇ຕ਍໏୲ăDACCLKᇑDATACLK‫࠲ڦ‬ဣ๕සူǖ f DACCLK f DATACLK IF ZS SP u DATACLKDIV u u Q๯࿋(स٪ഗ0x02‫ڦ‬࿋0)੦዆๼෇ຕ਍‫ڦ‬ದ‫ܔ‬ຩႾă‫ړ‬Q ๯࿋ยྺఐණኵ0้Ljໃ዁DAC‫ڦ‬I-Q‫ܔྺܔ‬ᆌᇀTXENABLEံ‫ڦߛࢫگ‬ଇ߲๼෇ຕ਍ጴă‫ړ‬Q๯࿋ยྺ1้Ljໃ ዁DAC‫ڦ‬I-Q‫ܔྺܔ‬ᆌᇀTXENABLEံߛࢫ‫ڦگ‬ଇ߲๼෇ ຕ਍ጴă൩ጀᅪLj࿮ஃӀቷࢆዖຩႾದ‫ܔ‬Lj‫ܔ‬ᆌᇀTXENABLEߛ‫ڦ‬ຕ਍‫ۼ‬๟ԥᆅ‫ڞ‬዁I DACLj‫ܔ‬ᆌᇀTXENABLE‫گ‬ ‫ڦ‬ຕ਍‫ۼ‬๟ԥᆅ‫ڞ‬዁Q DACă ഄዐLjՎଉIFĂZSĂSPࢅDATACLKDIV‫ڦ‬ኵස՗27໯๖ă DATACLK P1D[15:0] P1D1 P1D2 P1D3 P1D4 P1D5 P1D6 P1D7 P1D8 TXENABLE I DAC[15:0] P1D1 P1D3 P1D5 Q DAC[15:0] P1D2 P1D4 P1D6 I DAC[15:0] P1D1 P1D3 P1D5 Q DAC[15:0] P1D0 P1D2 P1D4 Q FIRST = 1 ཮83. ‫܋ڇ‬੨ఇ๕ຕጴথ੨้Ⴞ Rev. B | Page 46 of 56 06452-306 Q FIRST = 0 AD9776A/AD9778A/AD9779A DATACLKDIVৈᆖၚDATACLK๼‫؜‬ೕ୲Ljܸփᆖၚຕ਍ ֑ᄣ้ዓ‫ڦ‬ೕ୲ăྺ๑๼෇ຕ਍֑ᄣೕ୲fDATACLK๔ዕᇑ೺ ྭຕ਍໏୲ԍ‫׼‬ᅃዂLjDATACLKDIVᆌยྺ00ă ZS 1(ଭኵག؊্ᆩ) 2(ଭኵག؊๑ీ) 0.5(‫܋ڇ‬੨๑ీ) 1(჋ስມ‫܋‬੨) 1Ă2ई4 SP DATACLKDIV tSREFCLK ‫ں‬኷ स٪ഗ 0x01 ࿋ [7:6] 0x01 [0] 0x02 [6] 0x03 [5:4] tHREFCLK ๼෇ຕ਍ᅜREFCLKྺ֖੊ గၵဣཥዐLjᆩREFCLK๼෇ԲᆩDATACLK๼‫؜‬ፕྺ๼෇ຕ ਍้Ⴞ֖੊߸‫ݛ‬ՍăසࡕDACCLK‫ڦ‬ೕ୲‫ڪ‬ᇀຕ਍๼෇‫ڦ‬ ೕ୲)࿮֭ኵ*Ljሶ၎‫ܔ‬ᇀREFCLK±՗28໯๖้Ⴞࡀ߭‫ڦ‬ຕ ਍੗ᅜ኱থ๑ᆩLj࿮Ⴔ߸‫੊ܠ‬୯ăසࡕDACCLK‫ڦ‬ೕ୲‫ٷ‬ ᇀ๼෇ຕ਍‫ڦ‬ೕ୲Ljሶ੗ᅜ૧ᆩ‫ݴ‬ೕഗׂิDATACLK๼‫؜‬ )ᅜतాևຕ਍֑ᄣ้ዓ*ăُ‫ݴ‬ೕഗࣷሞREFCLKࢅDATACLKኮक़ሰ‫ׯ‬၎࿋ఇࢵLj‫ڞ‬ዂ֑ᄣ้क़փඓۨăྺକඓ૬ ຕ਍থ੨‫ॺڦۨࠦڦ‬૬ࢅԍ‫้׼‬क़LjՂႷၩ‫أ‬ኄዖ၎࿋ఇ ࢵă 06452-309 ኵ ֭ኵဣຕ(1Ă2Ă4ई8) tH_SYNC tS_SYNC REFCLK ՗27. ٗDACCLKइ‫ڥ‬DATACLK‫ݴڦ‬ೕኵ Վଉ IF SYNC_I DATA ཮84. ๼෇ຕ਍‫܋‬੨้ႾLjຕ਍ᅜREFCLKྺ֖੊LjfDACCLK = fREFCLK ൩ጀᅪLj໚඗SYNC_I‫ॺڦ‬૬ࢅԍ‫้׼‬क़๟၎‫ܔ‬ᇀREFCLK ܸჾLj‫ڍ‬SYNC_I๼෇๟ᅜాևDACCLK໏୲৊ႜ֑ᄣă‫ړ‬ ֑ ᆩ PLL้ Lj SYNC_IՂ Ⴗ ዃ ࿋ ᅜ ஢ ፁ ၎ ‫ ܔ‬ᇀ REFCLK (tS_SYNC)‫ॺڦ‬૬้क़ᄲ൱Lj‫ڍ‬փీሞాևSYNC_I֑ᄣ้ዓ ‫ڦ‬മᅃ߲ฉืᄂኮമዃ࿋ă࣑ჾኮLjSYNC_Iዃ࿋ᄂՂႷ‫ݣ‬ ሞ૶Ⴤଇ߲ፆ‫شڔ‬੨ኮक़Ljኄၵፆ‫شڔ‬੨๟ᅜDACCLK໏ ୲ዘް‫ڦ‬Ljܸփ๟REFCLK໏୲ăኍ‫ܔ‬PLL༵ࠃ‫ڦ‬DACCLK ೕ୲‫຺ྺڦ‬ԠREFCLKೕ୲‫ڦ‬൧઄Lj཮85‫ڦ‬ᅽᆖև‫ݴ‬၂๖ କ SYNC_Iዃ ࿋ ‫ ڦ‬ᆶ ၳ ‫ ش‬੨ ă ᅺ ُ Lj ፌ ‫ ॺ ܌‬૬ ้ क़ ྺ tS_SYNCLjፌ‫ॺ׊‬૬้क़ྺtDACCLK − tH_SYNCă tDACCLK SYNC_I tH_SYNC tS_SYNC REFCLK DACCLK tSREFCLK tHREFCLK 06452-310 ྺକၩ‫أ‬၎࿋ఇࢵLjՂႷ๑ᆩSYNC_I๼෇ᆅগ)ᆅগ13ࢅ 14* Lj ഽ ೨ ຕ ਍ ሞ ༬ ۨ REFCLKᄂ ৊ ႜ ֑ ᄣ ă REFCLKĂ SYNC_Iࢅ๼෇ຕ਍ኮक़‫࠲ڦ‬ဣස཮84ࢅ཮85໯๖ăᅺُLj ྺକ੗੍‫ॽں‬ຕ਍‫د‬๼዁ഗॲLjSYNC_Iࢅຕ਍਩ՂႷ஢ፁ ՗28‫้ڦ‬Ⴞᄲ൱ă DATA Figure 85. Input Data Port Timing, Data Referenced to REFCLK, fDACCLK = fREFCLK × 4 ཮85. ๼෇ຕ਍‫܋‬੨้ႾLjຕ਍ᅜREFCLKྺ֖੊LjfDACCLK = fREFCLK × 4 ՗28. ຕ਍้Ⴞࡀ߭ᇑ࿒‫܈‬ ้Ⴞ֖ຕ ຕ਍၎‫ܔ‬ᇀREFCLK± ຕ਍၎‫ܔ‬ᇀDATACLK SYNC_I±዁REFCLK± ࿒‫܈‬ −40°C +25°C +85°C −40°C ዁ +85°C −40°C +25°C +85°C −40°C ዁ +85°C −40°C +25°C +85°C −40°C ዁ +85°C Min tS (ns) −0.80 −1.00 −1.10 −0.80 2.50 2.70 3.00 3.00 0.30 0.25 0.15 0.30 PLL্ᆩ Min tH (ns) 3.35 3.50 3.80 3.80 −0.05 −0.20 −0.40 −0.05 0.65 0.75 0.90 0.90 Rev. B | Page 47 of 56 Min KOW (ns) 2.55 2.50 2.70 3.00 2.45 2.50 2.60 2.95 0.95 1.00 1.05 1.20 Min tS (ns) −0.83 −1.06 −1.19 −0.83 2.50 2.70 3.00 3.00 0.27 0.19 0.06 0.27 PLL๑ీ Min tH (ns) 3.87 4.04 4.37 4.37 −0.05 −0.20 −0.40 −0.05 1.17 1.29 1.47 1.47 Min KOW (ns) 2.99 2.98 3.16 3.54 2.45 2.50 2.60 2.95 1.39 1.48 1.51 1.74 AD9776A/AD9778A/AD9779A ᆫࣅຕ਍๼෇้Ⴞ! AD9776A/AD9778A/AD9779Aਏᆶೌా‫ۉ‬ୟLjሎႹᆩࢽۙ ኝDATACLK๼‫؜‬ᇑDCLK_SMP(֑ᄣ๼෇ຕ਍‫ాڦ‬և้ዓ) ኮक़‫࠲ڦ‬ဣLjᅜᆫࣅ๼෇ຕ਍้Ⴞăኄዖᆫࣅ๟ཚࡗᅃဣ ଚෙ၍๕থ੨स٪ഗ‫܁‬ႀ֡ፕઠํ၄ă้Ⴞᆫࣅ੗ᅜሞᆩ ࢽ‫ڦ‬ჹ߭੦዆ኮူྜ‫ׯ‬Ljᄺ੗ᅜ‫ܔ‬ഗॲ৊ႜՊ‫ײ‬Lj๑ኮጲ ‫ۯ‬ԍ‫׼‬ሞᅃۨ‫้ڦ‬Ⴞᇆଉ(้Ⴞᇆଉ੗ದዃ)ă޿ࠀీৈሞ ๼෇ຕ਍ᅜDATACLK๼‫ీ֍้੊֖ྺ؜‬๑ᆩăࢫჄև‫ݴ‬ ॽၘဦຫ௽௅ዖ‫݆ݛ‬ă DATA TIMING ERROR = 0 TIMING MARGIN[3:0] D TIMING ERROR DETECTION CLK PD1[0] D ΔtM ΔtM ΔtM ΔtM TIMING ERROR = 1 DATA TIMING ERROR TYPE = 1 DATA ACTUAL SAMPLING INSTANT DELAYED CLOCK SAMPLING 06452-403 DELAYED DATA SAMPLING TIMING ERROR = 1 DATA TIMING ERROR TYPE = 0 ཮87. ᇆଉ֪๬ຕ਍‫้ڦ‬Ⴞ཮ ‫ړ‬ጲ‫้ۯ‬Ⴞᆫࣅఇ๕๑ీ(स٪ഗ0x03‫ڦ‬࿋7=1)้Ljഗॲ‫׼‬ Ⴤ॔๫ຕ਍้Ⴞ‫ٱ‬ဃIRQ࿋ࢅຕ਍้Ⴞ‫ٱ‬ဃૌ႙࿋ăॠ֪ ‫ॺڟ‬૬‫ٱ‬ဃ้LjDATACLKჽ‫[׿‬3:0]ሺेǗॠ֪‫ڟ‬ԍ‫ٱ׼‬ ဃ้LjDATACLKჽ‫[׿‬3:0]३ณăᆩࢽ੗ᅜ࣮‫ړ܁‬മ๑ᆩ ‫ڦ‬DATACLKჽ‫[׿‬3:0]ยዃኵă TIMING ERROR TYPE Q CLK DATACLK DELAY[3:0] ๮‫้ۯ‬Ⴞᆫࣅ! ΔtD DATACLK 06452-402 DCLK_SMP ΔtM ጲ‫้ۯ‬Ⴞᆫࣅ! TIMING ERROR IRQ Q ΔtM DATA ཮86၂๖ᆩઠॠ֪֑ᄣ้Ⴞ‫ٱ‬ဃժۙኝຕ਍থ੨้Ⴞ‫ۉڦ‬ ୟăDCLK_SMP႑ࡽ๟ᆩઠ໮٪๼෇ຕ਍‫ాڦ‬և้ዓăፌ ዕLjُ႑ࡽ‫ڦ‬ฉืᄂႴᄲ‫ت‬ᇀ๼෇ຕ਍ᆶၳ֑ᄣዜ೺‫ڦ‬ዐ ႐ăഄํ၄‫ݛ‬๕๟ۙኝ้क़ჽ‫׿‬tDLjᅜ߀ՎDATACLK้ ႾLjܸٗ߀Վ๼෇ຕ਍၎‫ܔ‬ᇀDCLK_SMP‫้ٳڟڦ‬क़ă ΔtM ΔtM ཮86. ้Ⴞ‫ٱ‬ဃॠ֪ࢅᆫࣅ‫ۉ‬ୟ ‫أ‬କഗॲຕ਍ୟ০໯ᆩ‫ํڦ‬ा֑ᄣຕ਍ྔLj‫ٱ‬ဃॠ֪‫ۉ‬ୟ ׂ࣏ࣷิଇፇ֑ᄣຕ਍(‫ྺ׬‬ᇆଉ֪๬ຕ਍)ăᅃፇ֑ᄣຕ ਍ሞํाຕ਍֑ᄣ‫ۅ‬ኮമ໮٪Ljଷᅃፇ֑ᄣຕ਍ሞํाຕ ਍֑ᄣ‫ۅ‬ኮࢫ໮٪ăසࡕᇆଉ֪๬ຕ਍ᇑํाຕ਍೅ದLj ሶණྺ֑ᄣᆶၳLjுᆶ‫ٱ‬ဃăසࡕํाຕ਍ᇑᇆଉ֪๬ຕ ਍փ೅ದLjሶࣷำ௽‫ٱ؜‬ă ຕ਍้Ⴞᇆଉ[3:0]Վଉਦۨᇆଉ֪๬ຕ਍ሞํाຕ਍֑ᄣ ‫ۅ‬ኮമࢅኮࢫ‫ܠ‬৳৊ႜ໮٪ăᅺُLjຕ਍้ႾᇆଉՎଉਦ ۨথ੨Ⴔᄲ‫ܠ‬ณॺ૬ࢅԍ‫׼‬ᇆଉLj֍ీ๑ຕ਍้Ⴞ‫ٱ‬ဃ IRQԍ‫׼‬࿮ၳ(՗௽֡ፕ࿮ဃ)ăᆯُ੗ኪLjኻᄲॺ૬ࢅԍ ‫׼‬ᇆଉই‫ڟ‬ຕ਍้Ⴞᇆଉ[3:0]ኵᅜူLj้Ⴞ‫ٱ‬ဃIRQ৽ࣷ ዃ1Lj‫ڍ‬ժփᅃۨᅪ࿆ጣ໮٪዁ഗॲዐ‫ڦ‬ຕ਍փኟඓă ๮‫้ۯ‬Ⴞᆫࣅఇ๕(स٪ഗ0x03‫ڦ‬࿋7 = 0)ူLjഗॲփࣷ߀ ՎᆩࢽՊ‫ײ‬ยዃ‫ڦ‬DATACLKჽ‫[׿‬3:0]ኵăఐණ൧઄ူLj DATACLKჽ‫׿‬๑ీ࿋࿮ၳăᄲ๑ᆩDATACLKჽ‫[׿‬3:0] ኵLj޿࿋ՂႷยྺߛăሞ00000዁11111‫ాྷݔ‬ยዃDATACLKჽ‫้׿‬Ljჽ‫(׿‬ਨ‫้ܔ‬क़)‫ྷݔ‬ሀྺ700 ps዁6.5 nsă՗29 ଚ‫؜‬କኝ߲࿒‫ాྷݔ܈‬௅օ৊‫ڿ‬ሺ‫ۆڦ‬႙ჽ‫׿‬ă ՗29. ኝ߲࿒‫ాྷݔ܈‬ຕ਍ჽ‫׿‬၍‫ۆڦ‬႙ჽ‫׿‬ ჽ‫׿‬ ଭஓჽ‫׿‬ (๑ీჽ‫׿‬၍้‫ڦ‬ჽ‫)׿‬ ೝ਩‫ڇ‬࿋ჽ‫׿‬ −40°C 630 +25°C 700 +85°C 740 ‫ڇ‬࿋ ps 175 190 210 ps ॽഗॲዃᇀ๮‫ۯ‬ఇ๕้Lj৽ࣷघऄֶ‫ٱ‬ၯᄓஇडăසࡕ IRQ๑ీLjሶॠ֪‫ॺڟ‬૬/ԍ‫׼‬؋཭ׂ้ࣷิዐ܏ă௅ದዃ ᅃْഗॲLj৽ࣷኴႜᅃֶْ‫ٱ‬ၯᄓ֡ፕă‫ܔ‬ຕ਍้Ⴞᇆଉ [3:0]ईDATACLKჽ‫[׿‬3:0]ኵ໯ፔ‫ڦ‬ඪࢆ߀ՎLj‫݀ةࣷۼ‬ႎ ‫ٱֶڦ‬ၯᄓ֡ፕă ݀ิ‫ٱ‬ဃ้Lj‫أ‬କยዃຕ਍้Ⴞ‫ٱ‬ဃIRQྔLj࣏ࣷยዃຕ ਍้Ⴞ‫ٱ‬ဃૌ႙࿋ăຕ਍้Ⴞ‫ٱ‬ဃૌ႙࿋ྺ‫้گ‬Lj՗๖ԍ ‫ٱ׼‬ဃǗྺߛ้Lj՗๖ॺ૬‫ٱ‬ဃă཮87၂๖କຕ਍থ੨‫ڦ‬ ้Ⴞ཮ࢅຕ਍้Ⴞ‫ٱ‬ဃૌ႙࿋‫ڦ‬ጒༀă Rev. B | Page 48 of 56 AD9776A/AD9778A/AD9779A ഗॲཞօ! ဣཥႴ൱੗ీࣷ‫ܔ‬ཞօ༵‫؜‬ଇዖփཞᄲ൱ăగၵဣཥᄲ൱ ‫߲ܠ‬DACԵُཞօăኧ‫݀׼‬พ‫ݴ‬णईհຐႚ‫৽้ׯ‬๟ኄዖ ൧઄LjᅺྺႴᄲ๑ᆩ‫ߵܠ‬ཀ၍ઠ݀พ၎࠲႑ࡽăُ้Lj DAC๼‫؜‬ႴᄲԵُ၎࿋‫ܔ‬ጚLj‫ڍ‬੗ీփᄲ൱DAC๼‫؜‬ᇑဣ ཥप֖੊้ዓ‫ܔ‬ጚăሞ֑ᆩ้‫ްݴ‬ᆩ݀พ૾ୟ‫ڦ‬ဣཥዐLj ᅃ߲ई‫߲ܠ‬DAC੗ీႴᄲᇑဣཥप֖੊้ዓཞօăཞօஇ ड߁ຎև‫ࢅݴ‬ഗॲᇑဣཥ้ዓཞօև‫ॽݴ‬ຫ௽ኄଇዖཉॲ ူ‫ڦ‬ഗॲཞօ჋ၜă ཞօஇड߁ຎ! ཮88၂๖କೌాཞօஇड‫཮઀ڦ‬ăཞօஇड‫ڦ‬एԨ֡ፕ๟ ׂิ੻‫ྺ܈‬DACCLKዜ೺‫؛߲ڇڦ‬๔ࣅஞ؋Ljᅜॽ้ዓ݀ ิጒༀऐஇडยዃྺᅙኪጒༀă޿‫؛‬๔ࣅஞ؋ॽ้ዓጒༀ [4:0]‫ڦ‬ኵሜ෇้ዓ݀ิጒༀऐLjፕྺഄူᅃ߲ጒༀăසࡕ ཞօஇडኟඓׂิ‫؛‬๔ࣅஞ؋Ljሶ໲ॽሞ௅32߲DACCLK ዜ೺ዐ‫ڦ‬ᅃ߲DACCLKዜ೺ాᆶၳă้ዓ݀ิጒༀऐᆶ32 ߲ጒༀᅜDACCLK໏୲߾ፕLjᅺُሞ‫ڼ‬ᅃ߲ஞ؋ኮࢫথ๭ ‫ڦڟ‬௅߲‫؛‬๔ࣅஞ؋‫ेࣷۼ‬ሜጒༀऐణമ໯ሞ‫ڦ‬ጒༀLjٗ ܸ๑ഗॲᅜኟඓ‫้ڦ‬ዓ߾ፕă PLL BYPASS INTERNAL PLL BIT 0 (1× INTERPOLATION) BIT 1 (2×) BIT 2 (4×) BIT 3 (8×) BIT 4 (8× WITH ZERO STUFFING) MUX DELAY REGISTER (REG 0x0, BITS[7:4]) fSYNC_1 < fDATA/2^N ERROR DETECT CIRCUITRY ཞօஞ؋໯Ⴔ‫ڦ‬SYNC_Iฉืᄂ 1DŽఐණDž 2 4 8 16 ࿮ၳยዃ ࿮ၳยዃ ࿮ၳยዃ ૩සLjසࡕ๑ᆩೕ୲ྺfDACCLK/4‫ڦ‬SYNC_I႑ࡽLjሶ‫ܔ‬ ᇀSYNC_IԲኵ[2:0]Lj011ࢅ100਩ྺᆶၳยዃă011ยዃ‫ڞ‬ ዂ௅32߲DACCLKዜ೺ׂิᅃ߲‫؛‬๔ࣅஞ؋Lj100ยዃ‫ڞ‬ ዂ௅64߲DACCLKዜ೺ׂิᅃ߲‫؛‬๔ࣅஞ؋ăଇዖ൧઄਩ ੗ํ၄ኟඓ‫ڦ‬ഗॲཞօă ཞօ้Ⴞ‫ٱ‬ဃॠ֪! SYNC IRQ PULSE GENERATION LOGIC 06452-094 SYNC DELAY SYNC_I Բኵ[2:0] 000 001 010 011 100 101 110 111 ้ዓጒༀ[4:0]ኵ๟้ዓ݀ิጒༀऐሞ‫؛‬๔ࣅ้‫ްڦ‬࿋ጒ ༀăཚࡗ߀ՎُኵLj੗ᅜۙኝాև้ዓ၎‫ܔ‬ᇀSYNC_I႑ࡽ ‫้ڦ‬Ⴞă้ዓጒༀ[4:0]ኵ௅‫ڿ‬ሺ1Ljాև้ዓ৽༵ࣷമᅃ߲ DACCLKዜ೺ă LOAD DACCLK OFFSET VALUE (REG 0x07, BITS[4:0]), ONE DACCLK CYCLE/INCREMENT SYNC_I ՗30. ኧ‫߳׼‬ዖSYNC_Iೕ୲໯Ⴔ‫ڦ‬ยዃ REFCLK DACCLK CLOCK GENERATION STATE MACHINE ‫ڦ‬Բኵ৊ႜᅞ዆ăኻᄲஞ؋ׂิ‫ۉ‬ୟᅜ32߲DACCLKዜ೺ ‫ ڦ‬Ԡ ຕ ׂ ิ ๼ ‫ ؜‬ஞ ؋ Lj SYNC_Iೕ ୲ Ս ੗ ᅜ ‫ گ‬ᇀ DACCLK/32ăඪࢆ൧઄ူLjSYNC_I‫ڦ‬ፌ‫ٷ‬ೕ୲ՂႷ‫گ‬ᇀ fDATACLKă ཮88. ཞօ‫ۉ‬ୟࠀీ઀཮ ఁᅭฉLjྺକԍ‫׼‬ኟඓཞօLjSYNC_I๼෇ሞ௅32้߲ዓዜ ೺)ई32้߲ዓዜ೺‫ڦ‬Ԡຕ*ዐᆌᆶᅃ߲ฉืᄂă੗ᅜ‫ܔ‬ஞ ؋ ׂ ิ இ ड ৊ ႜ Պ ‫ ײ‬Lj ๑ ኮ ሞ ๼ ෇ SYNC_Iೕ ୲ ߛ ᇀ DACCLK/32้ᅞ዆๼‫؜‬ஞ؋ă‫ܠ‬ᇆஞ؋੗ᅜӀቷ՗30໯ଚ ཞօஇडਏᆶᇑ๼෇ຕ਍้Ⴞ၎ຼ‫ٱڦ‬ဃॠ֪‫ۉ‬ୟă SYNC_I้Ⴞᇆଉ[3:0]Վଉਦۨཞօথ੨Ⴔᄲ‫ܠ‬ณॺ૬ࢅԍ ‫׼‬ᇆଉLj֍ీ๑ཞօ้Ⴞ‫ٱ‬ဃIRQ࿋ԍ‫׼‬࿮ၳ)न՗௽֡ፕ ࿮ဃ*ăᅺُLjኻᄲॺ૬ࢅԍ‫׼‬ᇆଉই‫ڟ‬SYNC_I้Ⴞᇆଉ [3:0]ኵᅜူLjཞօ‫ٱ‬ဃIRQ࿋৽ࣷዃ1Lj‫ڍ‬ኄժփᅃۨᅪ࿆ ጣSYNC_I๼෇໮٪փኟඓă ‫ړ‬ཞօ้Ⴞ‫ٱ‬ဃIRQ࿋ዃ1้Lj੗ᅜ֑ൽৰኟ‫ٯ‬แᅜ࣬ް้ Ⴞᇆଉăᅃዖ‫ٯ‬แ๟ሡ้३ณ้ႾᇆଉLj኱‫ڟ‬ཞօ้Ⴞ‫ٱ‬ ဃIRQൣ0ྺኹă඗ࢫॽSYNC_Iჽ‫׿‬ሺेଇ߲ሺଉLjॠֱ ้Ⴞᇆଉ๟ሺे࣏๟३ณăසࡕ้ႾᇆଉሺेLjሶीჄ‫ڿ‬ ሺSYNC_Iჽ‫ڦ׿‬ኵLj኱‫ڟ‬ᇆଉ‫ڟٳ‬ፌ‫ྺٷ‬ኹă‫ڍ‬๟Ljසࡕ ‫ڿ‬ሺSYNC_Iჽ‫ڞ׿‬ዂ้Ⴞᇆଉ३ณLjሶᆌ໫‫܌‬ჽ‫׿‬Lj኱‫ڟ‬ ้Ⴞᇆଉ‫ڟٳ‬ፌॅྺኹă Rev. B | Page 49 of 56 AD9776A/AD9778A/AD9779A ഗॲᇑဣཥ้ዓཞօ! AD9776A/AD9778A/AD9779A༵ࠃକஞ؋ఇ๕ཞօ‫ݛ‬ӄ(९ ཮89)Lj੗ᅜॽᅃ߲ဣཥా‫߲ܠ‬ഗॲ‫ڦ‬DAC๼‫؜‬ᇑཞᅃ DACCLKᄂ ཞ օ ă ా և ้ ዓ ཚ ࡗ ၠ SYNC_I๼ ෇ (SYNC_I+ĂSYNC_I−)༵ࠃᅃ߲ᅃْႠஞ؋ईᅃ߲ዜ೺႑ ࡽܸํ၄ཞօăSYNC_I႑ࡽӀቷాևDACCLK֑ᄣ໏୲้ ዓ৊ႜ֑ᄣă ཮90၂๖କSYNC_I๼෇၎‫ܔ‬ᇀREFCLK๼෇‫้ڦ‬Ⴞă൩ጀ ᅪLj໚඗޿้Ⴞ๟၎‫ܔ‬ᇀREFCLK႑ࡽܸჾLj‫ڍ‬SYNC_I๟ ᅜDACCLK໏୲৊ႜ֑ᄣăኄᅪ࿆ጣLjSYNC_I႑ࡽ‫ڦ‬ฉื ᄂՂႷ݀ิሞമᅃDACCLKฉืᄂ‫ڦ‬ԍ‫้׼‬क़ኮࢫLjܸփ ๟ሞമᅃREFCLKฉืᄂ‫ت‬ă SYNC_I๼෇ೕ୲ਏᆶᅜူ၌዆ǖ ‫ړ‬ഗॲ݀ิ้Ⴞ‫ٱ‬ဃ้LjIRQᆅগ(ᆅগ71)ᆩፕԒয়Ljᆌ‫ړ‬ ᇎᅜֱკDŽཚࡗ‫܁‬ൽस٪ഗ0x19Džᅜඓۨඓൎ‫ࠤڦ‬ቱཉ ॲăIRQᆅগ๟ਸ୑႙‫ۉگ‬ೝᆶၳ๼‫؜‬ăᆌሞഗॲྔևઙ ߛIRQᆅগăُᆅগ੗ᅜ૶থ‫ڟ‬ഄ໲ഗॲ‫ڦ‬ਸ୑๼‫؜‬IRQ ᆅগLjᅜ๑ኄၵᆅগႚ‫ׯ‬၍“ई”૶থă ዐ܏൩൱֡ፕ! fSYNC_I ≤ fDATA ాև้ዓཞօ้Lj໯ᆶഗॲ‫ڦ‬ຕ਍֑ᄣ้ዓ਩၎࿋‫ܔ‬ጚă ຕ਍๼෇้Ⴞ࠲ဣ੗ᅜᆩREFCLKईDATACLKፕྺ֖੊ă ‫ܔ‬ᇀኄዖཞօ‫ݛ‬ӄLj໯ᆶഗॲ਩ྺٗഗॲLjဣཥ้ዓׂิ/ ‫ݴ‬ದႊೌ؊‫ړ‬ዷഗॲă߳DAC‫ڦ‬SYNC_I႑ࡽኮक़‫้ڦ‬ዓ ೋᅎՂႷ࢔‫گ‬ăཞᄣLj߳DAC‫ڦ‬REFCLK႑ࡽኮक़‫้ڦ‬ዓ ೋᅎᄺՂႷ࢔‫گ‬ăDACኮक़ኄၵ႑ࡽ‫ڦ‬ඪࢆೋᅎ‫ۼ‬ՂႷሞ ้Ⴞᇨ໙ዐेᅜ੊୯ă཮89၂๖କ้ዓࢅཞօ๼෇‫ݛ‬ӄ๖ ૩ă ᆶଇ߲փཞ‫ٱڦ‬ဃՔኾ੗ᅜ‫݀ة‬ዐ܏൩൱ǖຕ਍้Ⴞ‫ٱ‬ဃ Քኾࢅཞօ้Ⴞ‫ٱ‬ဃՔኾăఐණ൧઄ူLjኻᄲᆶᅃ߲‫ٱ‬ဃ Քኾዃ1LjIRQᆅগՍྺ‫ۉگ‬ೝᆶၳă੗ᅜೡԸ໯ᆶ‫ٱ‬ဃՔ ኾईኻೡԸഄዐ‫ڦ‬ᅃ߲Lj‫ݞ‬ኹഄघऄIRQᆅগฉ‫ڦ‬ዐ܏ă ‫ٱ‬ဃՔኾࣷԥ໮٪ժԍ‫׼‬ᆶၳLj኱‫܁ڟ‬ൽዐ܏स٪ഗ0x19 ईኁ‫ٱ‬ဃՔኾ࿋ԥޮ߃ă MATCHED LENGTH TRACES REFCLK OUT SYNC_I SYSTEM CLOCK LOW SKEW CLOCK DRIVER REFCLK OUT SYNC_I LOW SKEW CLOCK DRIVER 06452-311 PULSE GENERATOR MATCHED LENGTH TRACES ཮ 89. ஞ؋ఇ๕ူ‫ܠڦ‬ഗॲཞօ SYNC_I tH_SYNC tS_SYNC 06452-312 REFCLK DACCLK ཮90. ‫ܠ‬ഗॲԵُཞօ้LjSYNC_I၎‫ܔ‬ᇀREFCLK‫้ڦ‬Ⴞ཮ Rev. B | Page 50 of 56 AD9776A/AD9778A/AD9779A ࠀࡼ! ཮91዁཮99၂๖‫ڇ‬DACఇ๕ࢅມDACఇ๕ူ1.8 Vࢅ3.3 Vຕጴࢅ้ዓ‫ۉ‬ᇸ‫ࡼࠀڦ‬ăُྔLj‫ڇ‬DACఇ๕ူ3.3 Vఇె‫ۉ‬ᇸ)ᇑఇ ๕ࢅ໏‫܈‬࿮࠲*‫ࡼࠀڦ‬/‫ྺୁۉ‬102 mW/31 mALjມDACఇ๕ူྺ182 mW/55 mAăPLL๑ీ้Lj1.8 V้ዓ‫ۉ‬ᇸ‫ୁۉڦ‬/ࠀࡼሺ े50 mA/90 mWă 0.075 0.7 8× INTERPOLATION 0.6 4× INTERPOLATION 4× INTERPOLATION, ZERO STUFFING 8× INTERPOLATION, ZERO STUFFING 0.5 ALL INTERPOLATION MODES POWER (W) POWER (W) 0.050 2× INTERPOLATION, ZERO STUFFING 0.4 2× INTERPOLATION 0.3 1× INTERPOLATION, ZERO STUFFING 0.025 0.2 1× INTERPOLATION 0.1 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 0 06452-076 0 25 50 75 100 150 175 200 225 250 ཮94. ࠀࡼLjຕጴ3.3 V‫ۉ‬ᇸLjৈIຕ਍Ljํຕఇ๕Lj Ԉઔۙ዆ఇ๕ࢅଭኵག؊ ཮91. ጺࠀࡼLjৈIຕ਍Ljํຕఇ๕ 0.4 1.0 4× INTERPOLATION 8× INTERPOLATION, ALL MODULATION MODES 8× INTERPOLATION, ZERO STUFFING 0.9 8× INTERPOLATION 125 fDATA (MSPS) 06452-080 0 4× INTERPOLATION, ALL MODULATION MODES 0.8 0.3 0.2 POWER (W) POWER (W) 0.7 2× INTERPOLATION 0.6 2× INTERPOLATION, ALL MODULATION MODES 0.5 0.4 0.3 0.1 0.2 2× INTERPOLATION, ZERO STUFFING 4× INTERPOLATION, ZERO STUFFING 1× INTERPOLATION 0.1 1× INTERPOLATION, ZERO STUFFING 1× INTERPOLATION 0 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 0 06452-078 25 25 50 100 125 150 175 200 225 250 275 300 fDATA (MSPS) ཮95. ጺࠀࡼLjມDACఇ๕ ཮92. ࠀࡼLjຕጴ1.8 V‫ۉ‬ᇸLjৈIຕ਍Lj ํຕఇ๕LjփԈઔଭኵག؊ 0.8 0.08 8× INTERPOLATION, fDAC /8, fDAC /4, fDAC /2, NO MODULATION 0.7 4× INTERPOLATION 0.6 0.06 8× INTERPOLATION POWER (W) 4× INTERPOLATION 0.04 2× INTERPOLATION 0.5 0.4 2× INTERPOLATION 0.3 0.2 0.02 1× INTERPOLATION 1× INTERPOLATION, NO MODULATION 0.1 0 25 50 75 100 125 150 175 200 225 fDATA (MSPS) 250 ཮93. ࠀࡼLj้ዓ1.8 V‫ۉ‬ᇸLjৈIຕ਍Ljํຕఇ๕Lj Ԉઔۙ዆ఇ๕LjփԈઔଭኵག؊ 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) ཮96. ࠀࡼLjຕጴ1.8 V‫ۉ‬ᇸLjIࢅQຕ਍LjມDACఇ๕Lj փԈઔଭኵག؊ Rev. B | Page 51 of 56 06452-081 0 0 06452-079 POWER (W) 75 06452-077 0 0 AD9776A/AD9778A/AD9779A 0.125 ۖ‫ࢅۉ‬Ⴉ௥ఇ๕! POWER (W) 8× INTERPOLATION, fDAC /8, fDAC /4, fDAC /2, NO MODULATION 0.100 4× INTERPOLATION 0.075 2× INTERPOLATION 0.050 0.025 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 06452-082 1× INTERPOLATION, NO MODULATION 0 ཮97. ࠀࡼLj้ዓ1.8 V‫ۉ‬ᇸLjIࢅQຕ਍LjມDACఇ๕Lj փԈઔଭኵག؊ AD9776A/AD9778A/AD9779Aਏᆶ‫ܠ‬ዖۖ‫ۉ‬ఇ๕Ljຕጴᆅ ൤ĂዷTxDACࢅ‫ޤ‬ዺDAC੗ᅜ‫ݴ‬՚ईཞ้ۖ‫ۉ‬ăཚࡗෙ၍ ๕থ੨‫܋‬੨Lj੗ᅜॽዷTxDACዃᇀႩ௥ईۖ‫ۉ‬ఇ๕ăႩ௥ ఇ๕ူLjTxDAC๼‫࠲؜‬ԿLjܸٗই‫ࡼࠀگ‬ăփࡗLjएጚ‫ۉ‬ უᇸධ඗ԍ‫׼‬ཚ‫ۉ‬LjᅜՍీٗႩ௥ఇ๕੺໏࣬ްăۖ‫ۉ‬ఇ ๕࿋)स٪ഗ0x00‫ڦ‬࿋4*ዃ1้Lj໯ᆶఇెࢅຕጴ‫ۉ‬ୟ਩ۖ ‫ۉ‬LjԈઔएጚ‫ۉ‬უᇸă޿ఇ๕ူLjෙ၍๕থ੨‫܋‬੨ධ඗ԍ ‫׼‬ऄ‫ۯ‬ă޿ఇ๕ԲႩ௥ఇ๕߸ู‫ۉ‬Lj‫ڍ‬ഔ‫้ۯ‬क़ᄺ߸‫׊‬ă ‫ޤ‬ዺDACᄺ੗ᅜཚࡗෙ၍๕থ੨‫܋‬੨Պ‫ײ‬৊෇Ⴉ௥ఇ๕ă ጲ‫ۉۖۯ‬๑ీ࿋)स٪ഗ0x00‫ڦ‬࿋3*੦዆ഗॲຕጴև‫ۖڦݴ‬ ‫ీࠀۉ‬ăጲ‫ీࠀۉۖۯ‬ᇑTXENABLEᆅগ)ᆅগ39*ᅃഐ݀ ࣩፕᆩLjၘ൧९՗31ă ՗31 TXENABLE (ᆅগ39) 0 0.075 POWER (W) 1 0.025 50 75 100 125 150 175 200 225 250 06452-083 25 1200 06452-084 0 0 fDATA (MSPS) ཮98. ࠀࡼLjຕጴ3.3 V‫ۉ‬ᇸLjIࢅQຕ਍Lj ມDACఇ๕ 0.16 0.14 POWER (W) 0.12 0.10 0.08 0.06 0.04 0.02 0 0 200 400 සࡕጲ‫ۉۖۯ‬๑ీ࿋ = 0Ljሶᆩ0ൣ੣ຕ਍ୟ ০ă සࡕጲ‫ۉۖۯ‬๑ీ࿋ = 1Ljሶൣ੣‫߲ܠ‬REFCLK ዜ೺‫ڦ‬ຕ਍Lj඗ࢫॽຕጴᆅ൤ጲ‫ۯ‬ዃᇀۖ‫ۉ‬ጒ ༀăDACĂएጚ‫ۉ‬უᇸࢅෙ၍๕থ੨‫܋‬੨փ๴ ᆖၚă ALL INTERPOLATION MODES 0.050 ௮ຎ 600 800 1000 fDAC (MSPS) ཮99. ‫ݒ‬Sinc୳հഗ‫ڦ‬DVDD18ࠀࡼ Rev. B | Page 52 of 56 ኟ‫߾׉‬ፕ AD9776A/AD9778A/AD9779A ೠࠚӱ߁ຎ! ‫ۆ‬႙ೠࠚยዃස཮100໯๖ă੗ᅜᆩᅃ߲ኟ၀հई‫ݛ‬հ้ ዓፕྺDAC֑ᄣ้ዓᇸă้ዓ‫ڦ‬ೕ೷‫ࣷ܈ك‬኱থᆖၚഗॲ Ⴀీăᄲ൱๑ᆩ‫گ‬ሯำĂ‫گ‬۶‫้ۯ‬ዓᇸă ೠࠚӱ֡ፕ! AD9776A/AD9778A/AD9779Aೠࠚӱኼሞӻዺᆩࢽ੺໏ຄ ဒഗॲ‫֡ڦ‬ፕLjժೠࠚഗॲ‫ڦ‬Ⴀీăᄲ๑ᆩೠࠚӱLjᆩࢽ ႴጚԢᅃ໼PCĂ5 V‫ۉ‬ᇸĂ้ዓᇸࢅຕጴຕ਍ᇸăᆩࢽ࣏ Ⴔᄲཚࡗೕ೷‫ݴ‬ဆᅏई๖հഗઠ࠵ִDAC๼‫؜‬ă ೠࠚӱ‫ڦ‬໯ᆶՂᄲ૶থၘ९཮101ă CLOCK GENERATOR ADAPTER CABLES CLKIN SPI PORT SPECTRUM ANALYZER AD9776A/ AD9778A/ AD9779A DIGITAL PATTERN GENERATOR EVALUATION BOARD CLOCK IN 06452-097 1.8V POWER SUPPLY DATACLK OUT 3.3V POWER SUPPLY ཮100. ‫ۆ‬႙֪๬ยዃ DVDD18 DVDD33 P4 DIGITAL INPUT CONNECTOR CVDD18 J1 CLOCK IN AD9779A JP4 JP15 JP8 JP14 JP3 JP16 JP2 JP17 S7 DCLKOUT J2 5V SUPPLY MODULATOR OUTPUT S5 OUTPUT 1 ADL537x +5V GND S6 OUTPUT 2 LOCAL OSC INPUT ANALOG DEVICES AD9776A/ AD9778A/ AD9779A 06452-095 SPI PORT AVDD33 ཮101. ၂๖໯ᆶ૶থ‫ڦ‬AD9776A/AD9778A/AD9779Aೠࠚӱ Rev. B | Page 53 of 56 AD9776A/AD9778A/AD9779A ૧ᆩೠࠚӱໜ޹‫ॲ෉ڦ‬Ljᆩࢽ੗ᅜ‫ాೌܔ‬ದዃस٪ഗ৊ႜ Պ‫ײ‬ăཚࡗෙ၍๕থ੨‫܋‬੨Lj੗ᅜॽഗॲยዃྺඪࢆ੗ᆩ ‫߾ڦ‬ፕఇ๕ă཮102၂๖କ޿෉ॲ‫ڦ‬ఐණ‫ش‬੨ă ೠࠚӱฉ࣏ᆶADL537xۙ዆ഗLjᅜՍ‫ܔ‬RFጱဣཥ৊ႜೠ ࠚăೠࠚӱ‫ၘڦ‬ဦጨଙࢅෙ၍๕থ੨෉ॲ੗ᅜٗADIࠅິ ྪበူሜă 1. SET INTERPOLATION RATE 2. SET INTERPOLATION FILTER MODE 3. SET INPUT DATA FORMAT 06452-099 4. SET DATACLK POLARITY TO MATCH INPUT TIMING ཮102. ෙ၍๕থ੨‫܋‬੨෉ॲ‫ش‬੨ Rev. B | Page 54 of 56 AD9776A/AD9778A/AD9779A ྔႚ؅٫! 0.75 0.60 0.45 16.00 BSC SQ 1.20 MAX 14.00 BSC SQ 100 1 76 76 75 SEATING PLANE 100 1 75 PIN 1 BOTTOM VIEW (PINS UP) TOP VIEW (PINS DOWN) CONDUCTIVE HEAT SINK 51 50 25 50 1.05 1.00 0.95 7° 3.5° 0° 0.50 BSC 0.27 0.22 0.17 0.15 0.05 COPLANARITY 0.08 26 6.50 NOM FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MS-026-AED-HDT 072408-A 51 25 26 0.20 0.09 ཮103. 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ [TQFP_EP](SV-100-1) ؅٫(‫ڇ‬࿋ǖmm) ۩ࠔኸళ ႙ࡽ AD9776ABSVZ 1 AD9776ABSVZRL1 AD9778ABSVZ1 AD9778ABSVZRL1 AD9779ABSVZ1 AD9779ABSVZRL1 AD9776A-EBZ1 AD9778A-EBZ1 AD9779A-EBZ1 1 ࿒‫!ྷݔ܈‬ −40°C ዁ +85°C −40°C ዁ +85°C −40°C ዁ +85°C −40°C ዁ +85°C −40°C ዁ +85°C −40°C ዁ +85°C ‫ހ‬ጎ௮ຎ! 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) 100ᆅগ஋୞ࡰಎĂ‫ג‬ԋ຺‫ݛ‬Ռೝ‫ހ‬ጎ(TQFP_EP) ೠࠚӱ! ೠࠚӱ! ೠࠚӱ! Z = ‫ࢇޙ‬RoHSՔጚ‫ڦ‬ग़ඹഗॲă Rev. B | Page 55 of 56 ‫ހ‬ጎ჋ၜ! SV-100-1 SV-100-1 SV-100-1 SV-100-1 SV-100-1 SV-100-1 AD9776A/AD9778A/AD9779A ጀ๥ ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06452-0-9/08(B) Rev. B | Page 56 of 56