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AD9783-DPG2-EBZ

AD9783-DPG2-EBZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    AD9783 16 Bit 600M Samples Per Second Digital to Analog Converter (DAC) Evaluation Board

  • 数据手册
  • 价格&库存
AD9783-DPG2-EBZ 数据手册
AD9783/81/80 Evaluation Board Quick Start Guide One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Getting Started with the AD9783/81/80 Evaluation Board WHAT’S IN THE BOX EXAMPLE EQUIPMENT LIST AD9783-DPG2-EBZ Evaluation Board Mini-USB Cable AD9783 Evaluation Board CD +5Vdc Power Supply: Agilent E3630A Digital Pattern Generator (DPG2): ADI HSC-DAC-DPG-BZ DAC Clock Source: R&S SML 02 AQM LO Clock Source: R&S SMA100A Spectrum Analyzer: Agilent PSAA, PXA or R&S FSU PC: Windows PC with 2 or more USB ports (See Appendix for system requirements) INTRODUCTION The AD9783,1,80 Evaluation Boards (model AD978x-DPG2–EBZ) connect directly to the Analog Devices Digital Pattern Generator 2 (DPG2) to allow for quick evaluation of the AD9783 family of DACs. The DPG2 allows the user to create many types of digital vectors and transmit these at speed to the AD9783 in any of the DAC operating modes. The AD9783 evaluation board is configured over USB with accompanying PC software. The evaluation board includes the ADL5375 quadrature modulator and the ADCLK905 clock buffer so the board can be configured as a transmit chain in addition to evaluating the DAC as a standalone part. SOFTWARE INSTALLATION The AD9783 application software should be installed on the PC prior connecting the hardware to the PC. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at http://www.analog.com/dpg. This will install DPGDownloader (for loading vectors into the DPG2) and the AD9783 SPI Controller application. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. Quick Start Guide AD9783/81/80-DPG2-EBZ HARDWARE SETUP (DAC OUTPUT) Once the DPGDownloader software is installed, the hardware can be connected as shown in Figure 1. A single 5V power supply powers the evaluation board. The power supply should be able to source up to 600mA to cover all of the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DAC sampling clock CLKP/N. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA’s J5,7,8,9. The modifications required for observing the Modulator output will be explained. The evaluation board plugs directly into the DPG2. The PC connects to both the DPG2 and the evaluation board through USB cables. DAC Clock Source USB DPG2 AQM LO Clock Source CLOCK I&Q DATA 16 DCO DCI AD9783 /81/80 Evaluation Board USB Spectrum Analyzer +5V Power Supp ly Figure 1- Bench Set-Up Figure 2- DPG2 and AD9783 Evaluation Board GETTING STARTED – SINGLE TONE TEST It is suggested that the basic set-up is verified before making any modifications to the evaluation board. Basic Hardware Set-Up Connect the equipment to the AD9783 evaluation board per the following table: Equipment Connects to AD978x Eval Board Power Supply P4 (+5V), P5 (GND) Signal Source Clk J1 ( CLKP/N), Set source to 300MHz, 3dBm output Signal Source LO J2 ( LO IN), Set source to desired LO (i.e. 900 or 1800 MHz, 3dBm output when using the ADL5375 to mix up to the antenna frequency. J6 is the modulator output. PC USB Cable XP2 Spectrum Analyzer J5 (OUT1P) or J9(OUT2P) DPG2 P1 and P2 DPGDownloader Software Power up the DPG and connect the USB cable to the PC. Next, run the DPGDownloader Software. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. To begin, click on the DPGDownloader shortcut in your Programs menu, typically at Start > Programs > Analog Devices > DPG > DPGDownloader. The basic parts of the DPGDownloader window are: Hardware Config Panel, SPI GUI Launch Button, Vector Generation PullDown Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00000-0-1/07(A) Quick Start Guide AD9783/81/80-DPG2-EBZ Figure 5 – DPGDownloader Window - If the AD9783 evaluation board has been recognized by the PC, AD9783 should be populated in the Evaluation Board field in the Hardware Config panel. - Generate a sine wave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown in (Sample Rate = 300MHz, Desired Frequency = 50 MHz, etc.). Check the “Generate Complex Data (I&Q)” box. Note that the Sample Rate should match the input sample rate or the DAC update rate since this part has no interpolation. Also, the Unsigned data needs to be unchecked because the AD9783 SPI defaults to 2’s complement data format. - Select the I and Q data vectors in the data selection panel. - Launch the AD9783 SPI GUI by clicking the AD9783 SPI button. Figure 6 AD9783 SPI VI Panel control - When the Run - The DCO frequency field in the DPGDownloader window should now be reading something close to 500MHz. - Next hit the download button is clicked, the SPI controller will run continuously. It will both write and read from the AD9783. button. This transfers the data from the PC to the DPG memory. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00000-0-1/07(A) Quick Start Guide AD9783/81/80-DPG2-EBZ - When the vector has finished downloading, hit the play board. button. This starts the DPG2 transmitting data to the eval - The output from J5 (IOUT1P)or J9 (IOUT2P) should be a 500MHz tone as shown below: - As the DAC sample rate is increased above 350MSPS , the setup, hold and input timing delays will need to be used to get the proper timing on the data inputs. The spectrum will be bad prior to adjusting these delays as discussed in the data sheet with sample rates above 350MSPS . Figure 7 Iout1P Output Signal Screenshot ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00000-0-1/07(A) Quick Start Guide AD9783/81/80-DPG2-EBZ Selecting the Modulator Outputs By default, solder jumpers JP4, JP5, JP6, and JP7 configure the evaluation board for the DAC outputs to be observed at SMA J5 for IOUT1P and J9 for IOUT2P. This jumper setting is shown in 8 a). To connect to the filter that feed ADL5375 the solder jumpers need to be repositioned as shown in 8 b). The output from the ADL5375 Modulator can be observed SMA J6, RF out. Figure 8 – a) DAC Output Configuration b) Modulator Output Configuration AD9783 SPI Application The SPI application is split into two sections. On the left are the controls for DAC and the right side are the SPI registers as read back from the part. The left side of the panel allows control of the different features of the AD9783 but can be left in the default positions if you are not running at the very high sample rate>350MSPS . The functions provided by the SPI application are described here, as they relate to the evaluation board. For complete descriptions of each register, refer to the AD9783/1/0 datasheet. In the interest of continuous quality improvements, the images below may not exactly match your version of the software. In order to set the registers with the VI you must click the mouse on the arrow under the edit for updating what is selected below or the right circular arrows continuously updates as features are selected in the various sections of the VI Power Down Control The first set of switched on the far left let you power down the DACs, or Aux DACs, Data, Data format The part defaults to two’s compliments but can be changed to unsigned binary. Seek The Seek bit is used for optimizing the setup, hold and timing delays for high sample rates as described in the data sheet. DAC Mode The main DACs can be used in normal mode, mix mode or return to Zero mode. The registers below also allow DATA Clock The data clock section includes control for Data clk delay if needed for adjusting the timing on the interface. PLL Control The AD9779A has an on-chip PLL. When PLL_ENABLE is turned on, the chip will automatically select the appropriate band using the Divder1 and Divider0 values. The VCO Frequency must be between 1 and 2 GHz for proper operation. The auto-band select can be bypassed by enabling PLL MANUAL and entering a band in PLL Band Select. Divider1 and Divider0 must still be chosen appropriately in this mode of operation. Main DAC Control This section controls the two main DACs in the AD9783. The Full-Scale Current of each DAC can be set with the I DAC Gain and Q DAC Gain controls. The 512 default is for 20ma outputs. Aux DAC Control The Aux DAC control section is used to program aux DACs for LO and image suppression out the output of the AQM. The default is ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00000-0-1/07(A) Quick Start Guide AD9783/81/80-DPG2-EBZ the Aux DACs are programmed power down. Figure 9 AD9783 Evaluation Board Appendix A – DPGDownloader Notes Detailed documentation for the DPGDownloader Software and the Full DPG Suite can be accessed thru the Help Pull-down menu. Also available from the Help pull-down menu is a shortcut for checking to see if there is a more recent DPGDownloader version available with an option to automatically update the software. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00000-0-1/07(A)
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