AD9866BCPZ

FUNCTIONAL BLOCK DIAGRAM AD9866 PWR DWN MODE TXEN/SYNC TXCLK 2-4X IAMP TxDAC 0 TO –7.5dB IOUT_G+ IOUT_N+ IOUT_N– IOUT_G– 0 TO –12dB 12 CLKOUT_1 CLKOUT_2 CLK SYN. ADIO[11:6]/ Tx[5:0] 2M CLK MULTIPLIER OSCIN XTAL ADIO[5:0]/ Rx[5:0] 12 RXE/SYNC RXCLK AGC[5:0] SPI RX+ ADC 80MSPS 2-POLE LPF 1-POLE LPF RX– 6 4 REGISTER CONTROL 0 TO 6dB ∆ = 1dB – 6 TO 18dB –6 TO 24dB ∆ = 6dB ∆ = 6dB 04560-0-001 Low cost 3.3 V CMOS MxFE for broadband modems 12-bit DAC 2×/4× interpolation filter 200 MSPS DAC update rate Integrated 23 dBm line driver with 19.5 dB gain control 12-bit, 80 MSPS ADC −12 dB to +48 dB low noise RxPGA (