ADA4304-4ACPZ-EB

1:3 and 1:4 Single-Ended, Low Cost, Active RF Splitters ADA4304-3/ADA4304-4 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAMS Ideal for CATV and terrestrial applications 2.4 GHz, −3 dB bandwidth 1 dB flatness: 54 MHz to 865 MHz Low noise figure: 4.6 dB Low distortion Composite second-order (CSO): −62 dBc Composite triple beat (CTB): −72 dBc Nominal 3 dB gain per output channel 25 dB output-to-output isolation, 50 MHz to 1000 MHz 75 Ω input and outputs Small package size: 16-lead, 3 mm × 3 mm LFCSP 5V 5V 0.1µF 0.1µF 1µH VCC IL VOUT1 0.01µF VIN VOUT2 ADA4304-3 0.01µF 0.01µF VOUT3 0.01µF GND 07082-001 APPLICATIONS Set-top boxes Residential gateways CATV distribution systems Splitter modules Digital cable ready (DCR) TVs Figure 1. 5V 5V 0.1µF 0.1µF 1µH VCC IL VOUT1 VOUT2 VIN ADA4304-4 0.01µF VOUT3 VOUT4 0.01µF 0.01µF 0.01µF 0.01µF 07082-002 GND Figure 2. GENERAL DESCRIPTION The ADA4304-3/ADA4304-4 are 75 Ω active splitters for use in applications where a lossless signal split is required. Typical applications include multituner digital set-top boxes, cable splitter modules, multituners/digital cable ready (DCR) televisions, and home gateways where traditional solutions require discrete passive splitter modules with separate fixed gain amplifiers. Rev. A The ADA4304-3/ADA4304-4 are fabricated using the Analog Devices, Inc., proprietary silicon germanium (SiGe), complementary bipolar process, enabling them to achieve very low levels of distortion with a noise figure of 4.6 dB. The parts provide low cost alternatives that simplify designs and improve system performance by integrating a signal splitter element and a gain block into a single IC. The ADA4304-3/ADA4304-4 are available in a 16-lead LFCSP and operate in the extended industrial temperature range of −40°C to +85°C. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2007–2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4304-3/ADA4304-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1  Pin Configurations and Function Descriptions ............................5  Applications ....................................................................................... 1  Typical Performance Characteristics ..............................................6  Functional Block Diagrams ............................................................. 1  Test Circuits ........................................................................................9  General Description ......................................................................... 1  Applications..................................................................................... 10  Revision History ............................................................................... 2  Circuit Description .................................................................... 10  Specifications..................................................................................... 3  Outline Dimensions ....................................................................... 11  Absolute Maximum Ratings............................................................ 4  Ordering Guide .......................................................................... 11  Thermal Resistance ...................................................................... 4  ESD Caution .................................................................................. 4  REVISION HISTORY 7/2016—Rev. 0 to Rev. A Changes to Figure 4, Figure 5, Table 4, and Table 5 ..................... 5 Deleted Evaluation Boards Section, RF Layout Considerations Section, Power Supply Section, and Figure 21; Renumbered Sequentially ..................................................................................... 10 Deleted Figure 22 and Figure 23 ................................................... 11 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 11/2007—Revision 0: Initial Version Rev. A | Page 2 of 11 Data Sheet ADA4304-3/ADA4304-4 SPECIFICATIONS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE Bandwidth (−3 dB) Frequency Range Gain Gain Flatness NOISE/DISTORTION PERFORMANCE Noise Figure1 Output IP3 Output IP2 Composite Triple Beat (CTB) Composite Second Order (CSO) Cross Modulation (CXM) INPUT CHARACTERISTICS Input Return Loss Output-to-Input Isolation OUTPUT CHARACTERISTICS Output Return Loss Output-to-Output Isolation 1 dB Compression (P1dB) POWER SUPPLY Nominal Supply Voltage Quiescent Supply Current 1 Conditions See Figure 19 for test circuit ADA4304-3 Min Typ Max ADA4304-4 Min Typ Max 2400 f = 100 MHz 54 MHz to 865 MHz 3.3 1.0 2.9 1.0 MHz MHz dB dB @ 54 MHz @ 550 MHz @ 865 MHz f1 = 97.25 MHz, f2 = 103.25 MHz f1 = 97.25 MHz, f2 = 103.25 MHz 135 channels, 15 dBmV/channel, f = 865 MHz 135 channels, 15 dBmV/channel, f = 865 MHz 135 channels, 15 dBmV/channel, 100% modulation @ 15.75 kHz, f = 865 MHz See Figure 19 for test circuit @ 54 MHz @ 550 MHz @ 865 MHz Any output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz See Figure 19 and Figure 20 for test circuits Any output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Any output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Output referred, f = 100 MHz 4.0 4.6 4.8 26 43 −72 −62 −68 4.0 4.6 4.8 26 43 −72 −62 −68 dB dB dB dBm dBm dBc dBc dBc 54 Rev. A | Page 3 of 11 865 54 865 −17 −22 −12 −13 −16 −8 −18 −21 −12 −14 −15 −8 dB dB dB −33 −33 −34 −30 −30 −31 −33 −33 −35 −31 −31 −32 dB dB dB −21 −16 −14 −17 −11 −9 −21 −17 −14 −17 −12 −9 dB dB dB dB dB dB dB dBm 5.25 105 V mA −26 −25 −25 9.0 4.75 Characterized with 50 Ω noise figure analyzer. 2400 Unit 5.0 92 −26 −25 −25 8.7 5.25 105 4.75 5.0 92 ADA4304-3/ADA4304-4 Data Sheet ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 5.5 V See Figure 3 −65°C to +125°C −40°C to +85°C 300°C 150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the device (including exposed pad) soldered to a high thermal conductivity 4-layer (2s2p) circuit board, as described in EIA/JESD 51-7. Table 3. Thermal Resistance Package Type 16-Lead LFCSP (Exposed Pad) θJA 98 Unit °C/W The power dissipated in the package (PD) is essentially equal to the quiescent power dissipation, that is, the supply voltage (VS) times the quiescent current (IS). In Table 1, the maximum power dissipation of the ADA4304-3/ADA4304-4 can be calculated as PD (MAX) = 5.25 V × 105 mA = 551 mW Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the θJA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead LFCSP (98°C/W) on a JEDEC standard 4-layer board. 2.0 1.8 MAXIMUM POWER DISSIPATION (W) Table 2. 1.6 1.4 1.2 1.0 0.8 0.6 0.4 The maximum safe power dissipation in the ADA4304-3/ ADA4304-4 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. 0 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE (°C) 80 90 100 07082-003 0.2 Maximum Power Dissipation Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION Rev. A | Page 4 of 11 Data Sheet ADA4304-3/ADA4304-4 10 VOUT3 GND 3 GND NOTES 1. NIC = NO INTERNAL CONNECTION. 2. EPAD SHOULD BE CONNECTED TO GND. 13 VOUT1 TOP VIEW (Not to Scale) 11 GND 10 VOUT3 9 GND 7 VIN 4 NIC 8 GND 7 GND 6 GND 5 9 12 VOUT2 ADA4304-4 GND NOTES 1. EPAD SHOULD BE CONNECTED TO GND. Figure 4. ADA4304-3Pin Configuration 07082-005 VCC 2 14 IL 16 VCC VCC 1 VOUT4 8 TOP VIEW (Not to Scale) VIN 4 12 VOUT2 11 GND GND 5 GND 3 ADA4304-3 07082-004 VCC 2 GND 6 VCC 1 15 VCC 13 VOUT1 14 IL 16 VCC 15 VCC PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 5. ADA4304-4 Pin Configuration Table 4. ADA4304-3 Pin Function Descriptions Table 5. ADA4304-4 Pin Function Descriptions Pin No. 1, 2, 15, 16 3, 5 to 7, 9, 11 4 8 10 12 13 14 Pin No. 1, 2, 15, 16 3, 5 to 7, 9, 11 4 8 10 12 13 14 Mnemonic VCC Description Supply Pin. GND Ground. VIN NIC VOUT3 VOUT2 VOUT1 IL EPAD Input. No Internal Connection. Output 3. Output 2. Output 1. Bias Pin. Exposed Pad. Exposed pad should be connected to GND. Rev. A | Page 5 of 11 Mnemonic VCC GND Description Supply Pin. Ground. VIN VOUT4 VOUT3 VOUT2 VOUT1 IL EPAD Input. Output 4. Output 3. Output 2. Output 1. Bias Pin. Exposed Pad. Exposed pad should be connected to GND. ADA4304-3/ADA4304-4 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. 10 –54 50Ω SYSTEM –56 8 CSO (dBc) –60 TA = +85°C TA = +25°C –62 NOISE FIGURE (dB) –58 –64 –66 TA = –40°C –68 6 TA = +85°C TA = +25°C 4 TA = –40°C 2 –70 100 1000 FREQUENCY (MHz) 0 50 07082-020 –74 50 100 1000 FREQUENCY (MHz) Figure 6. Composite Second Order (CSO) vs. Frequency 07082-023 –72 Figure 9. Noise Figure vs. Frequency 60 –60 –63 55 –66 50 TA = +85°C OUTPUT IP2 (dBm) CTB (dBc) –69 –72 –75 TA = +25°C –78 TA = –40°C –81 ADA4304-3 45 40 ADA4304-4 35 30 –84 1000 FREQUENCY (MHz) 20 50 100 1000 07082-010 100 07082-021 –90 50 1000 07082-011 25 –87 FREQUENCY (MHz) Figure 7. Composite Triple Beat (CTB) vs. Frequency Figure 10. Output IP2 vs. Frequency –60 40 –63 35 –66 OUTPUT IP3 (dBm) TA = +25°C –75 –78 TA = –40°C –81 20 ADA4304-4 15 5 –87 –90 50 ADA4304-3 25 10 –84 100 1000 FREQUENCY (MHz) 07082-022 CXM (dBc) –72 30 TA = +85°C –69 Figure 8. Cross Modulation (CXM) vs. Frequency 0 50 100 FREQUENCY (MHz) Figure 11. Output IP3 vs. Frequency Rev. A | Page 6 of 11 Data Sheet ADA4304-3/ADA4304-4 0 4 OUTPUT-TO-OUTPUT ISOLATION (dB) TA = +25°C TA = –40°C 3 2 GAIN (dB) 1 TA = +85°C 0 –1 –2 –3 –4 –5 100 1000 FREQUENCY (MHz) –10 –15 –20 –30 ADA4304-3 –35 –40 100 1000 FREQUENCY (MHz) Figure 12. ADA4304-3 Gain vs. Frequency Figure 15. Output-to-Output Isolation vs. Frequency 5 0 TA = +25°C 4 3 –5 INPUT RETURN LOSS (dB) TA = –40°C 2 1 GAIN (dB) ADA4304-4 –25 –45 50 07082-024 –6 40 –5 07082-014 5 TA = +85°C 0 –1 –2 –3 –4 –10 –15 ADA4304-3 –20 –25 ADA4304-4 1000 FREQUENCY (MHz) –30 50 100 1000 07082-015 100 07082-025 –6 40 1000 07082-016 –5 FREQUENCY (MHz) Figure 13. ADA4304-4 Gain vs. Frequency Figure 16. Input Return Loss vs. Frequency –25 0 –5 –31 OUTPUT RETURN LOSS (dB) –29 ADA4304-3 –33 ADA4304-4 –35 –37 –39 –41 –10 ADA4304-3 –15 –20 ADA4304-4 –25 –43 –45 50 100 1000 FREQUENCY (MHz) 07082-013 OUTPUT-TO-INPUT ISOLATION (dB) –27 Figure 14. Output-to-Input Isolation vs. Frequency –30 50 100 FREQUENCY (MHz) Figure 17. Output Return Loss vs. Frequency Rev. A | Page 7 of 11 ADA4304-3/ADA4304-4 Data Sheet 95 90 85 80 75 –60 –50 –40 –30 –20 0 20 40 60 80 100 –10 10 30 50 70 90 TEMPERATURE (°C) 07082-026 QUIESCENT SUPPLY CURRENT (mA) 100 Figure 18. Quiescent Supply Current vs. Temperature Rev. A | Page 8 of 11 Data Sheet ADA4304-3/ADA4304-4 TEST CIRCUITS RF NETWORK ANALYZER RF NETWORK ANALYZER 75Ω S-PARAMETER TEST SET 75Ω S-PARAMETER TEST SET VOUTm VOUTm VIN DUT 4 VIN DUT 75Ω NOTES 1. TESTED FOR ALL COMBINATIONS OF VOUTm AND VOUTn. VOUTn NOTES 1. TESTED FOR ALL COMBINATIONS OF VOUTm AND VOUTn. 75Ω 07082-018 VOUTn Figure 19. Test Circuit for Transmission, Isolation, and Reflection Measurements 07082-019 4 Figure 20. Test Circuit for Output-to-Output Isolation Measurements Rev. A | Page 9 of 11 ADA4304-3/ADA4304-4 Data Sheet APPLICATIONS The ADA4304-3/ADA4304-4 active splitters are primarily intended for use in the downstream path of television set-top boxes (STBs) that contain multiple tuners. They are typically located directly after the diplexer in a bidirectional CATV customer premise unit. The ADA4304-3/ADA4304-4 provide a single-ended input and three or four single-ended outputs that allow the delivery of the RF signal to multiple signal paths. These paths can include, but are not limited to, a main picture tuner, the picture-in-picture (PIP) tuner, an out-of-band (OOB) tuner, a digital video recorder (DVR), and a cable modem (CM). The ADA4304-3/ADA4304-4 exhibit composite second-order (CSO) and composite triple beat (CTB) products that are −62 dBc and −72 dBc, respectively. The use of the SiGe bipolar process also allows the ADA4304-3/ADA4304-4 to achieve a noise figure (NF) of 4.6 dB at 550 MHz. CIRCUIT DESCRIPTION The ADA4304-3/ADA4304-4 consist of a low noise buffer amplifier followed by a resistive power divider. This arrangement provides 3.3 dB (ADA4304-3) or 2.9 dB (ADA4304-4) of gain relative to the RF signal present at the input of the device. The input and each output must be properly matched to a 75 Ω environment for distortion and noise performance to match the data sheet specifications. AC coupling capacitors of 0.01 μF are recommended for the input and outputs. A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is required to correctly bias the internal nodes of the ADA4304-3/ ADA4304-4. It should be connected between the 5 V supply and the IL pin (Pin 14). The choke should be placed as close as possible to the ADA4304-3/ADA4304-4 to minimize parasitic capacitance on the IL pin, which is critical for achieving the specified bandwidth and flatness. Rev. A | Page 10 of 11 Data Sheet ADA4304-3/ADA4304-4 OUTLINE DIMENSIONS PIN 1 INDICATOR 0.30 0.23 0.18 0.50 BSC PIN 1 INDICATOR 16 13 1 12 EXPOSED PAD 1.45 1.30 SQ 1.15 4 9 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 5 8 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 0.25 MIN BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED. 111808-A 3.10 3.00 SQ 2.90 Figure 21. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-16-21) Dimensions shown in millimeters ORDERING GUIDE Model1 ADA4304-3ACPZ-RL ADA4304-3ACPZ-R7 ADA4304-3ACPZ-R2 ADA4304-4ACPZ-RL ADA4304-4ACPZ-R7 ADA4304-4ACPZ-R2 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead LFCSP 16-Lead LFCSP 16-Lead LFCSP 16-Lead LFCSP 16-Lead LFCSP 16-Lead LFCSP Z=RoHS Compliant Part ©2007–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07082-0-7/16(A) Rev. A | Page 11 of 11 Package Option CP-16-21 CP-16-21 CP-16-21 CP-16-21 CP-16-21 CP-16-21 Ordering Quantity 5,000 1,500 250 5,000 1,500 250 Branding H16 H16 H16 H10 H10 H10