ADA4412-3ARQZ-R7

Integrated Triple Video Filter with Selectable Cutoff Frequencies for RGB, HD/SD ADA4412-3 FEATURES Sixth-order adjustable video filters 36 MHz, 18 MHz, and 9 MHz Many video standards supported: RGB, YPbPr, YUV, SD, Y/C Ideal for 720p and 1080i resolutions −1 dB bandwidth of 31.5 MHz for HD Low quiescent power Only 265 mW for 3 channels on 5 V supply Disable feature cuts supply current to 10 μA DC output offset adjust: ±0.5 V, input referred Fixed throughput gain of ×2 Excellent video specifications Wide supply range: +4.5 V to ±5 V Rail-to-rail output Output can swing 4.5 V p-p on single 5 V supply Small packaging: 20-lead QSOP FUNCTIONAL BLOCK DIAGRAM Y/G IN ×1 36MHz, 18MHz, 9MHz ×2 Y/G OUT Pb/B IN ×1 36MHz, 18MHz, 9MHz ×2 Pb/B OUT Pr/R IN ×1 36MHz, 18MHz, 9MHz DC OFFSET ×2 Pr/R OUT LEVEL1 LEVEL2 CUTOFF SELECT DISABLE 2 05528-001 ADA4412-3 Figure 1. APPLICATIONS Set-top boxes DVD players and recorders Personal video recorders HDTVs Projectors GENERAL DESCRIPTION The ADA4412-3 is a comprehensive filtering solution designed to give designers the flexibility to easily filter and drive various video signals, including high definition video. Cutoff frequencies of the sixth-order video filters range from 9 MHz to 36 MHz and can be selected by two logic pins to obtain four filter combinations that are tuned for RGB, high definition, and standard definition video signals. The ADA4412-3 has a rail-torail output that can swing 4.5 V p-p on a single 5 V supply. The ADA4412-3 includes an output offset voltage adjustment feature. Output voltage offset is continuously adjustable over an input-referred range of ±500 mV by applying a differential voltage to an independent offset control input. The ADA4412-3 can operate on a single +5 V supply as well as on ±5 V supplies. Single-supply operation is ideal in applications where power consumption is critical. The disable feature allows for further power conservation by reducing the supply current to typically 10 μA when a particular device is not in use. Dual-supply operation is best for applications where the negative-going video signal excursions must swing at or below ground while maintaining excellent video performance. The output buffers have the ability to drive two 75 Ω doubly terminated cables that are either dc-coupled or ac-coupled. The ADA4412-3 is available in a 20-lead QSOP and is rated for operation over the extended industrial temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADA4412-3 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configuration And Function Descriptions............................ 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ........................................................................ 9 Applications..................................................................................... 10 Overview ..................................................................................... 10 Disable ......................................................................................... 10 Cutoff Frequency Selection....................................................... 10 Output DC Offset Control ........................................................ 10 Input and Output Coupling ...................................................... 11 Printed Circuit Board Layout ................................................... 11 Video Encoder Reconstruction Filter...................................... 11 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13 REVISION HISTORY 7/05—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADA4412-3 SPECIFICATIONS VS = 5 V, @ TA = 25°C, VO = 1.4 V p-p, RL = 150 Ω, unless otherwise noted. Table 1. Parameter OVERALL PERFORMANCE Offset Error Offset Adjust Range Input Voltage Range, All Inputs Output Voltage Swing, All Outputs Linear Output Current per Channel Integrated Voltage Noise, Referred to Input Filter Input Bias Current Total Harmonic Distortion at 1 MHz Gain Error Magnitude FILTER DYNAMIC PERFORMANCE −1 dB Bandwidth Test Conditions/Comments Input referred, all channels Input referred Positive swing Negative swing All channels All channels FC = 36 MHz, FC = 18 MHz/FC = 9 MHz VS− − 0.1 VS+ − 0.30 Min Typ 9 ±500 VS+ − 0.20 VS− + 0.10 30 0.50 6.6 0.01/0.04 0.09 31.5 15.5 8.0 37 19 9 −43 −62 19 7 14 27 0.16 0.05 0.8 2.0 10 VS+ − 0.5 100 130 12 90 4.5 53 10 70 60 12 56 150 15 Max 23 VS+ − 2.0 VS− + 0.15 Unit mV mV V V V mA mV rms μA % dB MHz MHz MHz MHz MHz MHz dB dB ns ns ns ns % Degrees V V μA V ns ns μA dB V mA μA dB dB 0.49 −3 dB Bandwidth Out-of-Band Rejection Crosstalk Propagation Delay Group Delay Variation Differential Gain Differential Phase CUTOFF CONTROL INPUT PERFORMANCE Input Logic 0 Voltage Input Logic 1 Voltage Input Bias Current DISABLE PERFORMANCE DISABLE Assert Voltage DISABLE Assert Time DISABLE Deassert Time DISABLE Input Bias Current Input-to-Output Isolation—Disabled POWER SUPPLY Operating Range Quiescent Current Quiescent Current—Disabled PSRR, Positive Supply PSRR, Negative Supply Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz f = 75 MHz f = 5 MHz, FC = 36 MHz f = 5 MHz, FC = 36 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz NTSC, FC = 9 MHz NTSC, FC = 9 MHz 26.5 13.5 6.5 34 16 8 −31 f = 10 MHz All channels All channels 64 58 Rev. 0 | Page 3 of 16 ADA4412-3 VS = ±5 V, @ TA = 25°C, VO = 1.4 V p-p, RL = 150 Ω, unless otherwise noted. Table 2. Parameter OVERALL PERFORMANCE Offset Error Offset Adjust Range Input Voltage Range, All Inputs Output Voltage Swing, All Outputs Linear Output Current per Channel Integrated Voltage Noise, Referred to Input Filter Input Bias Current Total Harmonic Distortion at 1 MHz Gain Error Magnitude FILTER DYNAMIC PERFORMANCE −1 dB Bandwidth Test Conditions/Comments Input referred, all channels Input referred Positive swing Negative swing All channels All channels FC = 36 MHz, FC = 18 MHz/FC = 9 MHz VS− − 0.1 VS+ − 0.33 Min Typ 10 ±500 VS+ − 0.24 VS− + 0.24 30 0.50 6.3 0.01/0.03 0.04 30.0 15.5 8.0 36 19 9 −42 −62 19 7 12 24 0.04 0.16 0.8 2.0 10 VS+ − 0.5 75 125 35 90 4.5 57 10 74 62 12 60 150 15 Max 25 VS+ − 2.0 VS− + 0.33 Unit mV mV V V V mA mV rms μA % dB MHz MHz MHz MHz MHz MHz dB dB ns ns ns ns % Degrees V V μA V ns ns μA dB V mA μA dB dB 0.50 −3 dB Bandwidth Out-of-Band Rejection Crosstalk Propagation Delay Group Delay Variation Differential Gain Differential Phase CUTOFF CONTROL INPUT PERFORMANCE Input Logic 0 Voltage Input Logic 1 Voltage Input Bias Current DISABLE PERFORMANCE DISABLE Assert Voltage DISABLE Assert Time DISABLE Deassert Time DISABLE Input Bias Current Input-to-Output Isolation—Disabled POWER SUPPLY Operating Range Quiescent Current Quiescent Current—Disabled PSRR, Positive Supply PSRR, Negative Supply Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz f = 75 MHz f = 5 MHz, FC = 36 MHz f = 5 MHz, FC = 36 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz NTSC, FC = 9 MHz NTSC, FC = 9 MHz 34 17 8 −31 f = 10 MHz All channels All channels 66 59 Rev. 0 | Page 4 of 16 ADA4412-3 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Power Dissipation Storage Temperature Operating Temperature Range Lead Temperature Range (Soldering 10 sec) Junction Temperature Rating 12 V See Figure 2 –65°C to +125°C –40°C to +85°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to load drive depends on the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. The power dissipated due to all of the loads is equal to the sum of the power dissipations due to each individual load. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads from metal traces, through-holes, ground, and power planes reduces the θJA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 20-lead QSOP (83°C/W) on a JEDEC standard 4-layer board. θJA values are approximations. 2.5 THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for device soldered in circuit board for surface-mount packages. Table 4. Thermal Resistance Package Type 20-Lead QSOP θJA 83 Unit °C/W 2.3 2.1 Maximum Power Dissipation The maximum safe power dissipation in the ADA4412-3 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4412-3. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices potentially causing failure. WATTS 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 –40 05528-002 –20 0 20 40 60 80 AMBIENT TEMPERATURE (°C) Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 16 ADA4412-3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LEVEL1 1 DISABLE 2 20 19 18 LEVEL2 VCC Y/G_OUT VEE Pb/B_OUT VEE Pr/R_OUT VCC NC DGND 05528-003 Y/G 3 GND 4 ADA4412-3 TOP VIEW (Not to Scale) 17 16 15 14 13 12 11 Pb/B 5 GND Pr/R 6 7 F_SEL_A 8 F_SEL_B 9 GND 10 NC = NO CONNECT Figure 3. 20-Lead QSOP Pin Configuration Table 5. 20-Lead QSOP Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name LEVEL1 DISABLE Y/G GND Pb/B GND Pr/R F_SEL_A F_SEL_B GND DGND NC VCC Pr/R_OUT VEE Pb/B_OUT VEE Y/G_OUT VCC LEVEL2 Description DC Level Adjust Pin 1 Disable/Power Down Y/G Video Input Signal Ground Reference Pb/B Video Input Signal Ground Reference Pr/R Video Input Filter Cutoff Select Input A Filter Cutoff Select Input B Signal Ground Reference Digital Ground Reference No Internal Connection Positive Power Supply Pr/R Video Output Negative Power Supply Pb/B Video Output Negative Power Supply Y/G Video Output Positive Power Supply DC Level Adjust Pin 2 Rev. 0 | Page 6 of 16 ADA4412-3 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, RL = 150 Ω, VO = 1.4 V p-p, VS = 5 V, TA = 25°C. 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 1 FC = 36MHz 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 1 FC = 36MHz FC = 9MHz FC = 9MHz FC = 18MHz GAIN (dB) BLACK LINE: VS = +5V GRAY LINE: VS = ±5V GAIN (dB) FC = 18MHz 10 FREQUENCY (MHz) 100 10 FREQUENCY (MHz) 100 Figure 4. Frequency Response vs. Power Supply and Cutoff Frequency 6.5 FC = 36MHz 6.0 Figure 7. Frequency Response vs. Temperature and Cutoff Frequency 100 90 80 BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 5.5 GROUP DELAY (ns) FC = 9MHz 70 60 50 40 30 FC = 9MHz GAIN (dB) 5.0 FC = 18MHz 4.5 4.0 BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 05528-005 FC = 18MHz 20 FC = 36MHz 10 1 10 FREQUENCY (MHz) 100 3.0 1 10 FREQUENCY (MHz) 100 Figure 5. Frequency Response Flatness vs. Cutoff Frequency 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 1 Figure 8. Group Delay vs. Frequency, Power Supply, and Cutoff Frequency –40 CROSSTALK REFERRED TO INPUT (dB) FC = 36MHz –50 RSOURCE = 300Ω Y AND Pr SOURCE CHANNELS Pb RECEPTOR CHANNEL FC = 9MHz FC = 18MHz –60 GAIN (dB) –70 FC = 9MHz FC = 18MHz –80 FC = 36MHz –90 05528-009 05528-006 BLACK LINE: VOUT = 100mV p-p GRAY LINE: VOUT = 2V p-p 10 FREQUENCY (MHz) 100 –100 0.1 1 10 FREQUENCY (MHz) 100 Figure 6. Frequency Response vs. Output Amplitude and Cutoff Frequency Figure 9. Channel-to-Channel Crosstalk vs. Frequency and Cutoff Frequency Rev. 0 | Page 7 of 16 05527-008 3.5 05528-007 05528-004 –40 °C +25°C +85°C ADA4412-3 5 –5 –15 –25 –35 FC = 9MHz –45 –55 –65 –75 0.1 FC = 36MHz FC = 18MHz 5 –5 –15 –25 FC = 9MHz –35 FC = 18MHz –45 FC = 36MHz –55 05528-011 05528-013 PSRR (dB) PSRR (dB) –65 –75 0.1 1 10 FREQUENCY (MHz) 100 1 10 FREQUENCY (MHz) 100 Figure 10. Positive Supply PSRR vs. Frequency and Cutoff Frequency 3.5 3.3 3.1 2.5 OUTPUT 2.0 Figure 13. Negative Supply PSRR vs. Frequency and Cutoff Frequency 6 FC = 36MHz 2× INPUT 2× INPUT 5 1.5 0.5% (70ns) ERROR 1.0 OUTPUT VOLTAGE (V) 2.9 2.7 2.5 2.3 2.1 1.9 OUTPUT VOLTAGE (V) 4 FC = 18MHz 3 FC = 9MHz 2 0 –0.5 –1.0 –1.5 ERROR (%) 0.5 1 05528-010 1% (58ns) 1.7 50ns/DIV 1.5 –2.5 –2.0 200ns/DIV –1 Figure 11. Settling Time 3.5 3.3 3.1 OUTPUT VOLTAGE (V) Figure 14. Overdrive Recovery vs. Cutoff Frequency FC = 36MHz 2.9 2.7 FC = 18MHz 2.5 2.3 2.1 1.9 1.7 100ns/DIV 1.5 05528-012 FC = 9MHz NETWORK ANALYZER Tx 50Ω RL = 150Ω 118 Ω DUT 50Ω 86.6Ω NETWORK ANALYZER Rx 50Ω 05528-051 MINIMUM-LOSS MATCHING NETWORK LOSS CALIBRATED OUT Figure 12. Transient Response vs. Cutoff Frequency Figure 15. Basic Test Circuit for Swept Frequency Measurements Rev. 0 | Page 8 of 16 05528-014 0 ADA4412-3 THEORY OF OPERATION The ADA4412-3 is an integrated video filtering and driving solution that offers variable bandwidth to meet the needs of a number of different video resolutions. There are three filters targeted for use with component video signals. The filters have selectable bandwidths that correspond to the popular component video standards. Each filter has a sixth-order Butterworth response that includes group delay optimization. The group delay variation from 1 MHz to 36 MHz in the 36 MHz section is 7 ns, which produces a fast settling pulse response. The ADA4412-3 is designed to operate in many video environments. The supply range is 5 V to 12 V, single supply or dual supply, and requires a relatively low nominal quiescent current of 15 mA per channel. In single-supply applications, the PSRR is greater than 60 dB, providing excellent rejection in systems with supplies that are noisy or under-regulated. In applications where power consumption is critical, the part can be powered down to draw typically 10 μA by pulling the DISABLE pin to the most positive rail. The ADA4412-3 is also well-suited for high encoding frequency applications because it maintains a stop-band attenuation of over 40 dB to 400 MHz. The ADA4412-3 is intended to take dc-coupled inputs from an encoder or other ground referenced video signals. The ADA4412-3 input is high impedance. No minimum or maximum input termination is required, though input terminations above 1 kΩ can degrade crosstalk performance at high frequencies. No clamping is provided internally. For applications where dc restoration is required, dual supplies work best. Using a termination resistance of less than a few hundred ohms to ground on the inputs and suitably adjusting the level-shifting circuitry provides precise placement of the output voltage. For single-supply applications (VS− = GND), the input voltage range extends from 100 mV below ground to within 2.0 V of the most positive supply. Each filter input includes level-shifting circuitry. The level-shifting circuitry adds a dc component to ground-referenced input signals so that they can be reproduced accurately without the output buffers hitting the negative rail. Because the filters have negative rail input and rail-to-rail output, dc level shifting is generally not necessary, unless accuracy greater than that of the saturated output of the driver is required at the most negative edge. This varies with load but is typically 100 mV in a dc-coupled, single-supply application. If ac coupling is used, the saturated output level is higher because the drivers have to sink more current on the low side. If dual supplies are used (VS− < GND), no level shifting is required. In dual-supply applications, the level-shifting circuitry can be used to take a ground referenced signal and put the blanking level at ground while the sync level is below ground. The output drivers on the ADA4412-3 have rail-to-rail output capabilities with 6 dB gain. Each output is capable of driving two ac- or dc-coupled, 75 Ω source-terminated loads. If a large dc output level is required while driving two loads, ac coupling should be used to limit the power dissipation. Rev. 0 | Page 9 of 16 ADA4412-3 APPLICATIONS OVERVIEW With its high impedance inputs and high output drive, the ADA4412-3 is ideally suited to video reconstruction and antialias filtering applications. The high impedance inputs give designers flexibility with regard to how the input signals are terminated. Devices with DAC current source outputs that feed the ADA4412-3 can be loaded in whatever resistance provides the best performance, and devices with voltage outputs can be optimally terminated as well. The ADA4412-3 outputs can each drive up to two source-terminated 75 Ω loads and can therefore directly drive the outputs from set-top boxes, DVD players, and the like without the need for a separate output buffer. Binary control inputs are provided to select the filter cutoff frequency. These inputs are compatible with 3 V and 5 V TTL and CMOS logic levels referenced to GND. The disable feature is asserted by pulling the DISABLE pin to the positive supply. The LEVEL1 and LEVEL2 inputs comprise a differential input that controls the dc level at the output pins. OUTPUT DC OFFSET CONTROL The LEVEL1 and LEVEL2 inputs work as a differential, inputreferred output offset control. In other words, the output offset voltage of a given channel is equal to the difference in voltage between the LEVEL1 and LEVEL2 inputs multiplied by the overall filter gain. This relationship is expressed in Equation 1. VOS (OUT ) = (2 )(LEVEL1 − LEVEL2) (1) LEVEL1 and LEVEL2 are the voltages applied to the respective inputs, and the factor of 2 reflects the gain of ×2 in the output stage. For example, setting LEVEL1 to 300 mV and LEVEL2 to 0 V shifts the offset voltages at the ADA4412-3 outputs to 600 mV. This particular setting can be used in most single-supply applications to keep the output swings safely above the negative supply rail. The maximum differential voltage that can be applied across the LEVEL1 and LEVEL2 inputs is ±500 mV. From a single-ended standpoint, the LEVEL1 and LEVEL2 inputs have the same range as the filter inputs. See the Specifications for the limits. The LEVEL1 and LEVEL2 inputs must each be bypassed to GND with a 0.1 μF ceramic capacitor. In single-supply applications, a positive output offset must be applied to keep the negative-most excursions of the output signals above the specified minimum output swing limit. Figure 16 and Figure 17 illustrate several ways to use the LEVEL1 and LEVEL2 inputs. Figure 16 shows examples of how to generate fully adjustable LEVEL1 and LEVEL2 voltages from ±5 V and single +5 V supplies. These circuits show a general case, but a more practical approach is to fix one voltage and vary the other. Figure 17 illustrates an effective way to produce a 600 mV output offset voltage in a single-supply application. Although the LEVEL2 input could simply be connected to GND, Figure 17 includes bypassed resistive voltage dividers for each input so that the input levels can be changed, if necessary. Additionally, many in-circuit testers require that I/O signals not be tied directly to the supplies or GND. DNP indicates do not populate. DISABLE The ADA4412-3 includes a disable feature that can be used to save power when a particular device is not in use. As indicated in the Overview section, the disable feature is asserted by pulling the DISABLE pin to the positive supply. The DISABLE pin also functions as a reference level for the logic inputs and therefore must be connected to ground when the device is not disabled. Table 6 summarizes the disable feature operation. Table 6. DISABLE Function DISABLE Pin Connection VS+ GND Status Disabled Enabled CUTOFF FREQUENCY SELECTION Four combinations of cutoff frequencies are provided for the video signals. The cutoff frequencies have been selected to correspond with the most commonly deployed component video scanning systems. Selection between the cutoff frequency combinations is controlled by the logic signals applied to the F_SEL_A and F_SEL_B inputs. Table 7 summarizes cutoff frequency selection. Table 7. Filter Cutoff Frequency Selection F_SEL_A 0 0 1 1 F_SEL_B 0 1 0 1 Y/G Cutoff 36 MHz 36 MHz 18 MHz 9 MHz Pb/B Cutoff 36 MHz 18 MHz 18 MHz 9 MHz Pr/R Cutoff 36 MHz 18 MHz 18 MHz 9 MHz Rev. 0 | Page 10 of 16 ADA4412-3 DUAL SUPPLY +5V 9.53kΩ 1kΩ 9.53kΩ –5V LEVEL1 0.1μF +5V 9.53kΩ 1kΩ 9.53kΩ –5V LEVEL2 0.1μF ADA4412-3 75Ω 220 μF 75Ω CABLE 75Ω 75Ω 220 μF 75Ω CABLE 75Ω SINGLE SUPPLY +5V 9.09kΩ 1kΩ LEVEL1 0.1μF +5V 9.09kΩ 1kΩ LEVEL2 0.1μF 05528-018 Figure 18. Driving Two AC-Coupled Loads with Two Coupling Capacitors 75Ω 75Ω CABLE 75Ω 75Ω 75Ω CABLE 75Ω ADA4412-3 470μF Figure 16. Generating Fully Adjustable Output Offsets +5V 10kΩ LEVEL1 634Ω 0.1μF +5V DNP LEVEL2 05528-019 Figure 19. Driving Two AC-Coupled Loads with One Common Coupling Capacitor PRINTED CIRCUIT BOARD LAYOUT As with all high speed applications, attention to printed circuit board layout is of paramount importance. Standard high speed layout practices should be adhered to when designing with the ADA4412-3. A solid ground plane is recommended, and surface-mount, ceramic power supply decoupling capacitors should be placed as close as possible to the supply pins. All of the ADA4412-3 GND pins should be connected to the ground plane with traces that are as short as possible. Controlled impedance traces of the shortest length possible should be used to connect to the signal I/O pins and should not pass over any voids in the ground plane. A 75 Ω impedance level is typically used in video applications. All signal outputs of the ADA4412-3 should include series termination resistors when driving transmission lines. When the ADA4412-3 receives its inputs from a device with current outputs, the required load resistor value for the output current is often different from the characteristic impedance of the signal traces. In this case, if the interconnections are sufficiently short (