ADA4420-6

Low Cost 6-Channel HD/SD Video Filter ADA4420-6 FEATURES FEATURES Sixth-order Sixth-order filters Transparent input sync tip clamp −1 dB bandwidth of 26 MHz typical for HD HD rejection @ 75 MHz: 48 dB typical NTSC differential gain: 0.19% NTSC differential phase: 0.76° Rail-to-rail outputs Low quiescent current: 32 mA typical Disable feature Output dc offset INSD1 CLAMP INSD2 CLAMP INSD3 OUTSD3 OUTSD2 FUNCTIONAL FUNCTIONAL BLOCK DIAGRAM ×1 SD ×2 OUTSD1 ×1 SD ×2 ×1 CLAMP SD ×2 DIS INHD1 APPLICATIONS APPLICATIONS Set-top Set-top boxes DVD players and recorders HDTVs Projectors Personal video recorders INHD2 ×1 CLAMP HD ×2 OUTHD1 ×1 CLAMP HD ×2 OUTHD2 INHD3 CLAMP ×1 HD ×2 OUTHD3 GENERAL GENERAL DESCRIPTION The The ADA4420-6 is a low cost video reconstruction filter specifically designed for consumer applications. It consists of six independent sixth-order Butterworth filters/buffers, three for standard definition (Y/C or CVBS) and three for high definition component signals (YPbPr or RGB). The ADA4420-6 operates from a single 5 V supply and has a low quiescent current of 32 mA, making it ideal for applications where power consumption is critical. A disable feature allows for further power conservation by reducing the supply current to less than 8 μA typical when the device is not in use. Figure 1. ADA4420-6 Each channel features a transparent sync tip clamp, allowing ac coupling of the inputs without requiring dc restoration. The output drivers on the ADA4420-6 have rail-to-rail output capabilities with 6 dB gain. A built-in offset of 250 mV allows the outputs to be dc-coupled, eliminating the need for large coupling capacitors. Each output is capable of driving two 75 Ω doubly terminated cables. The ADA4420-6 is available in a 16-lead QSOP and operates in the extended industrial temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. 07532-001 ADA4420-6 TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  General Description ......................................................................... 1  Functional Block Diagram .............................................................. 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Absolute Maximum Ratings............................................................ 4  Thermal Resistance ...................................................................... 4  Maximum Power Dissipation ..................................................... 4  ESD Caution .................................................................................. 4  Pin Configuration and Function Descriptions ............................. 5  Typical Performance Characteristics ..............................................6  Test Circuits ........................................................................................9  Applications Information .............................................................. 10  Overview ..................................................................................... 10  Disable ......................................................................................... 10  Input and Output Coupling ...................................................... 10  Printed Circuit Board (PCB) Layout ....................................... 10  Video Encoder Reconstruction Filter ...................................... 10  Outline Dimensions ....................................................................... 12  Ordering Guide .......................................................................... 12  REVISION HISTORY 8/08—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADA4420-6 SPECIFICATIONS VS = 5 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 17, Figure 18, and Figure 19 for the test circuits. Table 1. Parameter OVERALL PERFORMANCE DC Voltage Gain Input Voltage Range, All Inputs Output Voltage Range, All Outputs Linear Output Current per Channel Filter Input Bias Current SD CHANNEL DYNAMIC PERFORMANCE −1 dB Bandwidth −3 dB Bandwidth Out-of-Band Rejection Crosstalk Total Harmonic Distortion Signal-to-Noise Ratio Propagation Delay Group Delay Variation Differential Gain Differential Phase HD CHANNEL DYNAMIC PERFORMANCE −1 dB Bandwidth −3 dB Bandwidth Out-of-Band Rejection Crosstalk Total Harmonic Distortion Signal-to-Noise Ratio Propagation Delay Group Delay Variation DC CHARACTERISTICS Operating Voltage Quiescent Supply Current PSRR Output DC Offset DISABLE Assert Voltage DISABLE Assert Time DISABLE De-Assert Time DISABLE Input Bias Current Input-to-Output Isolation Test Conditions/Comments All channels Min 5.8 Typ 6.0 0 to 2.1 0.25 to 4.6 30 1 8.6 10 45 −68 0.02 70 57 16 0.19 0.76 Max 6.2 Unit dB V V mA μA MHz MHz dB dB % dB ns ns % Degrees f = 27 MHz f = 1 MHz f = 1 MHz, VO = 1.4 V p-p, dc-coupled outputs f = 100 kHz to 6 MHz, unweighted f = 100 kHz to 5 MHz NTSC; ac-coupled inputs, dc-coupled outputs; see Figure 18 NTSC; ac-coupled inputs, dc-coupled outputs; see Figure 18 8.5 42 f = 75 MHz f = 1 MHz f = 10 MHz, VO = 1.4 V p-p, dc-coupled outputs f = 100 kHz to 30 MHz, unweighted f = 100 kHz to 30 MHz 27 43 26 31 48 −68 0.57 66 15 11 4.75 to 5.25 32 7 41 45 250 20 450 −6.8 −96 MHz MHz dB dB % dB ns ns V mA μA dB dB mV V ns ns μA dB Active, DIS = 1 Disabled, DIS = 0 HD channel, referred to output SD channel, referred to output All channels 36 13 35 40 135 375 1.9 Disabled, DIS = 0 Disabled, DIS = 0, f = 5 MHz Rev. 0 | Page 3 of 12 ADA4420-6 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 5.5 V See Figure 2 −65°C to +125°C −40°C to +85°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to load drive depends on the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. The power dissipated due to the loads is equal to the sum of the power dissipations due to each individual load. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. Figure 2 shows the maximum power dissipation in the package vs. the ambient temperature for the 16-lead QSOP (105°C/W) on a JEDEC standard 4-layer board. θJA values are approximate. 2.0 1.8 MAXIMUM POWER DISSIPATION (W) THERMAL RESISTANCE θJA is specified for the device soldered to a high thermal conductivity 4-layer (2s2p) circuit board, as described in EIA/JESD 51-7. Table 3. Package Type 16-Lead QSOP θJA 105 θJC 23 Unit °C/W 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 10 20 30 40 50 60 70 80 90 100 07532-016 MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the ADA4420-6 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4420-6. Exceeding a junction temperature of 150°C for an extended time can result in changes in the silicon devices, potentially causing failure. 0 AMBIENT TEMPERATURE (°C) Figure 2. Maximum Power Dissipation vs. Ambient Temperature for a 4-Layer Board ESD CAUTION Rev. 0 | Page 4 of 12 ADA4420-6 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INSD1 INSD2 INSD3 VCC DIS INHD1 INHD2 INHD3 1 2 3 4 5 6 7 8 16 15 14 OUTSD1 OUTSD2 OUTSD3 GND GND OUTHD1 OUTHD2 OUTHD3 07532-002 ADA4420-6 TOP VIEW (Not to Scale) 13 12 11 10 9 Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic INSD1 INSD2 INSD3 VCC DIS INHD1 INHD2 INHD3 OUTHD3 OUTHD2 OUTHD1 GND GND OUTSD3 OUTSD2 OUTSD1 Description Standard Definition Input 1 Standard Definition Input 2 Standard Definition Input 3 Power Supply Disable/Power-Down Input High Definition Input 1 High Definition Input 2 High Definition Input 3 High Definition Output 3 High Definition Output 2 High Definition Output 1 Ground Ground Standard Definition Output 3 Standard Definition Output 2 Standard Definition Output 1 Rev. 0 | Page 5 of 12 ADA4420-6 TYPICAL PERFORMANCE CHARACTERISTICS VS = 5.0 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 17, Figure 18, and Figure 19 for the test circuits. 10 0 –10 –20 HD CHANNELS, RL = 75Ω HD CHANNELS, RL = 150Ω 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 SD CHANNELS, RL = 150Ω HD CHANNELS, RL = 150Ω SD CHANNELS, RL = 75Ω HD CHANNELS, RL = 75Ω SD CHANNELS, RL = 75Ω SD CHANNELS, RL = 150Ω –30 –40 –50 –60 –70 1 10 FREQUENCY (MHz) 100 07532-004 FREQUENCY (MHz) Figure 4. Frequency Response vs. Load (RL) 10 0 –10 –20 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 Figure 7. Flatness vs. Load (RL) –30 –40 –50 –60 –70 –80 1 HD –40°C HD +25°C HD +85°C SD –40°C SD +25°C SD +85°C 10 FREQUENCY (MHz) 100 07532-005 NORMALIZED GAIN (dB) GAIN (dB) HD –40°C HD +25°C HD +85°C SD –40°C SD +25°C SD +85°C 1 10 FREQUENCY (MHz) 100 07532-008 07532-017 Figure 5. Frequency Response vs. Temperature 10 0 –10 –20 Figure 8. Flatness vs. Temperature 10 0 –10 –20 GAIN (dB) HD DC-COUPLED HD AC-COUPLED GAIN (dB) –30 –40 –50 –60 –70 –80 1 SD VO = 100mV p-p SD VO = 2.0V p-p HD VO = 100mV p-p HD VO = 2.0V p-p 07532-006 –30 –40 –50 –60 SD AC-COUPLED –70 –80 1 10 FREQUENCY (MHz) SD DC-COUPLED 100 10 FREQUENCY (MHz) 100 Figure 6. Frequency Response vs. Amplitude Figure 9. Frequency Response vs. Output Coupling Rev. 0 | Page 6 of 12 07532-007 –80 NORMALIZED GAIN (dB) GAIN (dB) 1 10 100 ADA4420-6 100 90 80 GROUP DELAY (ns) 6 5 SD CHANNELS DISABLE VOLTAGE (V) 70 60 50 40 30 20 10 1 10 FREQUENCY (MHz) 100 07532-009 4 3 2 1 0 –1 –600 SD CHANNELS HD CHANNELS HD CHANNELS TIME (ns) Figure 10. Group Delay vs. Frequency 10k 36 35 34 33 32 31 30 29 10 0.1 28 –60 Figure 12. Enable Turn-On Time DIS = 0 OUTPUT IMPEDANCE (Ω) 1k 100 SUPPLY CURRENT (mA) 07532-011 1 10 FREQUENCY (MHz) 100 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 11. Output Impedance vs. Frequency Figure 13. Supply Current vs. Temperature Rev. 0 | Page 7 of 12 07532-013 07532-012 0 0.1 –400 –200 0 200 400 600 800 1000 1200 ADA4420-6 0 –10 –20 CROSSTALK (dB) 4.70 4.68 OUTPUT SATURATION VOLTAGE (V) 4.66 4.64 4.62 4.60 4.58 4.56 4.54 4.52 –30 –40 –50 –60 –70 –80 –90 0.1 HD CHANNELS SD CHANNELS 1 10 FREQUENCY (MHz) 100 1000 07532-014 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 14. Crosstalk vs. Frequency 6 5 4 3 2 1 0 –1 –200 –160 –120 SD CHANNELS Figure 16. Output Saturation Voltage vs. Temperature DISABLE VOLTAGE (V) HD CHANNELS –80 –40 0 40 80 120 160 200 TIME (ns) Figure 15. Disable Turn-Off Time 07532-015 Rev. 0 | Page 8 of 12 07532-010 4.50 –60 ADA4420-6 TEST CIRCUITS AGILENT E3631A POWER SUPPLY +6V + – + ±25V COM – VCC (SEE FIGURE 17) TEST CIRCUIT ADA4420-6 VCC GND DISABLE 0.1µF 10µF VIN VOUT 50Ω VIN 49.9Ω 220µF PORT 1 VOUT PORT 2 ADA4420-6 118Ω 86.6Ω BIAS CONNECT PORT 1 07532-018 DISABLE GND AGILENT 8753D VECTOR NETWORK ANALYZER Figure 17. DC-Coupled Input, AC-Coupled Output VCC Figure 19. Test Circuit for Frequency Response and Group Delay 0.1µF 10µF VIN 49.9Ω 0.1µF ADA4420-6 118 Ω 86.6Ω VOUT DISABLE GND Figure 18. AC-Coupled Input, DC-Coupled Output Rev. 0 | Page 9 of 12 07532-019 07532-020 ADA4420-6 APPLICATIONS INFORMATION OVERVIEW With its high impedance inputs and high output drive, the ADA4420-6 is ideally suited to video reconstruction and antialias filtering applications. The high impedance inputs give designers flexibility with regard to how the input signals are terminated. Devices with DAC current source outputs that feed the ADA4420-6 can be loaded in whatever resistance provides the best performance, and devices with voltage outputs can be optimally terminated as well. The ADA4420-6 outputs can each drive up to two source-terminated, 75 Ω loads and, therefore, can directly drive the outputs from set-top boxes and DVDs without the need for a separate output buffer. ADA4420-6 75Ω 220µF 75Ω CABLE 75Ω 75Ω 220µF 75Ω CABLE 75Ω Figure 20. Driving Two AC-Coupled Loads with Two Coupling Capacitors ADA4420-6 470µF 75Ω 75Ω CABLE 75Ω 75Ω 75Ω CABLE 75Ω DISABLE The ADA4420-6 includes a disable feature that can be used to save power when a particular device is not in use. When disabled, the ADA4420-6 typically draws only 7 μA from the supply. The disable feature is asserted by pulling the DIS pin low. Table 5 summarizes the operation of the disable feature. Table 5. Disable Function DIS Pin Connection VCC or floating GND Status Enabled Disabled Figure 21. Driving Two AC-Coupled Loads with One Common Coupling Capacitor 07532-023 PRINTED CIRCUIT BOARD (PCB) LAYOUT As with all high speed applications, attention to the PCB layout is of paramount importance. When designing with the ADA4420-6, adhere to standard high speed layout practices. A solid ground plane is recommended, and surface-mount, ceramic power supply decoupling capacitors should be placed as close as possible to the supply pins. Connect all of the ADA4420-6 GND pins to the ground plane with traces that are as short as possible. Controlled impedance traces of the shortest length possible should be used to connect to the signal I/O pins and should not pass over any voids in the ground plane. A 75 Ω impedance level is typically used in video applications. When driving transmission lines, include series termination resistors on the signal outputs of the ADA4420-6. When the ADA4420-6 receives its inputs from a device with current outputs, the required load resistor value for the output current is often different from the characteristic impedance of the signal traces. In this case, if the interconnections are short (