ADA4530-1ARZ-R7

Femtoampere Input Bias Current Electrometer Amplifier ADA4530-1 Data Sheet FEATURES PIN CONNECTION DIAGRAM +IN 1 8 –IN GRD 2 7 GRD IC 3 6 OUT V– 4 5 V+ NOTES 1. IC = INTERNAL CONNECTION. THIS PIN MUST BE CONNECTED TO V– OR LEFT UNCONNECTED. 13405-001 ADA4530-1 Low input bias current ±20 fA maximum at TA = 25°C (guaranteed at production test) ±20 fA maximum at −40°C < TA < +85°C ±250 fA maximum at −40°C < TA < +125°C (guaranteed at production test) Low offset voltage: 50 µV maximum over specified CMRR range Offset voltage drift: ±0.13 µV/°C typical, ±0.5 µV/°C maximum Integrated guard buffer with 100 µV maximum offset Low voltage noise density: 14 nV/√Hz at 10 kHz Wide bandwidth: 2 MHz unity-gain crossover Supply voltage: 4.5 V to 16 V (±2.25 V to ±8 V) Operating temperature: −40°C to +125°C Long-term offset voltage drift (10,000 hours): 0.5 µV typical Temperature hysteresis: 1.5 µV typical Figure 1. APPLICATIONS Laboratory and analytical instrumentation: spectrophotometers, chromatographs, mass spectrometers, and potentiostatic and amperostatic coulometry Instrumentation: picoammeters and coulombmeters Transimpedance amplifier (TIA) for photodiodes, ion chambers, and working electrode measurements High impedance buffering for chemical sensors and capacitive sensors GENERAL DESCRIPTION The ADA4530-1 also offers low offset voltage, low offset drift, and low voltage and current noise needed for the types of applications that require such low leakages. Rev. B The ADA4530-1 operates over the −40°C to +125°C industrial temperature range and is available in an 8-lead SOIC package. 1000 –40°C TO +125°C LIMIT VSY = 10V VCM = VSY/2 RH < 10% 100 –40°C TO +85°C LIMIT 10 1 0.1 IB+ IB– 0.01 0.001 0 10 20 30 40 50 60 70 80 90 100 110 120 130 TEMPERATURE (°C) 13405-202 It provides ultralow input bias currents that are production tested at 25°C and at 125°C to ensure the device meets its performance goals in user systems. The integrated guard buffer isolates the input pins from leakage in the printed circuit board (PCB), minimizes board component count, and enables easy system design. The ADA4530-1 is available in an industrystandard surface-mount 8-lead SOIC package with a unique pinout optimized to prevent signals from coupling between the sensitive input pins, the power supplies, and the output pin while enabling easy routing of the guard ring traces. To maximize the dynamic range of the system, the ADA4530-1 has a rail-to-rail output stage that can typically drive to within 30 mV of the supply rails under a 10 kΩ load. IB (fA) The ADA4530-1 is a femtoampere (10−15 A) level input bias current operational amplifier suitable for use as an electrometer that also includes an integrated guard buffer. It has an operating voltage range of 4.5 V to 16 V, enabling it to operate in conventional 5 V and 10 V single supply systems as well as ±2.5 V and ±5 V dual supply systems. Figure 2. Input Bias Current (IB) vs. Temperature, VSY = 10 V Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4530-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Input Resistance.......................................................................... 34 Applications ....................................................................................... 1 Input Offset Voltage ................................................................... 34 Pin Connection Diagram ................................................................ 1 Insulation Resistance ................................................................. 34 General Description ......................................................................... 1 Guarding ...................................................................................... 35 Revision History ............................................................................... 3 Dielectric Relaxation .................................................................. 35 Specifications..................................................................................... 4 Humidity Effects......................................................................... 37 5 V Nominal Electrical Characteristics ..................................... 4 Contamination ............................................................................ 38 10 V Nominal Electrical Characteristics ................................... 6 Cleaning and Handling ............................................................. 39 15 V Nominal Electrical Characteristics ................................... 8 Solder Paste Selection ................................................................ 39 Absolute Maximum Ratings .......................................................... 10 Current Noise Considerations ...................................................... 40 Thermal Resistance .................................................................... 10 Layout Guidelines ........................................................................... 43 ESD Caution ................................................................................ 10 Physical Implementation of Guarding Techniques................ 43 Pin Configuration and Function Descriptions ........................... 11 Guard Ring .................................................................................. 43 Typical Performance Characteristics ........................................... 12 Guard Plane ................................................................................. 43 Main Amplifier, DC Performance ............................................ 12 Via Fence ..................................................................................... 44 Main Amplifier, AC Performance ............................................ 21 Cables and Connectors .............................................................. 44 Guard Amplifier ......................................................................... 27 Electrostatic Interferance .......................................................... 44 Theory of Operation ...................................................................... 29 Photodiode Interface ...................................................................... 45 ESD Structure.............................................................................. 29 DC Error Analysis ...................................................................... 45 Input Stage ................................................................................... 29 AC Error Analysis ...................................................................... 45 Gain Stage .................................................................................... 30 Noise Analysis............................................................................. 46 Output Stage ................................................................................ 30 Design Recommendations ........................................................ 47 Guard Buffer ............................................................................... 30 Design Example .......................................................................... 47 Applications Information .............................................................. 31 Power Supply Recommendations ................................................. 50 Input Protection .......................................................................... 31 Power Supply Considerations ................................................... 50 Single-Supply and Rail-to-Rail Output ................................... 31 Long-Term Drift ......................................................................... 51 Capacitive Load Stability ........................................................... 31 Temperature Hysteresis ............................................................. 51 EMI Rejection Ratio ................................................................... 32 Outline Dimensions ....................................................................... 52 High Impedance Measurements ................................................... 33 Ordering Guide .......................................................................... 52 Input Bias Current ...................................................................... 33 Rev. B | Page 2 of 52 Data Sheet ADA4530-1 REVISION HISTORY 5/2017—Rev. A to Rev. B Changes to Features Section and General Description Section ....... 1 Changed Offset Voltage Parameter to Input Offset Voltage Parameter, Table 1 ............................................................................. 4 Changed Offset Voltage Parameter to Input Offset Voltage Parameter, Table 2 ............................................................................. 6 Changed Offset Voltage Parameter to Input Offset Voltage Parameter, Table 3 ............................................................................. 8 Changes to EMI Rejection Ratio Section and Figure 102 ..........32 Moved Figure 114 ............................................................................38 Changes to Current Noise Considerations Section ....................41 Added Long-Term Drift Section, Temperature Hysteresis Section, Figure 136, Figure 137, and Figure 138; Renumbered Sequentially ......................................................................................51 Changes to Ordering Guide ...........................................................52 3/2016—Rev. 0 to Rev. A Changed DNC Pin to IC Pin ........................................Throughout Changes to Figure 1 .......................................................................... 1 Changes to Figure 3 and Table 6 ................................................... 10 Changes to Figure 29 ...................................................................... 15 Changes to Theory of Operation Section .................................... 28 Changes to Humidity Effects Section and Figure 112................ 36 Added Power Supply Recommendations Section, Power Supply Considerations Section, Table 16, and Figure 133 to Figure 135 ......................................................................................... 49 10/2015—Revision 0: Initial Version Rev. B | Page 3 of 52 ADA4530-1 Data Sheet SPECIFICATIONS 5 V NOMINAL ELECTRICAL CHARACTERISTICS Supply voltage (VSY) = 4.5 V, common-mode voltage (VCM) = VSY/2, TA = 25°C, unless otherwise specified. Typical specifications are equal to the average of the distribution from characterization, unless otherwise noted. Minimum and maximum specifications are tested in production, unless otherwise noted. Table 1. Parameter 1 INPUT CHARACTERISTICS Input Bias Current 2, 3 Symbol Test Conditions/Comments IB RH < 50% −40°C < TA < +85°C, RH < 50% −40°C < TA < +125°C, RH < 50% RH < 50% −40°C < TA < +125°C, RH < 50% Input Offset Current3 IOS Input Offset Voltage2, 4 VOS Offset Voltage Drift2, 4 ΔVOS/ΔT Input Voltage Range Common-Mode Rejection Ratio IVR CMRR Large Signal Voltage Gain AVO Input Resistance Input Capacitance OUTPUT CHARACTERISTICS Output Voltage High RIN CIN Output Voltage Low Short-Circuit Current Source Sink Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current VOH VOL Min RL = 10 kΩ to VCM −40°C < TA < +125°C RL = 2 kΩ to VCM −40°C < TA < +125°C RL = 10 kΩ to VCM −40°C < TA < +125°C RL = 2 kΩ to VCM −40°C < TA < +125°C Max Unit