Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
30 V, 8 MHz, Low Bias Current, Single Supply, RRO, Precision Op Amp
FEATURES
►
►
►
►
►
►
►
►
►
►
PIN CONFIGURATION
Next generation of the AD820/AD822/AD824
Wide gain bandwidth product: 8 MHz typical
High slew rate
► 23 V/µs typical (low to high)
► −18 V/µs typical (high to low)
Low input bias current: ±10 pA maximum at TA = 25°C
Low offset voltage
► A grade: ±0.8 mV maximum at TA = 25°C
► B grade: ±0.35 mV maximum at TA = 25°C
Low offset voltage drift
► A grade: ±4 µV/°C maximum
► B grade: ±2 µV/°C maximum (ADA4622-2 only)
► B grade: ±1 µV/°C maximum (ADA4622-1 only)
Input voltage range includes Pin V−
Rail-to-rail output
Electromagnetic interference rejection ratio (EMIRR)
► 90 dB typical at f = 1000 MHz and f = 2400 MHz
Industry-standard package and pinouts
APPLICATIONS
►
►
►
►
►
High output impedance sensor interfaces
Photodiode sensor interfaces
Transimpedance amplifiers
ADC drivers
Precision filters and signal conditioning
Figure 1. 8-Lead Mini Small Outline Package [MSOP] Pin Configuration (See
the Pin Configurations and Function Descriptions Section for Additional Pin
Configurations)
GENERAL DESCRIPTION
The ADA4622-1/ADA4622-2/ADA4622-4 are the next generation
of the AD820/AD822/AD824 single-supply, rail-to-rail output (RRO),
precision junction field effect transistors (JFET) input op amps. The
ADA4622-1/ADA4622-2/ADA4622-4 include many improvements
that make them desirable as upgrades without compromising the
flexibility and ease of use that makes the AD820/AD822/AD824
useful for a wide variety of applications.
The input voltage range includes the negative supply and the output
swings rail-to-rail. Input EMI filters increase the signal robustness in
the face of closely located switching noise sources.
The speed, in terms of bandwidth and slew rate, increases along
with a strong output drive to improve settling time performance and
enables the devices to drive the inputs of modern single-ended,
successive approximation register (SAR) analog-to-digital converters (ADCs).
Voltage noise is reduced; although the supply current remains the
same as the AD820/AD822/AD824, broadband noise is reduced
by 25%, and 1/f is reduced by half. DC precision in the ADA4622-1/
ADA4622-2/ADA4622-4 improved from the AD820/AD822/AD824
with half the offset and a maximum thermal drift specification added
to the ADA4622-1/ADA4622-2/ ADA4622-4. The common-mode rejection ratio (CMRR) is improved from the AD820/AD822/AD824 to
make the ADA4622-1/ADA4622-2/ADA4622-4 more suitable when
used in noninverting gain and difference amplifier configurations.
The ADA4622-1/ADA4622-2/ADA4622-4 are specified for operation
over the extended industrial temperature range of −40°C to +125°C,
and operate from 5 V to 30 V, with specifications at +5 V, ±5 V, and
±15 V. The ADA4622-1 is available in a 5-lead SOT-23 package
and an 8-lead LFCSP package. The ADA4622-2 is available in an
8-lead SOIC_N package, an 8-lead MSOP package, and an 8-lead
LFCSP package. The ADA4622-4 is available in a 14-lead SOIC_N
and a 16-lead, 4 × 4 mm LFCSP.
Rev. F
DOCUMENT FEEDBACK
TECHNICAL SUPPORT
Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to
change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TABLE OF CONTENTS
Features................................................................ 1
Applications........................................................... 1
Pin Configuration................................................... 1
General Description...............................................1
Specifications........................................................ 3
Electrical Characteristics, VSY = ±15 V.............. 3
Electrical Characteristics, VSY = ±5 V ............... 5
Electrical Characteristics, VSY = 5 V ................. 7
Absolute Maximum Ratings.................................10
Thermal Resistance......................................... 10
ESD Caution.....................................................10
Pin Configurations and Function Descriptions.....11
Typical Performance Characteristics................... 14
Theory Of Operation............................................26
Input Characteristics.........................................26
Output Characteristics......................................27
Shutdown Operation.........................................28
Applications Information...................................... 29
Recommended Power Solution........................29
Maximum Power Dissipation............................ 29
Second-Order Low-Pass Filter......................... 29
Wideband Photodiode Preamplifier..................29
Peak Detector...................................................32
Multiplexing Inputs............................................32
Full Wave Rectifier........................................... 32
Outline Dimensions............................................. 34
Ordering Guide.................................................36
REVISION HISTORY
9/2022—Rev. E to Rev. F
Changes to Features Section.......................................................................................................................... 1
Changes to Offset Voltage Drift, B Grade Parameter, Table 1.........................................................................3
Changes to Offset Voltage Drift, B Grade Parameter, Table 2.........................................................................5
Changes to Offset Voltage Drift, B Grade Parameter, Table 3.........................................................................7
Changes to Figure 12 to Figure 14................................................................................................................ 14
analog.com
Rev. F | 2 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS, VSY = ±15 V
Supply voltage (VSY) = ±15 V, common-mode voltage (VCM) = output voltage (VOUT) = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Test Conditions/Comments
Min
A Grade
Typ
Max
Unit
+0.04
±0.8
mV
±2
mV
±0.35
mV
−40°C < TA < +125°C
B Grade
+0.04
ADA4622-1
−40°C < TA < +125°C
±1
mV
ADA4622-2
−40°C < TA < +125°C
±0.8
mV
±1
mV
−40°C < TA < +125°C
±4
µV/°C
−40°C < TA < +125°C
−40°C < TA < +125°C
±1
±2
±10
µV/°C
µV/°C
pA
±1.5
nA
Offset Voltage Match
Offset Voltage Drift
ΔVOS/ΔT
A Grade
B Grade
ADA4622-1
ADA4622-2
Input Bias Current
IB
+2
−40°C < TA < +125°C
VCM = −15 V
Input Offset Current
IOS
Input Voltage Range
IVR
Common-Mode Rejection Ratio
CMRR
−15
−40°C < TA < +125°C
−15.2
A Grade
VCM = −15 V to +12 V
84
−40°C < TA < +125°C
81
B Grade
VCM = −15 V to +12 V
87
Open-Loop Voltage Gain
Input Capacitance
Input Resistance
OUTPUT CHARACTERISTICS
Output Voltage
High
Low
AVO
CINDM
−40°C < TA < +125°C
85
RL = 10 kΩ, VOUT = −14.5 V to +14.5 V
117
−40°C < TA < +125°C
109
RL = 1 kΩ, VOUT = −14 V to +14 V
102
−40°C < TA < +125°C
93
Differential mode
pA
±0.5
nA
+14
V
100
dB
dB
100
dB
dB
122
dB
dB
110
dB
dB
0.4
pF
CINCM
Common mode
3.6
pF
RDIFF
Differential mode
1013
Ω
RCM
Common mode
1013
Ω
VOH
ISOURCE = 1 mA
14.95
−40°C < TA < +125°C
14.9
VOL
ISOURCE = 15 mA
14.3
−40°C < TA < +125°C
14.1
ISINK = 1 mA
14.97
ISINK = 15 mA
V
V
14.5
V
V
−14.955
−40°C < TA < +125°C
analog.com
pA
±10
−14.685
−14.935
V
−14.88
V
−14.55
V
Rev. F | 3 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
−40°C < TA < +125°C
Max
Unit
−14.25
V
Output Current
IOUT
VDROPOUT < 1 V
20
mA
Short-Circuit Current
ISC
Sourcing
42
mA
Sinking
−51
mA
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
ZOUT
PSRR
f = 1 kHz, gain (AV) = 1
0.1
Ω
AV = 10
0.4
Ω
AV = 100
3
Ω
VSY = ±4 V to ±18 V
87
−40°C < TA < +125°C
81
103
ISY
ADA4622-1/ADA4622-4
715
−40°C < TA < +125°C
ADA4622-2
665
−40°C < TA < +125°C
Shutdown Current
DYNAMIC PERFORMANCE
Slew Rate
dB
dB
ADA4622-1 only
SR
750
µA
775
µA
700
µA
725
µA
60
µA
Low to high transition
23
V/µs
High to low transition
−18
V/µs
VOUT = ±12.5 V, RL = 2 kΩ, load capacitor (CL) =
100 pF, AV = 1
Gain Bandwidth Product
GBP
AV = 100, CL = 35 pF
8
MHz
Unity-Gain Crossover
UGC
AV = 1
7
MHz
−3 dB Bandwidth
−3 dB
AV = 1
15.5
MHz
Phase Margin
ФM
53
Degrees
Settling Time
tS
1.5
µs
2
µs
f = 1000 MHz
90
dB
f = 2400 MHz
90
dB
Input voltage (VIN) = 10 V step, RL = 2 kΩ, CL =
15 pF, AV = −1
To 0.1%
To 0.01%
EMI REJECTION RATIO
NOISE PERFORMANCE
Voltage Noise
EMIRR
VIN = 100 mV p-p
eN p-p
0.1 Hz to 10 Hz
0.75
µV p-p
eN
f = 10 Hz
30
nV/√Hz
f = 100 Hz
15
nV/√Hz
f = 1 kHz
12.5
nV/√Hz
f = 10 kHz
12
nV/√Hz
0.8
fA/√Hz
Bandwidth (BW) = 80 kHz
0.0003
%
BW = 500 kHz
0.00035
%
0.5
mV
Voltage Noise Density
Current Noise Density
iN
f = 1 kHz
Total Harmonic Distortion + Noise
THD + N
AV = 1, f = 10 Hz to 20 kHz, VIN = 7 V rms at
1 kHz
MATCHING SPECIFICATIONS
Maximum Offset Voltage over Temperature
analog.com
Rev. F | 4 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Offset Voltage Temperature Drift
0.25
Input Bias Current
0.5
CROSSTALK
CS
ADA4622-1/ADA4622-2
ADA4622-4
Max
Unit
µV/°C
5
pA
RL = 5 kΩ, VIN = 20 V p-p
f = 1 kHz
−112
dB
f = 100 kHz
−72
dB
f = 1 kHz
−106
dB
f = 100 kHz
−66
dB
ELECTRICAL CHARACTERISTICS, VSY = ±5 V
VSY = ±5 V, VCM = VOUT = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Test Conditions/Comments
Min
A Grade
Typ
Max
Unit
+0.04
±0.8
mV
±2
mV
−40°C < TA < +125°C
B Grade
+0.04
ADA4622-1
−40°C < TA < +125°C
ADA4622-2
−40°C < TA < +125°C
±0.8
mV
mV
−40°C < TA < +125°C
±4
µV/°C
−40°C < TA < +125°C
−40°C < TA < +125°C
±1
±2
±10
µV/°C
µV/°C
pA
ΔVOS/ΔT
A Grade
B Grade
ADA4622-1
ADA4622-2
Input Bias Current
IB
+2
−40°C < TA < +125°C
±1.5
VCM = V−
Input Offset Current
−5
IOS
−40°C < TA < +125°C
Input Voltage Range
IVR
Common-Mode Rejection Ratio
CMRR
A Grade
B Grade
Open-Loop Voltage Gain
Input Capacitance
Input Resistance
analog.com
mV
mV
±1
Offset Voltage Match
Offset Voltage Drift
±0.35
±1
AVO
−5.2
VCM = − 5 V to +2 V
75
−40°C < TA < +125°C
73
VCM = − 5 V to +2 V
78
−40°C < TA < +125°C
75
RL = 10 kΩ, VOUT = −4.4 V to +4.4 V
113
−40°C < TA < +125°C
105
RL = 1 kΩ, VOUT = −4.4 V to +4.4 V
100
−40°C < TA < +125°C
91
91
nA
pA
±10
pA
±0.5
nA
+4
V
dB
dB
91
dB
dB
118
dB
dB
105
dB
dB
CINDM
Differential mode
0.4
pF
CINCM
Common mode
3.6
pF
RDIFF
Differential mode
1013
Ω
RCM
Common mode
1013
Ω
Rev. F | 5 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 2.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
OUTPUT CHARACTERISTICS
Output Voltage
High
VOH
ISOURCE = 1 mA
4.95
4.97
−40°C < TA < +125°C
4.9
ISOURCE = 15 mA
4.3
−40°C < TA < +125°C
4.1
Low
VOL
ISINK = 1 mA
Unit
V
V
4.51
V
V
−4.955
−4.935
−4.88
V
−4.685
−4.55
V
−4.25
V
−40°C < TA < +125°C
ISINK = 15 mA
Max
−40°C < TA < +125°C
V
Output Current
IOUT
VDROPOUT < 1 V
20
mA
Short-Circuit Current
ISC
Sourcing
31
mA
Sinking
−40
mA
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
ZOUT
PSRR
f = 1 kHz, AV = 1
0.1
Ω
AV = 10
0.4
Ω
AV = 100
4
Ω
103
dB
VSY = ±4 V to ±18 V
87
−40°C < TA < +125°C
81
dB
ISY
ADA4622-1/ADA4622-4
660
−40°C < TA < +125°C
ADA4622-2
610
−40°C < TA < +125°C
Shutdown Current
DYNAMIC PERFORMANCE
Slew Rate
ADA4622-1 only
SR
725
µA
750
µA
675
µA
700
µA
50
µA
21
V/µs
VOUT = ±3 V, RL = 2 kΩ, CL = 100 pF, AV = 1
Low to high transition
High to low transition
−16
V/µs
Gain Bandwidth Product
GBP
AV = 100, CL = 35 pF
7.8
MHz
Unity-Gain Crossover
UGC
AV = 1
6.5
MHz
−3 dB Bandwidth
−3 dB
AV = 1
10
MHz
Phase Margin
ФM
50
Degrees
Settling Time
tS
To 0.1%
1.5
µs
To 0.01%
2
µs
f = 1000 MHz
90
dB
f = 2400 MHz
90
dB
EMI REJECTION RATIO
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
analog.com
EMIRR
VIN = 8 V step, RL = 2 kΩ, CL = 15 pF, AV = −1
VIN = 100 mV p-p
eN p-p
0.1 Hz to 10 Hz
0.75
µV p-p
eN
f = 10 Hz
30
nV/√Hz
f = 100 Hz
15
nV/√Hz
f = 1 kHz
12.5
nV/√Hz
f = 10 kHz
12
nV/√Hz
Rev. F | 6 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 2.
Parameter
Symbol
Test Conditions/Comments
Current Noise Density
iN
f = 1 kHz
Total Harmonic Distortion + Noise
THD + N
AV = 1, f = 10 Hz to 20 kHz, VIN = 1.5 V rms at 1
kHz
Min
Typ
Max
Unit
0.8
fA/√Hz
BW = 80 kHz
0.0005
%
BW = 500 kHz
0.0008
%
0.5
mV
MATCHING SPECIFICATIONS
Maximum Offset Voltage over Temperature
Offset Voltage Temperature Drift
0.25
Input Bias Current
0.5
CROSSTALK
CS
ADA4622-1/ADA4622-2
ADA4622-4
µV/°C
5
pA
RL = 5 kΩ, VIN = 6 V p-p
f = 1 kHz
−112
dB
f = 100 kHz
−72
dB
f = 1 kHz
−106
dB
f = 100 kHz
−66
dB
ELECTRICAL CHARACTERISTICS, VSY = 5 V
VSY = 5 V, VCM = 0 V, VOUT = VSY/2, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Test Conditions/Comments
Min
A Grade
Typ
Max
Unit
+0.04
±0.8
mV
±2
mV
−40°C < TA < +125°C
B Grade
±0.35
mV
ADA4622-1
−40°C < TA < +125°C
+0.04
±1
mV
ADA4622-2
−40°C < TA < +125°C
±0.8
mV
±1
mV
−40°C < TA < +125°C
±4
µV/°C
−40°C < TA < +125°C
−40°C < TA < +125°C
±1
±2
±10
µV/°C
µV/°C
pA
Offset Voltage Match
Offset Voltage Drift
ΔVOS/ΔT
A Grade
B Grade
ADA4622-1
ADA4622-2
Input Bias Current
IB
Input Offset Current
IOS
Input Voltage Range
IVR
Common-Mode Rejection Ratio
CMRR
2
−40°C < TA < +125°C
−40°C < TA < +125°C
A Grade
VCM = 0 V to 2 V
B Grade
Open-Loop Voltage Gain
analog.com
−0.2
AVO
70
−40°C < TA < +125°C
67
VCM = 0 V to 2 V
73
−40°C < TA < +125°C
70
RL = 10 kΩ to V−, VOUT = 0.2 V to 4.6 V
110
−40°C < TA < +125°C
99
±1.5
nA
±10
pA
±0.5
nA
+4
V
87
dB
87
dB
115
dB
dB
dB
dB
Rev. F | 7 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 3.
Parameter
Input Capacitance
Input Resistance
OUTPUT CHARACTERISTICS
Output Voltage
High
Low
Symbol
Test Conditions/Comments
Min
Typ
RL = 1 kΩ to V−, VOUT = 0.2 V to 4.6 V
96
104
−40°C < TA < +125°C
87
Max
Unit
dB
dB
CINDM
Differential mode
0.4
pF
CINCM
Common mode
3.6
pF
RDIFF
Differential mode
1013
Ω
RCM
Common mode
1013
Ω
VOH
ISOURCE = 1 mA
4.95
4.97
V
VOL
−40°C < TA < +125°C
4.9
ISOURCE = 15 mA
4.3
−40°C < TA < +125°C
4.1
ISINK = 1 mA
V
4.5
V
45
65
120
mV
310
450
mV
750
mV
−40°C < TA < +125°C
ISINK = 15 mA
V
−40°C < TA < +125°C
mV
Output Current
IOUT
VDROPOUT < 1 V
20
mA
Short-Circuit Current
ISC
Sourcing
27
mA
Sinking
−35
mA
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
ZOUT
PSRR
f = 1 kHz, AV = 1
0.1
Ω
AV = 10
0.6
Ω
AV = 100
5
Ω
95
dB
VSY = 4 V to 15 V
80
−40°C < TA < +125°C
74
dB
ISY
ADA4622-1/ADA4622-4
650
−40°C < TA < +125°C
ADA4622-2
600
−40°C < TA < +125°C
Shutdown Current
DYNAMIC PERFORMANCE
Slew Rate
ADA4622-1 only
SR
700
µA
725
µA
650
µA
675
µA
50
µA
Low to high transition
20
V/µs
High to low transition
−15
V/µs
VOUT = 0.5 V to 3.5 V, RL = 2 kΩ, CL = 100 pF,
AV = 1
Gain Bandwidth Product
GBP
AV = 100, CL = 35 pF
7.2
MHz
Unity-Gain Crossover
UGC
AV = 1
6
MHz
−3 dB Bandwidth
−3 dB
AV = 1
9
MHz
Phase Margin
ФM
50
Degrees
Settling Time
tS
1.5
µs
2.0
µs
90
dB
VIN = 4 V step, RL = 2 kΩ, CL = 15 pF, AV = −1
To 0.1%
To 0.01%
EMI REJECTION RATIO
f = 1000 MHz
analog.com
EMIRR
VIN = 100 mV p-p
Rev. F | 8 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
SPECIFICATIONS
Table 3.
Parameter
Symbol
Test Conditions/Comments
f = 2400 MHz
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Min
Typ
Max
90
Unit
dB
eN p-p
0.1 Hz to 10 Hz
0.75
µV p-p
eN
f = 10 Hz
30
nV/√Hz
f = 100 Hz
15
nV/√Hz
f = 1 kHz
12.5
nV/√Hz
f = 10 kHz
12
nV/√Hz
Current Noise Density
iN
f = 1 kHz
0.8
fA/√Hz
Total Harmonic Distortion + Noise
THD + N
AV = 1, f = 10 Hz to 20 kHz, VIN = 0.5 V rms at
1 kHz
BW = 80 kHz
0.0025
%
BW = 500 kHz
0.0025
%
0.5
mV
0.25
µV/°C
MATCHING SPECIFICATIONS
Maximum Offset Voltage over Temperature
Offset Voltage Temperature Drift
Input Bias Current
CROSSTALK
ADA4622-1/ADA4622-2
ADA4622-4
analog.com
0.5
CS
5
pA
RL = 5 kΩ, VIN = 3 V p-p
f = 1 kHz
−112
dB
f = 100 kHz
−72
dB
f = 1 kHz
−106
dB
f = 100 kHz
−66
dB
Rev. F | 9 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 4.
Parameter
Rating
Supply Voltage
Input Voltage
36 V
(V−) −0.3 V to (V+) +0.2 V
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Close attention to PCB
thermal design is required.
Differential Input Voltage
36 V
Storage Temperature Range
−65°C to +150°C
Table 5. Thermal Resistance
Operating Temperature Range
−40°C to +125°C
Junction Temperature Range
−65°C to +150°C
Lead Temperature, Soldering (10 sec)
300°C
ESD Rating, Human Body Model (HBM)
4 kV
Stresses at or above those listed under Absolute Maximum Ratings
may cause permanent damage to the product. This is a stress
rating only; functional operation of the product at these or any other
conditions above those indicated in the operational section of this
specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
Package Type1, 2
θJA
θJC3
Unit
1-Layer JEDEC Board
N/A
63
°C/W
2-Layer JEDEC Board
120
N/A
°C/W
1-Layer JEDEC Board
N/A
115
°C/W
2-Layer JEDEC Board
185
N/A
°C/W
1-Layer JEDEC Board
N/A
63
°C/W
2-Layer JEDEC Board
145
N/A
°C/W
2-Layer JEDEC Board with 2 × 2 Vias
55
N/A
°C/W
1-Layer JEDEC Board
N/A
82
°C/W
2-Layer JEDEC Board
339
N/A
°C/W
1-Layer JEDEC Board
N/A
42
°C/W
2-Layer JEDEC Board
72
N/A
°C/W
1-Layer JEDEC Board
N/A
2.2
°C/W
2-Layer JEDEC Board
48
N/A
°C/W
8-Lead SOIC_N
8-Lead MSOP
8-Lead LFCSP
5-Lead SOT-23
14-Lead SOIC_N
16-Lead, 4 × 4 mm LFCSP
1
Thermal impedance simulated values are based on a JEDEC thermal test
board. See JEDEC JESD51.
2
N/A means not applicable.
3
For θJC test, 100 μm thermal interface material (TIM) is used. TIM is assumed
to have 3.6 W/mK.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although
this product features patented or proprietary protection circuitry,
damage may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to avoid
performance degradation or loss of functionality.
analog.com
Rev. F | 10 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. 5-Lead SOT-23 Pin Configuration, ADA4622-1
Table 6. 5-Lead SOT-23 Pin Function Descriptions, ADA4622-1
Pin No.
Mnemonic
Description
1
OUT
Output.
2
V−
Negative Supply Voltage.
3
+IN
Noninverting Input.
4
−IN
Inverting Input.
5
V+
Positive Supply Voltage.
Figure 3. 8-Lead SOIC_N Pin Configuration, ADA4622-1
Table 7. 8-Lead SOIC_N Pin Function Descriptions, ADA4622-1
Pin No.
Mnemonic
Description
1, 5
NIC
Not Internally Connected.
2
−IN
Inverting Input.
3
+IN
Noninverting Input.
4
V−
Negative Supply Voltage.
6
OUT
Output.
7
V+
Positive Supply Voltage.
8
DISABLE
Disable Input (Active Low).
analog.com
Rev. F | 11 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 5. 8-Lead SOIC_N Pin Configuration, ADA4622-2
Figure 4. 8-Lead MSOP Pin Configuration, ADA4622-2
Table 8. 8-Lead MSOP and 8-Lead SOIC_N Pin Function Descriptions, ADA4622-2
Pin No.
Mnemonic
Description
1
OUT A
Output, Channel A.
2
−IN A
Inverting Input, Channel A.
3
+IN A
Noninverting Input, Channel A.
4
V−
Negative Supply Voltage.
5
+IN B
Noninverting Input, Channel B.
6
−IN B
Inverting Input, Channel B.
7
OUT B
Output, Channel B.
8
V+
Positive Supply Voltage.
Figure 6. 8-Lead LFCSP Pin Configuration, ADA4622-2
Table 9. 8-Lead LFCSP Pin Function Descriptions, ADA4622-2
Pin No.
Mnemonic
Description
1
OUT A
Output, Channel A.
2
−IN A
Inverting Input, Channel A.
3
+IN A
Noninverting Input, Channel A.
4
V−
Negative Supply Voltage.
5
+IN B
Noninverting Input, Channel B.
6
−IN B
Inverting Input, Channel B.
7
OUT B
Output, Channel B.
8
V+
Positive Supply Voltage.
EPAD
Exposed Pad. It is recommended to connect the exposed pad to the V+ pin.
Figure 7. 16-Lead LFCSP Pin Configuration, ADA4622-4
analog.com
Rev. F | 12 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 10. 16-Lead LFCSP Pin Function Descriptions, ADA4622-4
Pin No.
Mnemonic
Description
1
−IN A
Inverting Input, Channel A.
2
+IN A
Noninverting Input, Channel A.
3
V+
Positive Supply Voltage.
4
+IN B
Noninverting Input, Channel B.
5
−IN B
Inverting Input, Channel B.
6
OUT B
Output, Channel B.
7
OUT C
Output, Channel C.
8
−IN C
Inverting Input, Channel C.
9
+IN C
Noninverting Input, Channel C.
10
V−
Negative Supply Voltage.
11
+IN D
Noninverting Input, Channel D.
12
−IN D
Inverting Input, Channel D.
13, 16
NIC
Not Internally Connected.
14
OUT D
Output, Channel D.
15
OUT A
Output, Channel A.
EPAD
Exposed Pad. The exposed pad must be connected to the V+ pin.
Figure 8. 14-Lead SOIC_N Pin Configuration, ADA4622-4
Table 11. 14-Lead SOIC_N Pin Function Descriptions, ADA4622-4
Pin No.
Mnemonic
Description
1
OUT A
Output, Channel A.
2
−IN A
Inverting Input, Channel A.
3
+IN A
Noninverting Input, Channel A.
4
V+
Positive Supply Voltage.
5
+IN B
Noninverting Input, Channel B.
6
−IN B
Inverting Input, Channel B.
7
OUT B
Output, Channel B.
8
OUT C
Output, Channel C.
9
−IN C
Inverting Input, Channel C.
10
+IN C
Noninverting Input, Channel C.
11
V−
Negative Supply Voltage.
12
+IN D
Noninverting Input, Channel D.
13
−IN D
Inverting Input, Channel D.
14
OUT D
Output, Channel D.
analog.com
Rev. F | 13 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Figure 9. Input Offset Voltage (VOS) Distribution, VSY = ±15 V
Figure 10. Input Offset Voltage (VOS) Distribution, VSY = ±5 V
Figure 12. Input Offset Voltage Drift (TCVOS) Distribution (−40°C to +125°C),
VSY = ±15 V
Figure 13. Input Offset Voltage Drift (TCVOS) Distribution (−40°C to +125°C),
VSY = ±5 V
Figure 11. Input Offset Voltage (VOS) Distribution, VSY = 5 V
Figure 14. Input Offset Voltage Drift (TCVOS) Distribution (−40°C to +125°C),
VSY = 5 V
analog.com
Rev. F | 14 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 15. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY =
±15 V
Figure 16. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY =
±5 V
Figure 18. Input Bias Current (IB) Distribution, VSY = ±15 V
Figure 19. Input Bias Current (IB) Distribution, VSY = ±5 V
Figure 20. Input Bias Current (IB) Distribution, VSY = 5 V
Figure 17. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY =
5V
analog.com
Rev. F | 15 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 21. Input Bias Current (IB) vs. Input Common-Mode Voltage (VCM), VSY
= ±15 V
Figure 24. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = ±15 V
Figure 22. Input Bias Current (IB) vs. Input Common-Mode Voltage (VCM), VSY
= ±5 V
Figure 25. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = ±5 V
Figure 23. Input Bias Current (IB) vs. Input Common-Mode Voltage (VCM), VSY
=5V
analog.com
Figure 26. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = 5 V
Rev. F | 16 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 27. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = ±15 V
Figure 28. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = ±5 V
Figure 30. Open-Loop Voltage Gain (AVO) vs. Load Resistance
Figure 31. Open-Loop Voltage Gain (AVO) and Phase vs. Frequency, VSY =
±15 V
Figure 32. Open-Loop Voltage Gain (AVO) and Phase vs. Frequency, VSY = ±5
V
Figure 29. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD)
over Temperature, VSY = 5 V
analog.com
Rev. F | 17 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 33. Open-Loop Voltage Gain (AVO) and Phase vs. Frequency, VSY = 5 V
Figure 36. Closed-Loop Gain (AV) vs. Frequency, VSY = 5 V
Figure 34. Closed-Loop Gain (AV) vs. Frequency, VSY = ±15 V
Figure 37. Output Impedance vs. Frequency, VSY = ±15 V
Figure 35. Closed-Loop Gain (AV) vs. Frequency, VSY = ±5 V
Figure 38. Output Impedance vs. Frequency, VSY = ±5 V
analog.com
Rev. F | 18 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 39. Output Impedance vs. Frequency, VSY = 5 V
Figure 42. CMRR vs. Frequency, VSY = 5 V
Figure 40. CMRR vs. Frequency, VSY = ±15 V
Figure 43. PSRR vs. Frequency, VSY = ±15 V
Figure 41. CMRR vs. Frequency, VSY = ±5 V
Figure 44. PSRR vs. Frequency, VSY = ±5 V
analog.com
Rev. F | 19 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 45. PSRR vs. Frequency, VSY = 5 V
Figure 48. Small Signal Overshoot (OS) vs. Load Capacitance, VSY = 5 V
Figure 46. Small Signal Overshoot (OS) vs. Load Capacitance, VSY = ±15 V
Figure 49. Large Signal Transient Response, VSY = ±15 V
Figure 47. Small Signal Overshoot (OS) vs. Load Capacitance, VSY = ±5 V
Figure 50. Large Signal Transient Response, VSY = ±5 V
analog.com
Rev. F | 20 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 51. Large Signal Transient Response, VSY = 5 V
Figure 54. Small Signal Transient Response, VSY = ±5 V
Figure 52. Large Signal Transient Response, VSY = ±2.5 V
Figure 55. Small Signal Transient Response, VSY = 5 V
Figure 53. Small Signal Transient Response, VSY = ±15 V
analog.com
Figure 56. Negative Overload Recovery, AV = −10, VSY = ±15 V
Rev. F | 21 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 57. Negative Overload Recovery, AV = −10, VSY = ±5 V
Figure 60. Positive Overload Recovery, AV = −10, VSY = ±5 V
Figure 58. Negative Overload Recovery, AV = −10, VSY = ±2.5 V
Figure 61. Positive Overload Recovery, AV = −10, VSY = ±2.5 V
Figure 59. Positive Overload Recovery, AV = −10, VSY = ±15 V
analog.com
Figure 62. Positive Settling Time, AV = −10, VSY = ±15 V
Rev. F | 22 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 63. Positive Settling Time, AV = −10, VSY = ±5 V
Figure 66. Negative Setting Time, AV = −10, VSY = ±5 V
Figure 64. Positive Settling Time, AV = −10, VSY = 5 V
Figure 67. Negative Setting Time, AV = −10, VSY = 5 V
Figure 65. Negative Setting Time, AV = −10, VSY = ±15 V
analog.com
Figure 68. Voltage Noise Density, VSY = ±15 V
Rev. F | 23 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 69. 0.1 Hz to 10 Hz Noise, VSY = ±15 V, Gain = 1 Million
Figure 72. Channel Separation vs. Frequency, VSY = ±15 V
Figure 70. Supply Current (ISY) vs. Supply Voltage (VSY) for Various
Temperatures (ADA4622-2)
Figure 73. THD + N vs. Amplitude, VSY = ±15 V
Figure 74. THD + N vs. Amplitude, VSY = ±5 V
Figure 71. Supply Current (ISY) vs. Temperature for Various Supply Voltages
(ADA4622-2)
analog.com
Rev. F | 24 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 75. THD + N vs. Amplitude, VSY = 5 V
Figure 78. THD + N vs. Frequency, VSY = 5 V
Figure 76. THD + N vs. Frequency, VSY = ±15 V
Figure 79. Shutdown Current vs. Temperature
Figure 77. THD + N vs. Frequency, VSY = ±5 V
analog.com
Rev. F | 25 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
THEORY OF OPERATION
Figure 80. Simplified Circuit Diagram
INPUT CHARACTERISTICS
The ADA4622-1/ADA4622-2/ADA4622-4 input stage consists of
N-channel JFETs that provide low offset, low noise, and high impedance. The minimum input common-mode voltage extends from
−0.2 mV below V− to 1 V less than V+. Driving the input closer to
the positive rail causes loss of amplifier bandwidth and increased
common-mode voltage error. Figure 81 shows the rounding of the
output due to the loss of bandwidth. The input and output are
superimposed.
Figure 82. No Phase Reversal
Because the input stage uses N-channel JFETs, the input current
during normal operation is negative. However, the input bias current
changes direction as the input voltage approaches V+ due to
internal junctions becoming forward-biased (see Figure 83).
Figure 81. Bandwidth Limiting due to Headroom Requirements
The ADA4622-1/ADA4622-2/ADA4622-4 do not exhibit phase reversal for input voltages up to V+. For input voltages greater than
V+, a 10 kΩ resistor in series with the noninverting input prevents
phase reversal at the expense of higher noise (see Figure 82).
Figure 83. Input Bias Current vs. Common-Mode Voltage with ±5 V Supply
analog.com
Rev. F | 26 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
THEORY OF OPERATION
The ADA4622-1/ADA4622-2/ADA4622-4 are designed for
12 nV/√Hz wideband input voltage noise density and maintain
low noise performance at low frequencies (see Figure 84). This
noise performance, along with the low input current as well as low
current noise, means that the ADA4622-1/ADA4622-2/ADA4622-4
contribute negligible noise for applications with a source resistance
greater than 10 kΩ and at signal bandwidths greater than 1 kHz.
EMI Rejection Ratio
Figure 85 shows the EMI rejection ratio (EMIRR) vs. the frequency
for the ADA4622-1/ADA4622-2/ADA4622-4.
Figure 85. EMIRR vs. Frequency
OUTPUT CHARACTERISTICS
The ADA4622-1/ADA4622-2/ADA4622-4 unique bipolar rail-to-rail
output stage swings within 10 mV of the supplies with no external
resistive load.
Figure 84. Total Noise vs. Source Resistance and Frequency
Input Overvoltage Protection
The ADA4622-1/ADA4622-2/ADA4622-4 have internal protective
circuitry that allows voltages as high as 0.3 V beyond the supplies
applied at the input of either terminal without causing damage. Use
a current-limiting resistor in series with the input of the ADA4622-1/
ADA4622-2/ADA4622-4 if the input voltage exceeds 0.3 V beyond
the supply rails of the amplifiers. If the overvoltage condition persists for more than a few seconds, damage to the amplifiers can
result.
For higher input voltages, determine the resistor value by
VIN − VSY
RS
≤ 10 mA
(1)
where:
VIN is the input voltage.
VSY is the voltage of either the V+ pin or the V− pin.
RS is the series resistor.
With a very low input bias current of ±1.5 nA maximum up to 125°C,
higher resistor values can be used in series with the inputs without
introducing large offset errors. A 1 kΩ series resistor allows the
ADA4622-1/ADA4622-2/ADA4622-4 to withstand 10 V of continuous overvoltage and increases the noise by a negligible amount.
A 5 kΩ resistor protects the inputs from voltages as high as 25 V
beyond the supplies and adds less than 10 µV to the offset voltage
of the amplifiers.
analog.com
The approximate output saturation resistance of the ADA4622-1/
ADA4622-2/ADA4622-4 is 24 Ω, sourcing or sinking. Use the output
impedance to estimate the output saturation voltage when driving
heavier loads. As an example, when driving 5 mA, the saturation
voltage from either rail is approximately 120 mV.
If the ADA4622-1/ADA4622-2/ADA4622-4 output drives hard
against the output saturation voltage, it recovers within 1.2 µs of the
input, returning to the linear operating region of the amplifier (see
Figure 56 and Figure 59).
Capacitive Load Drive Capability
Direct capacitive loads interact with the effective output impedance
of the ADA4622-1/ADA4622-2/ADA4622-4 to form an additional
pole in the feedback loop of the amplifiers, which causes excessive
peaking on the pulse response or loss of stability. The worst
case condition is when the devices use a single 5 V supply in a
unity-gain configuration. Figure 86 shows the pulse response of the
ADA4622-1/ADA4622-2/ADA4622-4 when driving 500 pF directly.
Rev. F | 27 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
THEORY OF OPERATION
Figure 86. Pulse Response with 500 pF Load Capacitance
Figure 88. Start-Up Response when Toggling the DISABLE Input
SHUTDOWN OPERATION
Use the active low DISABLE input to put the ADA4622-1 into
shutdown mode. When the voltage on the DISABLE input is less
than 1.4 V above the negative supply voltage (V−), the ADA4622-1
shuts down and consumes only 50 µA to 60 µA (typical). When
the voltage on the DISABLE input is more than 1.4 V above
the negative supply voltage (V−), or if the DISABLE input is left
floating, the ADA4622-1 powers up. For best performance, it is
recommended that the input voltage level on the DISABLE input
be V− or that the input be left floating. The ADA4622-1 is still a
drop-in replacement for devices with standard single channel op
amp pinouts because the ADA4622-1 enables when the DISABLE
input is left floating. Figure 87 shows a simplified circuit for the
DISABLE input.
Figure 89. Shutdown Response when Toggling the DISABLE Input
Figure 90 shows the DISABLE input current vs. the DISABLE input
voltage relative to the negative supply voltage (V−).
Figure 87. Simplified Circuit for the DISABLE Input
Figure 88 and Figure 89 show the start-up and shutdown response
when toggling the DISABLE input.
Figure 90. DISABLE Input Current vs. DISABLE Input Voltage Relative to V−
analog.com
Rev. F | 28 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
APPLICATIONS INFORMATION
RECOMMENDED POWER SOLUTION
The ADA4622-1/ADA4622-2/ADA4622-4 can operate from a ±2.5 V
to ±15 V dual supply or a 5 V to 30 V single supply. The ADP7118
and the ADP7182 are recommended to generate the clean positive and negative rails for the ADA4622-1/ADA4622-2/ADA4622-4.
Both low dropout (LDO) regulators are available in fixed output
voltage or adjustable output voltage versions. To generate the input
voltages for the LDOs, the ADP5070 dc-to-dc switching regulator is
recommended. Figure 91 shows the recommended power solution
configuration for the ADA4622-1/ADA4622-2/ADA4622-4.
Figure 92. Second-Order, Butterworth, Low-Pass Filter
Figure 93 shows a plot of the filter; greater than 35 dB of high
frequency rejection is achieved.
Figure 91. Power Solution Configuration for the ADA4622-1/ADA4622-2/
ADA4622-4
Table 12. Recommended Power Management Devices
Product
Description
ADP5070
DC-to-DC switching regulator with independent positive and negative outputs
ADP7118
20 V, 200 mA, low noise, CMOS LDO regulator
ADP7182
−28 V, −200 mA, low noise, linear regulator
MAXIMUM POWER DISSIPATION
The maximum power the ADA4622-1/ADA4622-2/ADA4622-4 can
safely dissipate is limited by the associated rise in junction temperature. For plastic packages, the maximum safe junction temperature
is 150°C. If this maximum temperature is exceeded, reduce the die
temperature to restore proper circuit operation. Leaving the device
in the overheated condition for an extended period of time can
result in device burnout. To ensure proper operation, it is important
to observe the specifications shown in the Absolute Maximum
Ratings and Thermal Resistance sections.
SECOND-ORDER LOW-PASS FILTER
Figure 92 shows the ADA4622-1/ADA4622-2/ADA4622-4 configured as a second-order, Butterworth, low-pass filter. With the values
as shown, the corner frequency equals 200 kHz. The following
equations show the component selection:
Figure 93. Frequency Response of the Filter
WIDEBAND PHOTODIODE PREAMPLIFIER
The ADA4622-1/ADA4622-2/ADA4622-4 are an excellent choice
for photodiode preamplifier applications. The low input bias current
minimizes the dc error at the output of the preamplifier. In addition,
the high gain bandwidth product and low input capacitance maximizes the signal bandwidth of the photodiode preamplifier. Figure
94 shows the ADA4622-1/ADA4622-2/ADA4622-4 as a current to
voltage (I to V) converter with an electrical model of a photodiode.
R1 = R2 = User Selected (Typical Values: 10 kΩ to 100 kΩ)
C1 =
C2 =
1.414
2πfCUTOFF × R1
0.707
2πfCUTOFF × R1
(2)
(3)
Figure 94. Wideband Photodiode Preamplifier
analog.com
Rev. F | 29 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
APPLICATIONS INFORMATION
The following basic transfer function describes the transimpedance
gain of the photodiode preamplifier:
VOUT =
IPHOTO × RF
1 + sCFRF
(4)
where:
IPHOTO is the output current of the photodiode.
The parallel combination of RF and CF sets the signal bandwidth
(see the I to V gain trace in Figure 96).
s refers to the s-plane.
Note that RF must be set so the maximum attainable output voltage
corresponds to the maximum diode output current, IPHOTO, which
allows use of the full output swing. The attainable signal bandwidth
with this photodiode preamplifier is a function of RF, the gain bandwidth product (fGBP) of the amplifier, and the total capacitance at
the amplifier summing junction, including CS and the amplifier input
capacitance, CD and CM. RF and the total capacitance produce a
pole with loop frequency (fP).
fP =
1
2πRFCS
(5)
With the additional pole from the amplifier open-loop response,
the two-pole system results in peaking and instability due to an
insufficient phase margin (see Figure 95).
Figure 96. Gain and Phase Plot of the Transimpedance Amplifier Design with
Compensation
Adding CF creates a zero in the loop transmission that compensates for the effect of the input pole, which stabilizes the photodiode
preamplifier design because of the increased phase margin. Adding
CF also sets the signal bandwidth (see Figure 96). The signal
bandwidth and the zero frequency are determined by
fZ =
1
2πRFCF
(6)
where fZ is the zero frequency.
Setting the zero at the fX frequency maximizes the signal bandwidth
with a 45° phase margin. Because fX is the geometric mean of fP
and fGBP, it can be calculated by
fX = fP × fGBP
(7)
Combining these equations, the CF value that produces fX is
CF =
Figure 95. Gain and Phase Plot of the Transimpedance Amplifier Design,
Without Compensation
CS
2π × RF × fGBP
(8)
The frequency response in this case shows approximately 2 dB
of peaking and 15% overshoot. Doubling CF and halving the bandwidth results in a flat frequency response with approximately 5%
transient overshoot.
The dominant sources of output noise in the wideband photodiode
preamp design are the input voltage noise of the amplifier, VNOISE,
and the resistor noise due to RF. The gray trace in Figure 96 shows
the noise gain over frequencies for the photodiode preamp.
Calculate the noise bandwidth at the fN frequency by
fN =
fGBP
(CS + CF)/CF
(9)
Figure 97 shows the ADA4622-1/ADA4622-2/ADA4622-4 configured as a transimpedance photodiode amplifier. The amplifiers
are used in conjunction with a photodiode detector with an input
capacitance of 5 pF. Figure 98 shows the transimpedance response
of the ADA4622-1/ADA4622-2/ADA4622-4 when IPHOTO is 1 µA
analog.com
Rev. F | 30 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
APPLICATIONS INFORMATION
p-p. The amplifiers have a bandwidth of 2 MHz when they are
maximized for a 45° phase margin with CF = 2 pF. Note that with
the PCB parasitics added to CF, the peaking is only 0.5 dB, and the
bandwidth is reduced slightly.
Increasing CF to 3 pF completely eliminates the peaking; however,
increasing CF to 3 pF reduces the bandwidth to 1 MHz.
Table 13 shows the noise sources and total output noise for the
photodiode preamp, where the preamp is configured to have a 45°
phase margin for maximum bandwidth and fZ = fX = fN in this case.
Figure 98. Transimpedance Photodiode Preamplifier Frequency Response
Figure 97. Transimpedance Photodiode Preamplifier
Table 13. RMS Noise Contributions of the Photodiode Preamplifier
Contributor
RF
VNOISE
Root Sum Square (RSS) Total
1
RMS Noise (µV)1
Expression
4kT × RF × fN × π
2
VNOISE ×
(CS + CM + CF + CD)
×
CF
RF2 × VNOISE2
50.8
π
2 × fN
131.6
141
RMS noise with RF = 50 kΩ, CS = 5 pF, CF = 2 pF, CM = 3.7 pF, and CD = 0.4 pF.
analog.com
Rev. F | 31 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
APPLICATIONS INFORMATION
PEAK DETECTOR
A peak detector captures the peak value of a signal and produces
an output equal to it. By taking advantage of the dc precision and
super low input bias current of the JFET input amplifiers, such
as the ADA4622-1/ADA4622-2/ADA4622-4, a highly accurate peak
detector can be built, as shown in Figure 99.
Figure 100. Multiplexed Input Circuit
Figure 99. Positive Peak Detector
In this application, D3 and D4 act as unidirectional current switches
that open when the output is kept constant in hold mode.
To detect a positive peak, U1 drives C3 through D3 and drives D4
until C3 is charged to a voltage equal to the input peak value.
Figure 101 shows the output response when multiplexing two input
signals. The input to the first amplifier is a 4 V p-p, 200 kHz sine
wave; the input to the second amplifier is an 8 V p-p, 100 kHz sine
wave.
Feedback from the output of the U2 (positive peak) through R6
limits the output voltage of U1. After detecting the peak, the output
of U1 swings low but is clamped by D2. D3 reverses bias and the
common node of D3, D4, and R7 is held to a voltage equal to
positive peak by R7. The voltage across D4 is 0 V; therefore, the
leakage is small. The bias current of U2 is also small. With almost
no leakage, C3 has a long hold time.
The ADA4622-1/ADA4622-2/ADA4622-4, shown in Figure 99, are a
perfect fit for building a peak detector because U1 requires dc precision and high output current during fast peaks, and U2 requires
low input bias current (IB) to minimize capacitance discharge between peaks. A low leakage and low dielectric absorption capacitor,
such as polystyrene or polypropylene, is required for C3. Reversing
the diode directions causes the circuit to detect negative peaks.
MULTIPLEXING INPUTS
By using the ADA4622-1 DISABLE input, it is possible to multiplex
two inputs to a single output by using the circuit shown in Figure
100. If the gain configuration or filter configuration of the two
amplifiers is different, and a common single input to both amplifiers
is used, this configuration can control selectable gain or selectable
frequency response at the output.
Figure 101. Multiplexed Output
FULL WAVE RECTIFIER
Figure 102 shows the circuit of a full wave rectifier using two
ADA4622-1 op amps in single-supply operation. The circuit is composed of a voltage follower (U1) and a second stage amplifier (U2)
that combine the output of the first stage amplifier and the inverted
version of the input signal. U1 follows the input during the positive
half cycle and clamps the negative going input signal to ground,
producing a half wave signal at VHW. The following equation defines
the circuit transfer function:
VFW = (1+ R3/R2)VHW − (R3/R2) × VIN
where:
VFW is the full wave output from U1.
R3 and R2 are the feedback resistors shown in Figure 102.
VHW is the half wave output from U1.
VIN is the input voltage.
analog.com
Rev. F | 32 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
APPLICATIONS INFORMATION
Figure 102. Full Wave Rectifier Circuit
During the input positive half cycle, U1 follows the input so that
VHW = VIN; therefore, VFW = VIN. During the negative half cycle, U1
clamps the signal to ground so that VHW = 0 V; therefore, VFW =
−(R3/R2) × VIN = −VIN because R3/R2 = 1. Figure 103 shows the
input and outputs waveforms from the circuit. The input is a 2 V p-p,
1 kHz sine wave while the circuit is running on a 5 V single supply.
Figure 103. Full Wave and Half Wave Rectifier Input and Output Waveforms
analog.com
Rev. F | 33 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
OUTLINE DIMENSIONS
Figure 104. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Figure 105. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Figure 106. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-13)
Dimensions shown in millimeters
analog.com
Rev. F | 34 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
OUTLINE DIMENSIONS
Figure 107. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 108. 16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-16-20)
Dimensions shown in millimeters
Figure 109. 14-Lead Standard Small Outline Package [SOIC_N]
(R-14)
Dimensions shown in millimeters and (inches)
analog.com
Rev. F | 35 of 36
Data Sheet
ADA4622-1/ADA4622-2/ADA4622-4
OUTLINE DIMENSIONS
Updated: September 06, 2022
ORDERING GUIDE
Model1
Temperature Range
Package Description
Packing Quantity
ADA4622-1ARJZ-R2
ADA4622-1ARJZ-R7
ADA4622-1ARJZ-RL
ADA4622-1ARZ
ADA4622-1ARZ-R7
ADA4622-1ARZ-RL
ADA4622-1BRZ
ADA4622-1BRZ-R7
ADA4622-1BRZ-RL
ADA4622-2ACPZ-R7
ADA4622-2ACPZ-RL
ADA4622-2ARMZ
ADA4622-2ARMZ-R7
ADA4622-2ARMZ-RL
ADA4622-2ARZ
ADA4622-2ARZ-R7
ADA4622-2ARZ-RL
ADA4622-2BRZ
ADA4622-2BRZ-R7
ADA4622-2BRZ-RL
ADA4622-4ACPZ-R2
ADA4622-4ACPZ-R7
ADA4622-4ACPZ-RL
ADA4622-4ARZ
ADA4622-4ARZ-R7
ADA4622-4ARZ-RL
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead LFCSP (3mm x 3mm w/ EP)
8-Lead LFCSP (3mm x 3mm w/ EP)
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
16-Lead LFCSP (4mm x 4mm w/ EP)
16-Lead LFCSP (4mm x 4mm w/ EP)
16-Lead LFCSP (4mm x 4mm w/ EP)
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
Reel, 250
Reel, 3000
Reel, 10000
1
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Reel, 1500
Reel, 5000
Reel, 1000
Reel, 3000
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Reel, 250
Reel, 1500
Reel, 5000
Reel, 1000
Reel, 2500
Package
Option
RJ-5
RJ-5
RJ-5
R-8
R-8
R-8
R-8
R-8
R-8
CP-8-13
CP-8-13
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
CP-16-20
CP-16-20
CP-16-20
R-14
R-14
R-14
Marking Code
A3J
A3J
A3J
A3D
A3D
A3D
A3D
A3D
Z = RoHS Compliant Part.
©2015-2022 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887-2356, U.S.A.
Rev. F | 36 of 36
工商网监
湘ICP备2023018690号
