ADA4807-4ARUZ-EBZ

3.1 nV/√Hz, 1 mA, 180 MHz, Rail-to-Rail Input/Output Amplifiers ADA4807-1/ADA4807-2/ADA4807-4 Data Sheet VOUT 1 6 +VS –VS 2 5 DISABLE +IN 3 4 –IN VOUT1 1 8 +VS –IN1 2 7 VOUT2 +IN1 3 6 –IN2 –VS 4 5 +IN2 High resolution analog-to-digital converter (ADC) drivers Portable and battery-powered instruments and systems High component density data acquisition systems Audio signal conditioning Active filters 12611-058 Figure 1. 6-Lead SC70 and 6-Lead SOT-23 Pin Configuration (ADA4807-1) VOUT1 –IN1 +IN1 –VS DISABLE1 10 9 8 7 6 1 2 3 4 5 +VS VOUT2 –IN2 +IN2 DISABLE2 12611-059 Figure 2. 8-Lead MSOP Pin Configuration (ADA4807-2) Figure 3. 10-Lead LFCSP Pin Configuration (ADA4807-2) 14 VOUT4 VOUT1 1 APPLICATIONS 12611-001 PIN CONNECTION DIAGRAMS Low input noise 3.1 nV/√Hz at f = 100 kHz with 29 Hz 1/f corner 0.7 pA/√Hz at f = 100 kHz with 2 kHz 1/f corner High speed performance with dc precision 180 MHz, −3 dB bandwidth (G = +1, VOUT = 20 mV p-p) 225 V/μs slew rate for 5 V step (rise) 47 ns settling time to 0.1% for 4 V step ±125 μV and 3.7 μV/°C maximum input offset voltage and drift 100 nA and 250 pA/°C maximum input offset current and drift Low distortion (HD2/HD3), VS = ±5 V, VOUT = 2 V p-p −141 dBc/−144 dBc at 1 kHz −112 dBc/−115 dBc at 100 kHz −95 dBc/−79 dBc at 1 MHz Low power operation 1.0 mA quiescent supply current per amplifier at ±5 V Dynamic power scaling Fully specified at +3 V, +5 V, and ±5 V supplies Rail-to-rail inputs and outputs –IN1 2 13 –IN4 12 +IN4 +IN1 3 +VS 4 ADA4807-4 11 –VS +IN2 5 10 +IN3 –IN2 6 9 –IN3 VOUT2 7 8 VOUT3 12611-104 FEATURES Figure 4. 14-Lead TSSOP Pin Configuration (ADA4807-4) GENERAL DESCRIPTION The ADA4807-1 (single), ADA4807-2 (dual), and ADA4807-4 (quad) are low noise, rail-to-rail input and output, voltage feedback amplifiers. These amplifiers combine low power, low noise, high speed, and dc precision to provide an attractive solution for a wide range of applications from high resolution data acquisition instrumentation to high performance batterypowered and high component density systems where power consumption is of key importance. With only 1.0 mA of supply current per amplifier, the ADA4807-1/ ADA4807-2/ADA4807-4 feature the lowest input voltage noise among high speed, rail-to-rail input/output amplifiers in the industry and offer a wide bandwidth, high slew rate, fast settling time, and excellent distortion performance. Additionally, these amplifiers offer very low input offset voltage and drift performance, making them ideal for driving multiplexed and high throughput precision 16-/18-bit successive approximation registers (SARs) and 24-bit - ADCs. Rev. B These amplifiers are fully specified at +3 V, +5 V, and ±5 V supplies and can operate over the industrial −40°C to +125°C temperature range. The ADA4807-1 is available in 6-lead SOT-23 and space-saving 6-lead SC70 packages. The ADA4807-2 is available in an 8-lead MSOP and a compact, 3 mm × 3 mm, 10-lead LFCSP. The ADA4807-4 is available in a 14-lead TSSOP package. Table 1. Other Rail-to-Rail Amplifiers Device AD8031/AD8032 AD8027/AD8028 AD8029/AD8030/ AD8040 Bandwidth (MHz) 80 190 125 Slew Rate (V/μs) 35 90 62 Voltage Noise (nV/√Hz) 15 4.3 16.5 Max. VOS (mV) ±1.5 0.8 5 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4807-1/ADA4807-2/ADA4807-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1  Slew, Transient, Settling Time, and Crosstalk............................. 18  Applications ....................................................................................... 1  Distortion and Noise.................................................................. 20  Pin Connection Diagrams ............................................................... 1  Output Characteristics............................................................... 22  General Description ......................................................................... 1  Overdrive Recovery and Turn On/Turn Off Times .............. 23  Revision History ............................................................................... 2  Theory of Operation ...................................................................... 24  Specifications..................................................................................... 3  Disable Circuitry ........................................................................ 25  ±5 V Supply ................................................................................... 3  Input Protection ......................................................................... 25  5 V Supply...................................................................................... 5  Noise Considerations ................................................................. 25  3 V Supply...................................................................................... 7  Applications Information .............................................................. 26  Absolute Maximum Ratings............................................................ 9  Capacitive Load Drive ............................................................... 26  Maximum Power Dissipation ..................................................... 9  Low Noise FET Operational Amplifier ................................... 26  Thermal Resistance ...................................................................... 9  Power Mode ADC Driver ......................................................... 27  ESD Caution .................................................................................. 9  ADC Driving............................................................................... 28  Pin Configurations and Function Descriptions ......................... 10  ADC Driving with Dynamic Power Scaling ........................... 29  Typical Performance Characteristics ........................................... 13  Layout, Grounding, and Bypassing .......................................... 30  Frequency Response................................................................... 13  Outline Dimensions ....................................................................... 31  Frequency and Supply Current ................................................. 15  Ordering Guide .......................................................................... 33  DC and Input Common-Mode Performance ......................... 16  REVISION HISTORY 9/15—Rev. A to Rev. B Added ADA4807-4 ............................................................. Universal Changes to Features Section, General Description Section, and Table 1 .......................................................................................................... 1 Added Figure 4, Renumbered Sequentially .................................. 1 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 5 Changes to Table 4 ............................................................................ 7 Deleted Figure 6, Renumbered Sequentially............................... 10 Changes to Figure 6 ........................................................................ 10 Added Figure 9 and Table 9, Renumbered Sequentially ........... 12 Changes to Figure 20 ...................................................................... 14 Added Figure 21.............................................................................. 14 Added Figure 31 and Figure 32..................................................... 16 Added Figure 35.............................................................................. 17 Changes to Figure 39 ...................................................................... 18 Added Figure 42.............................................................................. 19 Deleted Figure 50, Figure 51, Figure 53, and Figure 54 ............. 19 Added Figure 46.............................................................................. 20 Added Figure 49 and Figure 51..................................................... 21 Added Figure 59 and Figure 61..................................................... 23 Changes to DISABLE Circuitry Section ...................................... 25 Added Low Noise FET Operational Amplifier Section............. 26 Added Figure 70, Figure 71, Figure 72, and Power Mode ADC Driver Section ................................................................................. 27 Added ADC Driving Section and Figure 73 through Figure 77..... 28 Added ADC Driving with Dynamic Power Scaling Section, Figure 78, Figure 79, and Figure 80 .............................................. 29 Added Figure 58 ............................................................................. 33 Changes to Ordering Guide .......................................................... 33 4/15—Rev. 0 to Rev. A Added ADA4807-2 ............................................................. Universal Changes to Features Section, General Description Section, and Pin Connection Diagrams Heading .........................1 Added Figure 2 and Figure 3; Renumbered Sequentially ............1 Changes to Table 1.............................................................................3 Changes to Table 2.............................................................................5 Changes to Table 3.............................................................................7 Changes to Table 6 and Figure 4 ......................................................9 Added Figure 7, Figure 8, and Table 8; Renumbered Sequentially ....11 Reorganized Layout, Typical Performance Characteristics Section.............................................................................................. 12 Added Figure 36 ............................................................................. 16 Changes to Figure 37 Caption, Figure 38 Caption, Figure 39 Caption, and Figure 40 Caption ................................................... 17 Changes to Figure 44 and Figure 47............................................. 18 Change to Theory of Operation Section ..................................... 20 Changes to DISABLE Circuitry Section, Table 9, and Noise Considerations Section .................................................................. 21 Added Figure 65 and Figure 66 .................................................... 23 Changes to Ordering Guide .......................................................... 25 12/14—Revision 0: Initial Version Rev. B | Page 2 of 33 Data Sheet ADA4807-1/ADA4807-2/ADA4807-4 SPECIFICATIONS ±5 V SUPPLY TA = 25°C, VS = ±5 V, RLOAD = 1 kΩ to midsupply, RF = 0 Ω, G = +1, −VS ≤ VICM ≤ +VS − 1.5 V, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Slew Rate Settling Time to 0.1% DISTORTION/NOISE PERFORMANCE Second Harmonic (HD2) Third Harmonic (HD3) Peak-to-Peak Noise Input Voltage Noise Input Voltage Noise 1/f Corner Input Current Noise Input Current Noise 1/f Corner DC PERFORMANCE Input Offset Voltage −VS ≤ VICM ≤ +VS − 1.5 V +VS − 1.5 V ≤ VICM ≤ +VS Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift Open-Loop Gain INPUT CHARACTERISTICS Common-Mode Input Resistance Differential Input Resistance Common-Mode Input Capacitance Differential Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio (CMRR) Test Conditions/Comments Min Typ Max Unit G = +1, VOUT = 20 mV p-p G = +1, VOUT = 2 V p-p G = +1, VOUT = 5 V step, 20% to 80%, rise/fall G = +1, VOUT = 4 V step 180 28 225/250 47 MHz MHz V/μs ns fC = 1 kHz, VOUT = 2 V p-p fC = 100 kHz, VOUT = 2 V p-p fC = 1 MHz, VOUT = 2 V p-p, ADA4807-1 fC = 1 MHz, VOUT = 2 V p-p, ADA4807-2, ADA4807-4 fC = 1 kHz, VOUT = 2 V p-p fC = 100 kHz, VOUT = 2 V p-p fC = 1 MHz, VOUT = 2 V p-p f = 0.1 Hz to 10 Hz f = 100 kHz f = 1 kHz f = 10 Hz −141 −112 −95 −84 dBc dBc dBc dBc −144 −115 −79 160 3.1 3.3 5.8 29 0.7 10 2 dBc dBc dBc nV p-p nV/√Hz nV/√Hz nV/√Hz Hz pA/√Hz pA/√Hz kHz f = 100 kHz f = 10 Hz ADA4807-1, ADA4807-2 ADA4807-4 ADA4807-1, ADA4807-2 ADA4807-4 −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX −VS ≤ VICM ≤ +VS − 1.5 V +VS − 1.5 V ≤ VICM ≤ +VS −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX −VS ≤ VICM ≤ +VS − 1.5 V +VS − 1.5 V ≤ VICM ≤ +VS −VS ≤ VICM ≤ +VS − 1.2 V, TMIN to TMAX −125 −175 −750 −850 120 ±20 ±20 ±140 ±140 0.7 −1.2 530 2.5 8 25 30 130 +125 +175 +750 +850 3.7 −1.6 1000 3.6 100 150 250 45 35 1 1 VICM = −3 V to +2 V Rev. B | Page 3 of 33 −VS − 0.2 96 +VS + 0.2 110 μV μV μV μV μV/°C μA nA nA/°C nA nA pA/°C dB MΩ kΩ pF pF V dB ADA4807-1/ADA4807-2/ADA4807-4 Parameter DISABLE CHARACTERISTICS1 DISABLE Input Voltage2 Low High DISABLE Input Current Low High DISABLE On Time DISABLE Off Time OUTPUT CHARACTERISTICS Saturated Output Voltage Swing High Low Linear Output Current3 Short-Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio (PSRR) Positive Negative Data Sheet Test Conditions/Comments Min Typ Max Unit Disabled Enabled 1.7 V V Disabled Enabled DISABLE input midswing point to >90% of final VOUT, VPD = +VS DISABLE input midswing point to 90% of final VOUT, VPD = +VS DISABLE input midswing point to 90% of final VOUT, VPD = +VS DISABLE input midswing point to