ADA4817-1

Low Noise, 1 GHz FastFET Op Amps ADA4817-1/ADA4817-2 FEATURES High speed −3 dB bandwidth (G = 1, RL = 100 Ω): 1050 MHz Slew rate: 870 V/μs 0.1% settling time: 9 ns Low input bias current: 2 pA Low input capacitance Common-mode capacitance: 1.5 pF Differential-mode capacitance: 0.1 pF Low noise 4 nV/√Hz @ 100 kHz 2.5 fA/√Hz @ 100 kHz Low distortion −90 dBc @ 10 MHz (G = 1, RL = 1 kΩ) Offset voltage: 2 mV maximum High output current: 70 mA Supply current per amplifier: 19 mA Power-down supply current per amplifier: 1 mA CONNECTION DIAGRAMS ADA4817-1 TOP VIEW (Not to Scale) PD 1 FB 2 –IN 3 +IN 4 NC = NO CONNECT 8 +VS 7 OUT 6 NC 5 –VS 07756-001 Figure 1. 8-Lead ADA4817-1 LFCSP (CP-8-2) ADA4817-2 TOP VIEW (Not to Scale) 15 PD1 16 FB1 13 OUT1 14 +VS1 –IN1 1 +IN1 2 NC 3 –VS2 4 OUT2 5 +VS2 6 PD2 7 FB2 8 12 –VS1 11 NC 10 +IN2 9 –IN2 APPLICATIONS Photodiode amplifiers Data acquisition front ends Instrumentation Filters ADC drivers CCD output buffers NC = NO CONNECT Figure 2. 16-Lead ADA4817-2 LFSCP (CP-16-4) GENERAL DESCRIPTION The ADA4817-1 (single) and ADA4817-2 (dual) FastFET™ amplifiers are unity-gain stable, ultrahigh speed voltage feedback amplifiers with FET inputs. These amplifiers are developed in the Analog Devices, Inc., proprietary eXtra Fast Complementary Bipolar (XFCB) process, which allows the amplifiers to achieve ultralow noise (4 nV/√Hz; 2.5 fA/√Hz) as well as very high input impedances. With 1.5 pF of input capacitance, low noise (4 nV/√Hz), low offset voltage (2 mV maximum), and 1050 MHz −3 dB bandwidth, the ADA4817-1/ADA4871-2 are ideal for data acquisition front ends as well as wideband transimpedance applications, such as photodiode preamps. With a wide supply voltage range from 5 V to 10 V, the ability to operate on either single or dual supplies, the ADA4817-1/ ADA4817-2 are designed to work in a variety of applications including active filtering and ADC driving. The ADA4817-1 is available in a 3 mm × 3 mm 8-lead LFCSP and the ADA4817-2 is available in a 4 mm × 4 mm 16-lead LFSCP. Both packages feature a low distortion pinout, which improves second harmonic distortion and simplifies the layout of the circuit board. In addition, both packages feature an exposed paddle that provides a low thermal resistance path to the printed circuit board (PCB). This enables more efficient heat transfer and increases reliability. Both products are rated to work over the extended industrial temperature range (−40°C to +105°C). Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. 07756-003 ADA4817-1/ADA4817-2 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Connection Diagrams ...................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 ±5 V Operation ............................................................................. 3 5 V Operation ............................................................................... 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 Maximum Safe Power Dissipation ............................................. 5 ESD Caution .................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ............................................. 7 Test Circuits ..................................................................................... 12 Theory of Operation ...................................................................... 13 Closed-Loop Frequency Response ........................................... 13 Noninverting Closed-Loop Frequency Response .................. 13 Inverting Closed-Loop Frequency Response ............................. 13 Wideband Operation ................................................................. 14 Driving Capacitive Loads .......................................................... 14 Thermal Considerations............................................................ 14 Power-Down Operation ............................................................ 15 Capacitive Feedback................................................................... 15 Layout, Grounding, and Bypassing Considerations .................. 16 Signal Routing............................................................................. 16 Power Supply Bypassing ............................................................ 16 Grounding ................................................................................... 16 Exposed Paddle........................................................................... 16 Leakage Currents ........................................................................ 17 Input Capacitance ...................................................................... 17 Input-to-Input/Output Coupling ............................................. 17 Applications Information .............................................................. 18 Low Distortion Pinout ............................................................... 18 Wideband Photodiode Preamp ................................................ 18 High Speed JFET Input Instrumentation Amplifier.............. 20 Active Low-Pass Filter (LPF) .................................................... 21 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 REVISION HISTORY 11/08—Revision 0: Initial Version Rev. 0 | Page 2 of 24 ADA4817-1/ADA4817-2 SPECIFICATIONS ±5 V OPERATION TA = 25°C, G = 1, RF = 348 Ω for G > 1, RL = 100 Ω to ground, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Conditions VOUT = 0.1 V p-p VOUT = 2 V p-p VOUT = 0.1 V p-p, G = 2 VOUT = 0.1 V p-p VOUT = 2 V p-p, RL = 100 Ω, G = 2 VOUT = 4 V step VOUT = 2 V step, G = 2 f = 1 MHz, VOUT = 2 V p-p, RL = 1 kΩ f = 10 MHz, VOUT = 2 V p-p, RL = 1 kΩ f = 50 MHz, VOUT = 2 V p-p, RL = 1 kΩ f = 100 kHz f = 100 kHz Min Typ 1050 200 390 ≥410 60 870 9 −113/−117 −90/−94 −64/−66 4 2.5 0.4 7 2 100 1 65 500 1.5 0.1 −5 to +2.3 −90 8 −3.6 to +3.7 −4.0 to +4.0 70 100/170 >+VS − 1 1, RL = 100 Ω to midsupply, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Conditions VOUT = 0.1 V p-p VOUT = 1 V p-p VOUT = 0.1 V p- p, G = 2 VOUT = 1 V p-p, G = 2 VOUT = 2 V step VOUT = 1 V step, G = 2 f = 1 MHz, VOUT = 1 V p-p, RL = 1 kΩ f = 10 MHz, VOUT = 1 V p-p, RL = 1 kΩ f = 50 MHz, VOUT = 1 V p-p, RL = 1 kΩ f = 100 kHz f = 100 kHz Min Typ 500 160 280 32 320 11 −87/−88 −68/−66 −57/−55 4 2.5 0.5 7 2 100 1 63 500 1.3 0.1 0 to 2.3 −83 13 1 to 3.8 0.9 to 4.0 55 40/130 >+VS − 1 1), RL = 100 Ω to ground, small signal VOUT = 100 mV p-p, large signal VOUT = 2 V p-p, unless noted otherwise. 6 3 NORMALIZED CLOSED-LOOP GAIN (dB) G = 1, DUAL G = 1, SINGLE NORMALIZED CLOSED-LOOP GAIN (dB) G=2 0 G = 1, DUAL 3 G =2 0 G=5 –3 G = 1, SINGLE G=5 –3 –6 –6 –9 –9 1M 10M 100M FREQUENCY (Hz) 1G 10G 1M 10M 100M FREQUENCY (Hz) 1G 10G Figure 6. Small Signal Frequency Response for Various Gains 6 Figure 9. Large Signal Frequency Response for Various Gains 6 3 CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) 3 VS = 10V VOUT = 2V p-p 0 VS = 10V –3 VS = 5V –6 0 –3 VS = 5V VOUT = 1V p-p –6 –9 –9 07756-007 1M 10M 100M FREQUENCY (Hz) 1G 1G 1M 10M 100M FREQUENCY (Hz) 1G 10G Figure 7. Small Signal Frequency Response for Various Supplies Figure 10. Large Signal Frequency Response for Various Supplies 9 CL = 6.6pF CL = 4.4pF CL = 0pF 9 CL = 2.2pF 6 CLOSED-LOOP GAIN (dB) RF = 348Ω RF = 274Ω 6 CLOSED-LOOP GAIN (dB) RF = 200Ω 3 3 0 0 –3 –3 –6 G=2 RF = 274Ω 07756-068 –6 G=2 –9 100k 1M 10M 100M FREQUENCY (Hz) 1G 10G 1M 10M 100M FREQUENCY (Hz) 1G 10G Figure 8. Small Signal Frequency Response for Various CL Figure 11. Small Signal Frequency Response for Various RF Rev. 0 | Page 7 of 24 07756-011 –9 100k 07756-010 –12 100k –12 100k 07756-009 07756-066 –12 100k –12 100k ADA4817-1/ADA4817-2 0.5 NORMALIZED CLOSED-LOOP GAIN (dB) 6 G = 2, SS CLOSED-LOOP GAIN (dB) 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 1M 3 G = 2, LS 0 G = 1, SS –3 G = 1, LS –6 TA = +25°C, SINGLE TA = +25°C, DUAL TA = –40°C, SINGLE TA = –40°C, DUAL TA = +105°C, SINGLE TA = +105°C, DUAL 1M 10M 100M 1G 10G FREQUENCY (Hz) –9 10M 100M FREQUENCY (Hz) 1G 10G 07756-012 –0.5 100k –12 100k Figure 12. 0.1 dB Flatness Frequency Response vs. Gain and Output Voltage Figure 15. Small Signal Frequency Response vs. Temperature –20 –20 –40 –40 DISTORTION (dBc) DISTORTION (dBc) –60 HD2, RL = 100Ω HD2, RL = 1kΩ –100 HD3, RL = 100Ω HD3, RL = 1kΩ 07756-014 –60 HD2, VS = 5V –80 HD3, VS = 5V –80 –100 –120 –120 HD2, VS = 10V HD3, VS = 10V 10M FREQUENCY (Hz) 100M 07756-013 07756-017 –140 100k 1M 10M FREQUENCY (Hz) 100M –140 100k 1M Figure 13. Distortion vs. Frequency for Various Loads, VOUT = 2 V p-p Figure 16. Distortion vs. Frequency for Various Supplies, VOUT = 2 V p-p –20 –20 fC = 1MHz –40 HD2, VS = 5V HD2, VS = 10V –80 –40 DISTORTION (dBc) DISTORTION (dBc) –60 –60 –80 HD2, RL = 100Ω HD2, RL = 1kΩ –100 HD3, VS = 5V –120 HD3, VS = 10V –100 –120 HD3, RL = 1kΩ 0 1 2 3 HD3, RL = 100Ω 4 5 6 1M 10M FREQUENCY (Hz) 100M 07756-016 –140 100k –140 OUTPUT VOLTAGE (V p-p) Figure 14. Distortion vs. Frequency for Various Supplies, G = 2, VOUT = 2 V p-p Figure 17. Distortion vs. Output Voltage for Various Loads Rev. 0 | Page 8 of 24 07756-036 ADA4817-1/ADA4817-2 0.15 DUAL, CF = 0.5pF SINGLE, NO CF 0.15 DUAL, CF = 0.5pF SINGLE, NO CF 0.10 0.10 OUTPUT VOLTAGE (V) 0.05 OUTPUT VOLTAGE (V) SINGLE SINGLE 0.05 0 0 –0.05 DUAL –0.10 07756-018 –0.05 DUAL –0.10 07756-021 G=2 –0.15 TIME (5ns/DIV) –0.15 VS = 5V G=2 TIME (5ns/DIV) Figure 18. Small Signal Transient Response Figure 21. Small Signal Transient Response 1.5 6 G=2 OUTPUT VOLTAGE (V) 1.0 4 VOUT 2 0.5 VOLTAGE (V) 0 0 –0.5 DUAL –1.0 DUAL, CF = 0.5pF SINGLE, NO CF G=2 TIME (5ns/DIV) –2 07756-022 07756-023 –4 07756-019 2 × VIN –6 TIME (100 ns/DIV) –1.5 SINGLE Figure 19. Output Overdrive Recovery 0.5 0.4 0.3 Figure 22. Large Signal Transient Response 800 700 N: 4197 MEAN: –0.0248457 SD: 0.245658 SETTLING TIME SETTLING TIME (%) 07756-025 NUMBER OF HITS 600 500 400 300 200 100 0 –1.5 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 TIME (5ns/DIV) –1.0 –0.5 0 VOS (mV) 0.5 1.0 1.5 Figure 20. Input Offset Voltage Histogram Figure 23. 0.1% Short-Term Settling Time Rev. 0 | Page 9 of 24 ADA4817-1/ADA4817-2 0 –10 –20 –30 0.5 0.4 0.3 OFFSET VOLTAGE (mV) 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 1M 10M FREQUENCY (Hz) 100M 1G 07756-032 07756-037 PSRR (dB) –40 –50 –60 –70 –80 –90 –100 100k –PSRR +PSRR –0.5 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 24. PSRR vs. Frequency Figure 27. Offset Voltage vs. Temperature CMRR (dB) –45 –50 –55 –60 –65 –70 –75 –80 –85 –90 –95 –100 100k INPUT VOLTAGE NOISE (nV/ Hz) 07756-029 –20 –25 –30 –35 –40 1000 100 10 1M 10M FREQUENCY (Hz) 100M 1G 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 25. CMRR vs. Frequency 100 24 22 OUTPUT IMPEDANCE (Ω) SUPPLY CURRENT (mA) Figure 28. Input Voltage Noise 10 VS = ±5V 20 18 16 1 VS = +5V 14 12 0.1 1M 10M 100M FREQUENCY (Hz) 1G 07756-030 0.01 100k 10 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 26. Output Impedance vs. Frequency Figure 29. Quiescent Current vs. Temperature for Various Supply Voltages Rev. 0 | Page 10 of 24 07756-033 07756-026 1 10 ADA4817-1/ADA4817-2 1.6 OUTPUT SATURATION VOLTAGE (V) VS = ±5V –V-S + VOUT RL = 100Ω 70 60 50 40 10 –30 –70 PHASE –110 –150 GAIN –190 –230 –270 07756-015 1.5 1.4 1.3 +VS – VOUT 1.2 1.1 1.0 07756-034 +VS – VOUT 30 20 10 0.9 0.8 –40 VS = +5V –VS + VOUT –20 0 20 40 60 80 100 0 –10 10k 100k 1M 10M 100M 1G –310 10G TEMPERATURE (°C) FREQUENCY (Hz) Figure 30. Output Saturation Voltage vs. Temperature Figure 31. Open-Loop Gain and Phase vs. Frequency Rev. 0 | Page 11 of 24 PHASE (Degrees) GAIN (dB) ADA4817-1/ADA4817-2 TEST CIRCUITS The output feedback pins are used for ease of layout in Figure 32 to Figure 37. +VS 10µF +VS 10µF + + 0.1µF VIN 49.9Ω 10µF 0.1µF VOUT RL RG RF 0.1µF 0.1µF VOUT VIN 49.9Ω 10µF RL + + –VS –VS Figure 32. G = 1 Configuration Figure 35. Noninverting Gain Configuration +VS AC 49.9Ω +VS 10µF + 0.1µF VOUT RL 10µF + 07756-145 VOUT RL 49.9Ω AC –VS 07756-148 0.1µF –VS Figure 33. Positive Power Supply Rejection Figure 36. Negative Power Supply Rejection +VS 10µF +VS 10µF + RG RF 0.1µF VIN 49.9Ω 10µF + 07756-142 1kΩ 0.1µF VOUT CL RL VIN 1kΩ 1kΩ 53.6Ω 1kΩ 10µF 0.1µF 0.1µF VOUT RL RSNUB –VS –VS Figure 34. Capacitive Load Configuration Figure 37. Common-Mode Rejection Rev. 0 | Page 12 of 24 07756-146 0.1µF + 0.1µF 07756-141 07756-147 0.1µF 0.1µF + ADA4817-1/ADA4817-2 THEORY OF OPERATION The ADA4817-1/ADA4817-2 are voltage feedback operational amplifiers that combine new architecture for FET input operational amplifiers with the eXtra Fast Complementary Bipolar (XFCB) process from Analog Devices resulting in an outstanding combination of speed and low noise. The innovative high speed FET input stage handles common-mode signals from the negative supply to within 2.3 V of the positive rail. This stage is combined with an H-bridge to attain a 870 V/μs slew rate and low distortion, in addition to 4 nV/√Hz input voltage noise. The amplifier features a high speed output stage capable of driving heavy loads sourcing and sinking up to 70 mA of linear current. Supply current and offset current are laser trimmed for optimum performance. These specifications make the ADA4817-1/ ADA4817-2 a great choice for high speed instrumentation and high resolution data acquisition systems. Its low noise, picoamp input current, precision offset, and high speed make them superb preamps for fast photodiode applications. Closed-loop −3 dB frequency f −3dB = f CROSSOVER × RG R F + RG (6) INVERTING CLOSED-LOOP FREQUENCY RESPONSE Solving for the transfer function, −2π × f CROSSOVER × R F VO = VI (R F + RG )S + 2π × f CROSSOVER × RG (7) (8) At dc VO R =− F VI RG RG R F + RG Solve for closed-loop −3 dB frequency by, f −3dB = f CROSSOVER × (9) 80 A = (2π × fCROSSOVER )/s CLOSED-LOOP FREQUENCY RESPONSE OPEN-LOOP GAIN (A) (dB) The ADA4817-1/ADA4817-2 are classic voltage feedback amplifiers with an open-loop frequency response that can be approximated as the integrator response shown in Figure 40. Basic closed-loop frequency response for inverting and noninverting configurations can be derived from the schematics shown in Figure 38 and Figure 39. RF 60 40 20 fCROSSOVER = 410MHz RG 07756-046 07756-044 VIN VE A VOUT 0 0.1 1 10 FREQUENCY (MHz) 100 1000 Figure 38. Noninverting Configuration RF Figure 40. Open-Loop Gain vs. Frequency and Basic Connections VIN RG 07756-045 VE A VOUT Figure 39. Inverting Configuration The closed-loop bandwidth is inversely proportional to the noise gain of the op amp circuit, (RF + RG)/RG. This simple model is accurate for noise gains above 2. The actual bandwidth of circuits with noise gains at or below 2 is higher than those predicted with this model due to the influence of other poles in the frequency response of the real op amp. Figure 41 shows a voltage feedback amplifier’s dc errors. For both inverting and noninverting configurations, ⎛ R + RF VOUT (error ) = I b+ × RS ⎜ G ⎜R G ⎝ ⎞ ⎟ − I b − × R F + VOS ⎟ ⎠ RF +VOS – Ib – VOUT NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE Solving for the transfer function, 2π × f CROSSOVER (RG + R F ) VO = (RF + RG )S + 2π × f CROSSOVER × RG VI (4) ⎛ RG + R F ⎞ ⎟ ⎜ ⎟ ⎜R G ⎠ ⎝ (10) where fCROSSOVER is the frequency where the amplifier’s open-loop gain equals 0 dB. At dc RG VO RF + RG = VI RG (5) VIN RS A Ib+ Figure 41. Voltage Feedback Amplifier’s DC Errors Rev. 0 | Page 13 of 24 07756-047 ADA4817-1/ADA4817-2 The voltage error due to Ib+ and Ib– is minimized if RS = RF || RG (though with the ADA4817-1/ADA4817-2 input currents in the picoamp range, this is likely not a concern). To include commonmode effects and power supply rejection effects, total VOS can be modeled by If this pole occurs too close to the unity-gain crossover point, the phase margin degrades. This is due to the additional phase loss associated with the pole. Note that such capacitance introduces significant peaking in the frequency response. Larger capacitance values can be driven but must use a snubbing resistor (RSNUB) at the output of the amplifier, as shown in Figure 42. Adding a small series resistor, RSNUB, creates a zero that cancels the pole introduced by the load capacitance. Typical values for RSNUB can range from 10 Ω to 50 Ω. The value is typically based on the circuit requirements. Figure 42 also shows another way to reduce the effect of the pole created by the capacitive load (CL) by placing a capacitor (CF) in the feedback loop parallel to the feedback resistor Typical capacitor values can range from 0.5 pF to 2 pF. Figure 43 shows the effect of adding a feedback capacitor to the frequency response. +VS 10µF VOS = VOS nom + Δ VS Δ VCM + PSR CMR (11) where: VOSnom is the offset voltage specified at nominal conditions. ΔVS is the change in power supply from nominal conditions. PSR is the power supply rejection. ΔVCM is the change in common-mode voltage from nominal conditions. CMR is the common-mode rejection. WIDEBAND OPERATION The ADA4817-1/ADA4817-2 provides excellent performance as a high speed buffer. Figure 38 shows the circuit used for wideband characterization for high gains. The impedance at the summing junction (RF || RG) forms a pole in the amplifier’s loop response with the amplifier’s input capacitance of 1.5 pF. This pole can cause peaking and ringing if its frequency is too low. Feedback resistances of 100 Ω to 400 Ω are recommended, because they minimize the peaking and they do not degrade the performance of the output stage. Peaking in the frequency response can also be compensated for with a small feedback capacitor (CF) in parallel with the feedback resistor, or a series resistor in the noninverting input as shown in Figure 42. The distortion performance depends on a number of variables: • • • • • The closed-loop gain of the application Whether it is inverting or noninverting Amplifier loading Signal frequency and amplitude Board layout + CF RG RF 0.1µF VIN 49.9Ω 10µF RSNUB 0.1µF VOUT CL RL + –VS Figure 42. RSNUB or CF Used to Reduce Peaking THERMAL CONSIDERATIONS With 10 V power supplies and 19 mA quiescent current, the ADA4817-1/ADA4817-2 dissipate 190 mW with no load. This implies that in the LFCSP, whose thermal resistance is 94°C/W for the ADA4817-1and 64°C/W for the ADA4817-2, the junction temperature is typically almost 25° higher than the ambient temperature. The ADA4817-1/ADA4817-2 are designed to maintain a constant bandwidth over temperature; therefore, an initial ramp up of the current consumption during warm-up is expected. The VOS temperature drift is below 12 μV/°C; therefore, it can change up to 0.3 mV due to warm-up effects for an ADA4817-1/ ADA4817-2 in a LFCSP on 10 V. The input bias current increases by a factor of 1.7 for every 10°C rise in temperature. Heavy loads increase power dissipation and raise the chip junction temperature as described in the Absolute Maximum Ratings section. Care should be taken not to exceed the rated power dissipation of the package. The best performance is usually obtained in the G + 1 configuration with no feedback resistance, big output load resistors, and small board parasitic capacitances. DRIVING CAPACITIVE LOADS In general, high speed amplifiers have a difficult time driving capacitive loads. This is particularly true in low closed-loop gains, where the phase margin is the lowest. The difficulty arises because the load capacitance, CL, forms a pole with the output resistance, RO, of the amplifier. The pole can be described by the following equation: fP = 1 2πRO C L (12) Rev. 0 | Page 14 of 24 07756-143 0.1µF ADA4817-1/ADA4817-2 POWER-DOWN OPERATION The ADA4817-1/ADA4817-2 are equipped with separate power-down pins (PD) pins for each amplifier. This allows the user the ability to reduce the quiescent supply current when an amplifier is inactive from 2 mA to 19 mA. The power-down threshold levels are derived from the voltage applied to the +VS pin. In ±5 V supply application, the enable voltage is greater than +4 V, and in a ±3 V supply application, the enable voltage is greater than +2 V. However, the amplifier is powered down whenever the voltage applied to the PD pin is 3 V below +VS. If the PD pin is not to be used, it is best to connect it to the positive supply. Table 7. Power-Down Voltage Control PD Pin Not active Active ±5 V >4 V 2 V