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ADA4938-1_07

ADA4938-1_07

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    ADA4938-1_07 - Ultra-Low Distortion Differential ADC Driver - Analog Devices

  • 数据手册
  • 价格&库存
ADA4938-1_07 数据手册
Preliminary Technical Data FEATURES Extremely low harmonic distortion −112 dBc HD2 @ 10 MHz −79 dBc HD2 @ 50 MHz −102 dBc HD3 @ 10 MHz −81 dBc HD3 @ 50 MHz Low input voltage noise: 2.2 nV/√Hz High speed −3 dB bandwidth of 1.5 GHz, G = 1 Slew rate: 4700 V/μs 0.1 dB gain flatness to 125 MHz Fast overdrive recovery of 4 ns 1 mV typical offset voltage Externally adjustable gain Differential to differential or single-ended to differential operation Adjustable output common-mode voltage Wide Supply Voltage Range: +5 V & ± 5 V Pb-free 3 mm x 3 mm LFCSP package Ultra-Low Distortion Differential ADC Driver ADA4938-1 FUNCTIONAL BLOCK DIAGRAM + – Figure 1. APPLICATIONS ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Differential buffers Line drivers GENERAL DESCRIPTION The ADA4938-1 is a low noise, ultra-low distortion, high speed differential amplifier. It is an ideal choice for driving high performance ADCs with resolutions up to 16 bits from dc to 70 MHz. The output common mode voltage is adjustable over a wide range, allowing the ADA4938-1 to match the input of the ADC. The internal common mode feedback loop also provides exceptional output balance as well as suppression of even-order harmonic distortion products. Full differential and single-ended to differential gain configurations are easily realized with the ADA4938-1. A simple external feedback network of four resistors determines the amplifier’s closed-loop gain. The ADA4938-1 is fabricated using ADI’s proprietary third generation high-voltage XFCB process, enabling it to achieve very low levels of distortion with input voltage noise of only 2.2 nV/√Hz. The low dc offset and excellent dynamic performance of the ADA4938-1 make it well suited for a wide variety of data acquisition and signal processing and applications. The ADA4938-1 is available in a Pb-free, 3 mm x 3mm lead frame chip scale package (LFCSP). Pinout has been optimized to facilitate layout and minimize distortion. The part is specified to operate over the extended industrial temperature range of −40°C to +85°C. Rev. PrD Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. ADA4938-1 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Dual Supply Operation ................................................................ 3 Single Supply Operation.............................................................. 5 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Operational Description.................................................................. 9 Preliminary Technical Data Definition of Terms.......................................................................9 Theory of Operation ...................................................................... 10 Analyzing an Application Circuit ............................................ 10 Setting the Closed-Loop Gain .................................................. 10 Estimating the Output Noise Voltage ...................................... 10 The Impact of Mismatches in the Feedback Networks ......... 11 Calculating the Input Impedance of an Application Circuit 11 Input Common-Mode Voltage Range in Single-Supply Applications ................................................................................ 11 Setting the Output Common-Mode Voltage .......................... 11 Layout, Grounding, and Bypassing.............................................. 13 Outline Dimensions ....................................................................... 14 Ordering Guide .......................................................................... 14 REVISION HISTORY 05/07—Rev. PrC to Rev. PrD Changes to Features.......................................................................... 1 Changes to Figure 1.......................................................................... 1 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 Changes to Figure 3.......................................................................... 8 Changes to Table 5 ........................................................................... 8 Added to Operational Description Section .................................. 9 Added to Theory of Operation Section ....................................... 10 Added to Layout, Grounding, and Bypassing Section............... 13 04/07—Rev. PrB to Rev. PrC Changes to Features.......................................................................... 1 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 Changes to Table 3............................................................................ 7 Changes to Table 4............................................................................ 7 Added Figure 2 ................................................................................. 7 Changes to Figure 4.......................................................................... 9 Changes to Ordering Guide ............................................................ 9 01/07—Rev. PrA to Rev. PrB Changes to Features.......................................................................... 1 Changes to General Description .................................................... 1 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 12/06—Revision PrA: Initial Version Rev. PrD | Page 2 of 14 Preliminary Technical Data SPECIFICATIONS DUAL SUPPLY OPERATION TA = 25°C, +VS = 5 V, −VS = -5 V, VOCM = 0 V, RT = 61.9 Ω, RG = RF = 200 Ω, G = 1, RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 1. Parameter ±DIN TO ±OUT PERFORMANCE DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Slew Rate Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Third Harmonic IMD IP3 Voltage Noise (RTI) Noise Figure Input Current Noise INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current Output Balance Error VOCM to ±OUT PERFORMANCE VOCM DYNAMIC PERFORMANCE −3 dB Bandwidth Slew Rate Input Voltage Noise (RTI) VOCM INPUT CHARACTERISTICS Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range TMIN to TMAX variation Differential Common mode Conditions Min Typ ADA4938-1 Max Unit VOUT = 0.1 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 4 V p-p, Differential Input VOUT = 2 V p-p VIN = 5 V to 0 V step, G = +2 VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 50 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 50 MHz 50 MHz 50 MHz G = +2 1500 125 1300 800 4700 4 −112 −79 −102 −81 MHz MHz MHz MHz V/μs ns dBc dBc dBc dBc dBc dBm nV/√Hz dB pA/√Hz mV μV/°C μA μA/°C MΩ MΩ pF V dB 3.9 V mA dB 2.2 21 2 1 ±4 3.5 −0.01 6 3 1 −4.7 to 3.4 −77 -3.9 95 −66 VOS, dm = VOUT, dm/2; VDIN+ = VDIN− = 0 V TMIN to TMAX variation ∆VOUT, dm/∆VIN, cm; ∆VIN, cm = ±1 V Maximum ∆VOUT; single-ended output ∆VOUT, cm/∆VOUT, dm; ∆VOUT, dm = 1 V; 10 MHz 400 1700 7.5 −3.8 VOS, cm = VOUT, cm; VDIN+ = VDIN– = 0 V ∆VOUT, dm/∆VOCM; ∆VOCM = ±1 V ∆VOUT, cm/∆VOCM; ∆VOCM = ±1 V 4.5 Rev. PrD | Page 3 of 14 MHz V/μs nV/√Hz 3.8 V kΩ mV μA dB V/V V 200 1 0.5 −75 1 3.5 11 ADA4938-1 Parameter Quiescent Current Conditions TMIN to TMAX variation Powered down ∆VOUT, dm/∆VS; ∆VS = ±1 V Powered down Enabled Preliminary Technical Data Min Typ 40 40
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