ADA4945-1ACPZ-R2

High Speed, ±0.1 μV/˚C Offset Drift, Fully Differential ADC Driver ADA4945-1 Data Sheet FUNCTIONAL BLOCK DIAGRAM 13 –VCLAMP –FB 1 12 DISABLE +IN 2 11 –OUT –IN 3 10 +OUT VOCM +VCLAMP 8 9 +VS 7 +FB 4 NOTES 1. CONNECT THE EXPOSED PAD TO –VS. 16932-001 14 –VS 15 –VS 16 DGND ADA4945-1 +VS 6 Broad power supply range: 3 V to 10 V Wide input common-mode voltage range: −VS to +VS − 1.3 V Rail-to-rail output Fully specified dual power mode operation 4 mA full power mode (145 MHz) 1.4 mA low power mode (80 MHz) Full power mode Low harmonic distortion −133 dBc HD2 and −140 dBc HD3 at 1 kHz −133 dBc HD2 and −116 dBc HD3 at 100 kHz Fast settling time 18-bit: 100 ns 16-bit: 50 ns Input voltage noise: 1.8 nV/√Hz, f = 100 kHz ±115 μV maximum offset voltage from −40°C to +125°C Adjustable output clamps for ADC input protection MODE 5 FEATURES Figure 1. APPLICATIONS Low power Σ-Δ, PulSAR®, and SAR ADC drivers Single-ended to differential converters Differential buffers Medical imaging Process control Portable electronics GENERAL DESCRIPTION The ADA4945-1 is a low noise, low distortion, fully differential amplifier with two selectable power modes. The device operates over a broad power supply range of 3 V to 10 V. The low dc offset, dc offset drift, and excellent dynamic performance of the ADA4945-1 makes it well suited for a variety of data acquisition and signal processing applications. The device is an ideal choice for driving high resolution, high performance successive approximation register (SAR) and Σ-Δ analog-to-digital converters (ADCs) on 4 mA of quiescent current (full power mode). The device can also be selected to operate on 1.4 mA of quiescent current (low power mode) to scale the power consumption to the desired performance necessary for an ADC drive application. The adjustable common-mode voltage allows the ADA4945-1 to match the input common-mode voltage of multiple ADCs. The internal common-mode feedback loop Rev. 0 provides exceptional output balance, as well as suppression of even order harmonic distortion products. With the ADA4945-1, differential gain configurations are achieved with a simple external feedback network of four resistors determining the closed-loop gain of the amplifier. The ADA4945-1 is fabricated using Analog Devices, Inc., proprietary, silicon germanium (SiGe), complementary bipolar process, enabling the device to achieve low levels of distortion with an input voltage noise of only 1.8 nV/√Hz (full power mode). The ADA4945-1 is available in a RoHS-compliant, 3 mm × 3 mm, 16-lead LFCSP. The ADA4945-1 is specified to operate from −40°C to +125°C. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4945-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Fully Differential and Common-Mode Signal Paths ............. 35 Applications ....................................................................................... 1 Output Voltage Clamp ............................................................... 36 Functional Block Diagram .............................................................. 1 Power Modes ............................................................................... 36 General Description ......................................................................... 1 Applications Information .............................................................. 37 Revision History ............................................................................... 2 Analyzing an Application Circuit ............................................ 37 Specifications..................................................................................... 3 Setting the Closed-Loop Gain .................................................. 37 Supply Voltage (VS) = 10 V ......................................................... 3 Estimating the Output Noise Voltage ...................................... 37 VS = 5 V.......................................................................................... 7 Impact of Mismatches in the Feedback Networks ................. 38 VS = 3 V........................................................................................ 11 Calculating the Input Impedance of an Application Circuit ..... 38 Absolute Maximum Ratings.......................................................... 15 Input Common-Mode Voltage Range ..................................... 40 Thermal Resistance .................................................................... 15 Input and Output Capacitive AC Coupling ............................ 40 Maximum Power Dissipation ................................................... 15 Setting the Output Common-Mode Voltage .......................... 40 ESD Caution ................................................................................ 15 Disable Pin .................................................................................. 40 Pin Configuration and Function Descriptions ........................... 16 Driving a Capacitive Load......................................................... 40 Typical Performance Characteristics ........................................... 17 Output Clamps ........................................................................... 41 Full Power Mode .......................................................................... 17 Driving a High Precision ADC ................................................ 42 Low Power Mode ........................................................................ 25 Layout, Grounding, and Bypassing .............................................. 43 Test Circuits ..................................................................................... 33 Outline Dimensions ....................................................................... 44 Terminology .................................................................................... 34 Ordering Guide .......................................................................... 44 Theory of Operation ...................................................................... 35 REVISION HISTORY 4/2019—Revision 0: Initial Version Rev. 0 | Page 2 of 44 Data Sheet ADA4945-1 SPECIFICATIONS SUPPLY VOLTAGE (VS) = 10 V Output common-mode voltage (VOCM) = midsupply, Gain (G) = 1, feedback resistance (RF) = gain resistance (RG) = 499 Ω, differential load resistance (RL, dm) = 1 kΩ, and TA = 25°C, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 98 for circuit definitions. Positive Input (+DIN) or Negative Input (–DIN) to Differential Output Voltage (VOUT, dm) Performance Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Settling Time Input Overdrive Recovery Output Overdrive Recovery NOISE/HARMONIC PERFORMANCE Second Harmonic Distortion (HD2) Third Harmonic Distortion (HD3) Input Voltage Noise Differential Common Mode Test Conditions/Comments Min Full Power Mode Typ Max Min Low Power Mode Typ Max Unit VOUT, dm = 20 mV p-p, G = 1 145 80 MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 20 mV p-p, G = 5 VOUT, dm = 2 V p-p, G = 1 95 40 60 40 17 18 MHz MHz MHz VOUT, dm = 2 V p-p, G = 2 VOUT, dm = 2 V p-p, G = 5 VOUT, dm = 20 mV p-p, G = 1 54 52 28 40 16 27 MHz MHz MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 8 V step VOUT, dm = 8 V step 16-bit 18-bit G = 1, differential input voltage (VIN, dm) = 10 V p-p, triangular waveform G = 10, VOUT, dm = 22 V p-p, triangular waveform VOUT, dm = 8 V p-p 20 600 35 50 100 500 7 100 85 150 300 300 MHz V/µs ns ns ns ns 200 120 ns Center frequency (fC) = 1 kHz fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz fC = 1 kHz −133 −133 dBc −133 −128 −95 −140 −133 −128 −68 −138 dBc dBc dBc dBc fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz −116 −123 −88 −116 −122 −62 dBc dBc dBc Frequency under test f = 10 Hz f = 100 kHz 1/f corner frequency f = 10 Hz f = 100 kHz 1/f corner frequency 5 1.8 100 350 30 1000 7 3 40 284 38 1000 nV/√Hz nV/√Hz Hz nV/√Hz nV/√Hz nV/√Hz Rev. 0 | Page 3 of 44 ADA4945-1 Parameter Integrated Voltage Noise Input Current Noise INPUT CHARACTERISTICS Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift Input Common-Mode Voltage (VCM) Range Input Resistance Input Capacitance Common-Mode Rejection Ratio (CMRR) Open-Loop Gain OUTPUT CHARACTERISTICS Output Voltage Swing Data Sheet Test Conditions/Comments 0.1 Hz to 10 Hz Full Power Mode Typ Max 35 Min Low Power Mode Typ Max 25 11 1.0 2000 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 µV µV µV µV/°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±0.2 −1.2 −1.5 −1.8 −10 −10 ±20 ±25 ±40 ±0.1 ±1.0 −2.5 −3.0 −3.4 −50 −50 ±200 ±250 ±300 ±0.6 ±0.2 −0.5 −0.6 −0.7 −10 −10 ±10 ±20 ±25 ±0.06 ±1.0 −0.8 −1.0 −1.2 −50 −50 ±130 ±150 ±200 ±0.38 µV/°C µA µA µA nA/°C nA/°C nA nA nA nA/°C TA = −40°C to +125°C ±0.12 ±0.7 +VS − 1.3 ±0.07 ±0.4 +VS − 1.3 nA/°C V −VS Differential Common mode VCM = 0.5 V to 9 V Output voltage (VOUT) = ±4 V Load resistance (RL) = 100 Ω for each singleended output RL = 1 kΩ f = 100 kHz, ΔVOUT, cm/ΔVOUT, dm 4 0.6 1000 Unit nV rms f = 10 Hz f = 100 kHz 1/f corner frequency Short-Circuit Current Output Balance Error Min −VS pA/√Hz pA/√Hz Hz 50 50 1 −110 50 50 1 −110 kΩ MΩ pF dB 120 115 dB −VS + 0.55 −VS + 0.1 +VS − 0.55 −VS + 0.55 +VS − 0.1 −VS + 0.1 170 140 100 100 Rev. 0 | Page 4 of 44 +VS − 0.55 V +VS − 0.1 V mA peak dB Data Sheet ADA4945-1 VOCM to Common-Mode Output Voltage (VOUT, cm) Performance Table 2. Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Gain VOCM CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift CMRR Test Conditions/Comments Min Full Power Mode Typ Max Min Low Power Mode Typ Max Unit VOUT, cm = 20 mV p-p 35 15 MHz VOUT, cm = 2 V p-p 3.8 1.3 MHz VOUT, cm = 2 V p-p f = 100 kHz ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V 26 35 1 9 45 1 1.01 V/µs nV/√Hz V/V +VS − 1.4 V 0.99 −VS + 0.4 1.01 0.99 +VS − 1.4 −VS + 0.4 125 125 kΩ Common mode offset (VOS, cm) = VOUT, cm − VOCM, positive input (VIP) = negative input (VIN) = VOCM = 0 V 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±5 ±10 ±20 ±5 TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±10 −220 −300 −350 −1.3 ±10 −160 −205 −230 −0.75 µV/°C µA µA µA µA/°C TA = −40°C to +125°C ΔVOS, dm/ΔVOCM, ΔVOCM = ±1 V −1.5 −130 −1.0 −130 µA/°C dB Rev. 0 | Page 5 of 44 ±60 ±5 ±10 ±20 ±5 ±60 mV mV mV µV/°C ADA4945-1 Data Sheet General Performance Table 3. Parameter CLAMP Clamp Output Voltage Full Power Mode Typ Max Test Conditions/Comments Min Differential Common mode −VS − 0.5 −VS Recovery Time Input Resistance DISABLE (DISABLE PIN) MODE Input Voltage Turn Off Time Turn On Time DISABLE Pin Bias Current Enabled Disabled DGND PIN VOLTAGE RANGE POWER SUPPLY Operating Range Quiescent Current Enabled Disabled Positive Power Supply Rejection Ratio (+PSRR) Negative Power Supply Rejection Ratio (−PSRR) OPERATING TEMPERATURE RANGE Resistance between +VCLAMP and −VCLAMP Disabled Enabled Quiescent current 90% of final VOUT ΔVOS, dm/ΔVS, ΔVS = 1 V p-p Low Power Mode Typ Max 100 100 480 480 kΩ DGND + 1 VS + 0.3 −VS − 0.5 −VS +VS + 0.5 +VS Unit V V ns −VS – 0.3 DGND + 1.4 DISABLE = 10 V DISABLE = 0 V Full power mode, MODE = +VS Low power mode, MODE = −VS Full power mode, MODE = +VS Low power mode, MODE = −VS ΔVOS, dm/ΔVS, ΔVS = 1 V p-p +VS + 0.5 +VS Min −VS – 0.3 DGND + 1.4 DGND + 1 VS + 0.3 6 6 V V µs 1.2 2 µs 50 50 50 50 nA nA −VS +VS – 2.5 –VS +VS – 2.5 V 3 10 3 10 V 4 4.2 60 70 1.4 1.6 60 −120 70 −120 −120 −120 −40 Rev. 0 | Page 6 of 44 +125 −40 mA mA µA µA dB dB +125 °C Data Sheet ADA4945-1 VS = 5 V VOCM = midsupply, G = 1, RF = RG = 499 Ω, RL, dm = 1 kΩ, TA = 25°C, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 98 for circuits definitions. +DIN or –DIN to VOUT, dm Performance Table 4. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Settling Time Input Overdrive Recovery Output Overdrive Recovery NOISE/HARMONIC PERFORMANCE HD2 HD3 Input Voltage Noise Differential Common Mode Integrated Voltage Noise Input Current Noise Test Conditions/Comments Min Full Power Mode Typ Max Min Low Power Mode Typ Max Unit VOUT, dm = 20 mV p-p, G = 1 145 80 MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 20 mV p-p, G = 5 VOUT, dm = 2 V p-p, G = 1 95 40 60 40 17 18 MHz MHz MHz VOUT, dm = 2 V p-p, G = 2 VOUT, dm = 2 V p-p, G = 5 VOUT, dm = 20 mV p-p, G = 1 54 52 28 40 16 27 MHz MHz MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 8 V step VOUT, dm = 8 V step 16-bit 18-bit G = 1, VIN, dm = 10 V p-p, triangular waveform G = 2, VOUT, dm = 12 V p-p, triangular waveform VOUT, dm = 8 V p-p 20 600 35 50 100 300 7 100 85 150 300 500 MHz V/µs ns ns ns ns 145 80 ns −133 dBc −133 −128 −95 −140 −116 −123 −88 −133 −128 −68 −138 −116 −122 −62 dBc dBc dBc dBc dBc dBc dBc f = 10 Hz f = 100 kHz 1/f corner frequency f = 10 Hz f = 100 kHz 1/f corner frequency 0.1 Hz to 10 Hz 5 1.8 100 350 30 1000 35 7 3 40 284 38 1000 25 nV/√Hz nV/√Hz Hz nV/√Hz nV/√Hz nV/√Hz nV rms f = 10 Hz f = 100 kHz 1/f corner frequency 11 1.0 2000 4 0.6 1000 pA/√Hz pA/√Hz Hz Center frequency (fC) = 1 kHz fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz fC = 1 kHz fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz −133 Rev. 0 | Page 7 of 44 ADA4945-1 Parameter INPUT CHARACTERISTICS Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift Data Sheet Test Conditions/Comments Min Full Power Mode Typ Max Input Capacitance CMRR Open-Loop Gain OUTPUT CHARACTERISTICS Output Voltage Swing Unit ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 µV µV µV µV/°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±0.2 −1.2 −1.5 −1.8 −10 −10 ±20 ±25 ±40 ±0.1 ±1.0 −2.5 −3.0 −3.4 −50 −50 ±200 ±250 ±300 ±0.6 ±0.2 −0.5 −0.6 −0.7 −10 −10 ±10 ±20 ±25 ±0.06 ±1.0 −0.8 −1.0 −1.2 −50 −50 ±130 ±150 ±200 ±0.38 µV/°C µA µA µA nA/°C nA/°C nA nA nA nA/°C ±0.12 ±0.7 +VS − 1.3 ±0.07 ±0.4 +VS − 1.3 nA/°C V kΩ MΩ pF dB dB +VS − 0.55 V +VS − 0.1 V mA peak dB −VS Differential Common mode RL = 100 Ω RL = 1 kΩ f = 100 kHz, ΔVOUT, cm/ΔVOUT, dm −VS 50 50 1 −110 120 VCM = 0.5 V to 9 V VOUT = ±4 V Short-Circuit Current Output Balance Error Low Power Mode Typ Max 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C VCM Range Input Resistance Min −VS + 0.55 −VS + 0.1 50 50 1 −110 115 +VS − 0.55 −VS + 0.55 +VS − 0.1 −VS + 0.1 170 140 100 100 Rev. 0 | Page 8 of 44 Data Sheet ADA4945-1 VOCM to VOUT, cm Performance Table 5. Full Power Mode Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Gain VOCM CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift CMRR Test Conditions/Comments VOUT, cm = 20 mV p-p VOUT, cm = 2 V p-p VOUT, cm = 2 V p-p f = 100 kHz ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V Min Typ 0.99 35 3.8 26 35 1 −VS + 0.4 Max Min Typ 1.01 0.99 15 1.3 9 45 1 +VS − 1.4 −VS + 0.4 125 VOS, cm = VOUT, cm − VOCM, VIP = VIN = VOCM = 0 V 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C ΔVOS, dm/ΔVOCM, ΔVOCM = ±1 V ±10 ±10 ±20 ±5 ±10 −220 −300 −350 −1.3 −1.5 −130 Rev. 0 | Page 9 of 44 Low Power Mode Max Unit 1.01 MHz MHz V/µs nV/√Hz V/V +VS − 1.4 V 125 ±60 ±10 ±10 ±20 ±5 ±10 −160 −205 −230 −0.75 −1.0 −130 kΩ ±60 mV mV mV µV/°C µV/°C µA µA µA µA/°C µA/°C dB ADA4945-1 Data Sheet General Performance Table 6. Parameter CLAMP Clamp Output Voltage Full Power Mode Typ Max Test Conditions/Comments Min Differential Common mode −VS − 0.5 −VS Recovery Time Input Resistance DISABLE (DISABLE PIN) MODE Input Voltage Turn Off Time Turn On Time DISABLE Pin Bias Current Enabled Disabled DGND PIN VOLTAGE RANGE POWER SUPPLY Operating Range Quiescent Current Enabled Disabled +PSRR −PSRR OPERATING TEMPERATURE RANGE Resistance between +VCLAMP and −VCLAMP Disabled Enabled Quiescent current 90% of final VOUT +VS + 0.5 +VS Low Power Mode Typ Max 100 100 480 480 kΩ DGND + 1 +VS + 0.3 −VS − 0.5 −VS +VS + 0.5 +VS Unit V V ns −VS – 0.3 DGND + 1.4 DISABLE = 5 V DISABLE = 0 V Min −VS – 0.3 DGND + 1.4 DGND + 1 +VS + 0.3 6 6 V V µs 1.2 2 µs 50 50 50 50 nA nA –VS +VS – 2.5 –VS +VS – 2.5 V 3 10 3 10 V Full power mode, MODE = +VS Low power mode, MODE = −VS Full power mode, MODE = +VS Low power mode, MODE = −VS ΔVOS, dm/ΔVS, ΔVS = 1 V p-p ΔVOS, dm/ΔVS, ΔVS = 1 V p-p 4 60 4.2 Rev. 0 | Page 10 of 44 1.6 60 −120 −120 70 70 −120 −120 −40 1.4 +125 −40 +125 mA mA µA µA dB dB °C Data Sheet ADA4945-1 VS = 3 V VOCM = midsupply, G = 1, RF = RG = 499 Ω, RL, dm = 1 kΩ, TA = 25°C, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 98 for circuit definitions. +DIN or –DIN to VOUT, dm Performance Table 7. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Settling Time Input Overdrive Recovery Output Overdrive Recovery NOISE/HARMONIC PERFORMANCE HD2 HD3 Input Voltage Noise Differential Common Mode Integrated Voltage Noise Input Current Noise Test Conditions/Comments Min Full Power Mode Typ Max Min Low Power Mode Typ Max Unit VOUT, dm = 20 mV p-p, G = 1 145 80 MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 20 mV p-p, G = 5 VOUT, dm = 2 V p-p, G = 1 95 40 22 40 17 11 MHz MHz MHz VOUT, dm = 20 mV p-p, G = 1 28 27 MHz VOUT, dm = 20 mV p-p, G = 2 VOUT, dm = 4 V step VOUT, dm = 4 V step 16-bit 18-bit G = −1, VIN, dm = 3 V p-p, triangular waveform G = 2, VOUT, dm = 6 V p-p, triangular waveform VOUT, dm = 4 V p-p 20 600 35 50 100 500 7 100 85 150 300 300 MHz V/µs ns ns ns ns 200 120 ns fC = 1 kHz fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz fC = 1 kHz fC = 100 kHz fC = 100 kHz, G = 2 fC = 1 MHz −133 −133 −128 −95 −140 −116 −123 −88 −133 −133 −128 −68 −138 −116 −122 −62 dBc dBc dBc dBc dBc dBc dBc dBc f = 10 Hz f = 100 kHz 1/f corner frequency f = 10 Hz f = 100 kHz 1/f corner frequency 0.1 Hz to 10 Hz 5 1.8 100 350 30 1000 35 7 3 40 284 38 1000 25 nV/√Hz nV/√Hz Hz nV/√Hz nV/√Hz nV/√Hz nV rms f = 10 Hz f = 100 kHz 1/f corner frequency 11 1.0 2000 4 0.6 1000 pA/√Hz pA/√Hz Hz Rev. 0 | Page 11 of 44 ADA4945-1 Parameter INPUT CHARACTERISTICS Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift Data Sheet Test Conditions/Comments Min Full Power Mode Typ Max Input Capacitance CMRR Open-Loop Gain OUTPUT CHARACTERISTICS Output Voltage Swing Short-Circuit Current Output Balance Error Low Power Mode Typ Max Unit 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 ±10 ±15 ±30 ±0.1 ±50 ±80 ±115 ±0.5 µV µV µV µV/°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C ±0.2 −1.2 −1.5 −1.8 −10 −10 ±20 ±25 ±40 ±0.1 ±1.0 −2.5 −3.0 −3.4 −50 −50 ±200 ±250 ±300 ±0.6 ±0.2 −0.5 −0.6 -0.7 −10 −10 ±10 ±20 ±25 ±0.06 ±1.0 −0.8 −1.0 −1.2 −50 −50 ±130 ±150 ±200 ±0.38 µV/°C µA µA µA nA/°C nA/°C nA nA nA nA/°C ±0.12 ±0.7 +VS − 1.3 ±0.07 ±0.4 +VS − 1.3 nA/°C V kΩ MΩ pF dB dB +VS − 0.55 +VS − 0.1 V V mA peak dB TA = −40°C to +125°C VCM Range Input Resistance Min −VS Differential Common mode 50 50 1 −110 120 VCM = 0.5 V to 9 V VOUT = ±4 V RL = 100 Ω RL = 1 kΩ f = 100 kHz, ΔVOUT, cm/ΔVOUT, dm −VS −VS + 0.55 −VS + 0.1 50 50 1 −110 115 +VS − 0.55 +VS − 0.1 170 100 Rev. 0 | Page 12 of 44 −VS + 0.55 −VS + 0.1 140 100 Data Sheet ADA4945-1 VOCM to VOUT, cm Performance Table 8. Full Power Mode Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Gain VOCM CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift CMRR Test Conditions/Comments VOUT, cm = 20 mV p-p VOUT, cm = 2 V p-p VOUT, cm = 2 V p-p f = 100 kHz ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V Min Typ 0.99 35 3.8 26 35 1 −VS + 0.4 Max Min Typ 1.01 0.99 15 1.3 9 45 1 +VS − 1.4 −VS + 0.4 125 VOS, cm = VOUT, cm − VOCM, VIP = VIN = VOCM = 0 V 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 25°C TA = 20°C to 85°C TA = −40°C to +125°C TA = 20°C to 85°C TA = −40°C to +125°C ΔVOS, dm/ΔVOCM, ΔVOCM = ±1 V ±10 ±10 ±20 ±5 ±10 −220 −300 −350 −1.3 −1.5 −130 Rev. 0 | Page 13 of 44 Low Power Mode Max Unit 1.01 MHz MHz V/µs nV/√Hz V/V +VS − 1.4 V 125 ±60 ±10 ±10 ±20 ±5 ±10 −160 −205 −230 −0.75 −1.0 −130 kΩ ±60 mV mV mV µV/°C µV/°C µA µA µA µA/°C µA/°C dB ADA4945-1 Data Sheet General Performance Table 9. Parameter CLAMP Clamp Output Voltage Full Power Mode Typ Max Test Conditions/Comments Min Differential Common mode −VS − 0.5 −VS Recovery Time Input Resistance DISABLE (DISABLE PIN) MODE Input Voltage Turn Off Time Turn On Time DISABLE Pin Bias Current Enabled Disabled DGND PIN VOLTAGE RANGE POWER SUPPLY Operating Range Quiescent Current Enabled Disabled +PSRR −PSRR OPERATING TEMPERATURE RANGE Resistance between +VCLAMP and −VCLAMP Disabled Enabled Quiescent current 90% of final VOUT +VS + 0.5 +VS Low Power Mode Typ Max 100 100 480 480 kΩ DGND + 1 +VS + 0.3 −VS − 0.5 −VS +VS + 0.5 +VS Unit V V ns −VS – 0.3 DGND + 1.4 DISABLE = 3 V DISABLE = 0 V Min –VS – 0.3 DGND + 1.4 DGND + 1 +VS + 0.3 6 6 V V µs 1.2 2 µs 50 50 50 50 nA nA −VS +VS – 2.5 –VS +VS – 2.5 V 3 10 3 10 V Full power mode, MODE = +VS Low power mode, MODE = −VS Full power mode, MODE = +VS Low power mode, MODE = −VS ΔVOS, dm/ΔVS, ΔVS = 1 V p-p ΔVOS, dm/ΔVS, ΔVS = 1 V p-p 4 60 4.2 Rev. 0 | Page 14 of 44 1.6 60 −120 −120 70 70 −120 −120 −40 1.4 +125 −40 +125 mA mA µA µA dB dB °C Data Sheet ADA4945-1 Parameter Supply Voltage VOCM Differential Input Voltage Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Electrostatic Discharge (ESD) Field Induced Charged Device Model (FICDM) Human Body Model (HBM) Rating 11 V ±VS ±1 V −40°C to +125°C −65°C to +150°C 300°C 150°C 1250 V 4000 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θJA is the natural convection, junction to ambient, thermal resistance measured in a one cubic foot sealed enclosure. θJC is the junction to case thermal resistance. Table 11. Package Type CP-16-22 θJA 70 θJC 15 The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power dissipation is the voltage between the supply pins (±VS) times the quiescent current (IS). The load current consists of the differential and common-mode currents flowing to the load, as well as currents flowing through the external feedback networks and internal common-mode feedback loop. The internal resistor tap used in the common-mode feedback loop places a negligible differential load on the output. Consider RMS voltages and currents when dealing with ac signals. Airflow reduces θJA. In addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the θJA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead LFCSP (θJA = 70°C/W) package on a JEDEC standard 4-layer board. θJA values are approximations. 3.0 Unit °C/W MAXIMUM POWER DISSIPATION 2.5 2.0 1.5 1.0 0.5 0 –40 –20 0 20 40 60 80 AMBIENT TEMPERATURE (°C) 100 120 16932-003 Table 10. MAXIMUM SAFE POWER DISSIPATION (W) ABSOLUTE MAXIMUM RATINGS Figure 2. Maximum Safe Power Dissipation vs. Ambient Temperature The maximum safe power dissipation in the ADA4945-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of ADA4945-1. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. ESD CAUTION Rev. 0 | Page 15 of 44 ADA4945-1 Data Sheet 13 –VCLAMP 14 –VS 15 –VS 16 DGND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 11 –OUT 10 +OUT 9 VOCM +VCLAMP 8 MODE 5 +FB 4 TOP VIEW (Not to Scale) +VS 7 –IN 3 12 DISABLE ADA4945-1 +VS 6 +IN 2 NOTES 1. EXPOSED PAD. CONNECT THE EXPOSED PAD TO –VS. 16932-005 –FB 1 Figure 3. Pin Configuration Table 12. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic −FB +IN −IN +FB MODE +VS +VS +VCLAMP VOCM +OUT −OUT DISABLE −VCLAMP −VS −VS DGND Exposed pad (EPAD) Description Negative Output for Feedback Component Connection. Positive Input Summing Node. Negative Input Summing Node. Positive Output for Feedback Component Connection. Selects Between Full Power Mode and Low Power Mode. Positive Supply Voltage. Positive Supply Voltage. Positive Clamp Level. Output Common-Mode Voltage. Positive Output for Load Connection. Negative Output for Load Connection. Disable Pin. Negative Clamp Level. Negative Supply Voltage. Negative Supply Voltage. Digital Ground Level. Exposed Pad. Connect the exposed pad to −VS. Rev. 0 | Page 16 of 44 Data Sheet ADA4945-1 TYPICAL PERFORMANCE CHARACTERISTICS TA = +25°C, VS = ±5 V, G = 1, RF = RG = 499 Ω, RT = 53.6 Ω (when used), and RL = 1 kΩ, unless otherwise noted. See Figure 94, Figure 95, Figure 96, and Figure 97 for the test circuits. FULL POWER MODE 3 1 1 0 –1 G = 2, RL = 1kΩ –2 –3 –4 –5 G = 2, RL = 100Ω –6 –7 G = 2, RL = 100Ω –3 –4 –5 –6 –8 1 10 100 1000 FREQUENCY (MHz) Figure 4. Small Signal Frequency Response for Various Gains and Loads VOUT, dm = 2V p-p 1 10 100 1000 FREQUENCY (MHz) Figure 7. Large Signal Frequency Response for Various Gains and Loads 3 VS = ±5V VS = ±2.5V VS = ±1.5V 2 1 1 0 –1 –1 –2 –2 GAIN (dB) 0 –3 –4 –3 –4 –5 –5 –6 –6 –7 –7 –8 VOUT, dm = 0.1V p-p 1 10 100 1000 FREQUENCY (MHz) VOUT, dm = 2V p-p –9 16932-008 –9 0.1 VS = ±5V VS = ±2.5V VS = ±1.5V 2 0.1 1 10 100 1000 FREQUENCY (MHz) 16932-011 3 Figure 8. Large Signal Frequency Response for Various Supplies Figure 5. Small Signal Frequency Response for Various Supplies 3 3 2 1 1 –40°C 0 –1 GAIN (dB) –2 –3 –4 –3 –4 –5 –6 –6 –7 –7 –8 VOUT, dm = 0.1V p-p 1 10 FREQUENCY (MHz) 100 1000 –9 0.1 16932-009 0.1 Figure 6. Small Signal Frequency Response for Various Temperatures +125°C –2 –5 –9 –40°C 0 +125°C –1 +25°C 2 +25°C VOUT, dm = 2V p-p 1 10 FREQUENCY (MHz) 100 1000 16932-012 GAIN (dB) G = 2, RL = 1kΩ –2 –9 0.1 16932-007 0.1 GAIN (dB) –1 16932-010 VOUT, dm = 0.1V p-p –9 –8 G = 1, RL = 100Ω 0 –7 –8 –8 G = 1, RL = 1kΩ 2 G = 1, RL = 100Ω NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 3 G = 1, RL = 1kΩ 2 Figure 9. Large Signal Frequency Response for Various Temperatures Rev. 0 | Page 17 of 44 ADA4945-1 Data Sheet 3 0.25 0.20 VOCM = 0V 1 NORMALIZED GAIN (dB) 0 VOCM = ±1V –2 –3 –4 –5 –6 G = 1, RL = 1kΩ 0.10 0.05 0 –0.05 G = 2, RL = 100Ω –0.10 G = 2, RL = 1kΩ –0.15 –7 –8 –0.20 VOUT, dm = 0.1V p-p 1 10 100 –0.25 16932-013 –9 0.1 1000 FREQUENCY (MHz) 3 0.1 1000 100 3 VOCM = 0V, ±1V 2 1 0 –1 –1 –2 –2 GAIN (dB) 0 –3 –4 –3 –4 –5 –5 –6 –6 –7 –7 –8 1 10 100 1000 FREQUENCY (MHz) VOUT, dm = 0.1V p-p –9 0.1 4 2 1 1 0 –1 –1 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF –4 GAIN (dB) 0 –3 CCOM1 = CCOM2 = 10pF –5 1000 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 3 2 –2 100 Figure 14. VOCM Small Signal Frequency Response CCOM1 = CCOM2 = 20pF 3 10 FREQUENCY (MHz) Figure 11. Large Signal Frequency Response at Various VOCM Levels 4 1 16932-017 –9 0.1 VOUT, dm = 2V p-p 16932-014 –8 GAIN (dB) 10 Figure 13. 0.1 dB Flatness Small Signal Frequency Response for Various Gains and Loads 1 –2 –3 –4 –5 –6 –6 –7 –7 CDIFF = 0pF VOUT = 0.1V p-p 1 CDIFF = 0pF VOUT = 2V p-p –8 10 100 FREQUENCY (MHz) 1000 –9 16932-015 –8 –9 1 FREQUENCY (MHz) Figure 10. Small Signal Frequency Response at Various VOCM Levels 2 VOUT, dm = 0.1V p-p Figure 12. Small Signal Frequency Response for Various Capacitive Loads 1 10 100 FREQUENCY (MHz) 1000 16932-018 GAIN (dB) –1 GAIN (dB) G = 1, RL = 100Ω 0.15 16932-016 2 Figure 15. Large Signal Frequency Response for Various Capacitive Loads Rev. 0 | Page 18 of 44 Data Sheet ADA4945-1 0.25 G = 1, RL = 100Ω 0.15 G = 1, RL = 1kΩ 0.10 G = 2, RL = 1kΩ 0.05 G = 2, RL = 100Ω INPUT OFFSET CURRENT (nA) 0 –0.05 –0.10 –0.15 VOUT, dm = 2V p-p NORMALIZED AT TA = 25°C 1 10 100 1000 FREQUENCY (MHz) 16932-019 –0.25 0.1 TEMPERATURE (°C) Figure 19. Input Offset Current vs. Temperature for 30 Devices Figure 16. 0.1 dB Flatness Large Signal Frequency Response for Various Gains and Loads –20 3 2 VOUT, dm = 8V p-p –40 HARMONIC DISTORTION (dBc) 1 0 –1 GAIN (dB) 16932-023 –0.20 –2 –3 –4 –5 –6 –7 –60 –80 HD2, HD3, –100 HD2, –120 –140 –8 VOUT, dm = 2V p-p 1 10 100 1000 FREQUENCY (MHz) –160 100 16932-021 –9 0.1 HD3, 1k 10k 100k 1M FREQUENCY (Hz) Figure 17. VOCM Large Signal Frequency Response 16932-086 NORMALIZED GAIN (dB) 0.20 Figure 20. Harmonic Distortion vs. Frequency for Various Loads –20 VOUT, dm = 8V p-p –60 –80 HD2, VS = ±5V –100 HD2, VS = ±2.5V –120 –140 TEMPERATURE (°C) 16932-022 NORMALIZED AT TA = 25°C –160 100 HD3, VS = ±2.5V HD3, VS = ±5V 1k 10k 100k 1M FREQUENCY (Hz) Figure 21. Harmonic Distortion vs. Frequency for Various Supplies Figure 18. Input Offset Voltage vs. Temperature for 50 Devices Rev. 0 | Page 19 of 44 16932-024 INPUT OFFSET VOLTAGE (µV) HARMONIC DISTORTION (dBc) –40 ADA4945-1 –20 VOUT, dm = 8V p-p HARMONIC DISTORTION (dBc) –40 –60 –80 HD2, G = 1 –100 HD2, G = 2 –120 –140 HD3, G = 1 –160 100 1k 10k 100k 1M FREQUENCY (Hz) –100 –120 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 25. Harmonic Distortion vs. Frequency for Various VOUT, dm –20 VOUT, dm = 2V p-p –40 f = 1kHz –40 HARMONIC DISTORTION (dBc) HARMONIC DISTORTION (dBc) –80 –160 Figure 22. Harmonic Distortion vs. Frequency for Various Gains –20 –60 VOUT, dm = 8V p-p VOUT, dm = 8V p-p VOUT, dm = 4V p-p VOUT, dm = 4V p-p VOUT, dm = 2V p-p VOUT, dm = 2V p-p –140 HD3, G = 2 16932-088 HARMONIC DISTORTION (dBc) –40 HD2 AT HD3 AT HD2 AT HD3 AT HD2 AT HD3 AT 16932-090 –20 Data Sheet –60 –80 –100 HD2 –120 –140 –60 VS = +3V, 0V HD3 VS = ±2.5V HD3 VS = ±2.5V HD2 –80 VS = ±5V HD3 –100 VS = +3V, 0V HD2 VS = ±5V HD3 –120 –140 –4 –3 –2 –1 0 1 2 3 4 5 VOCM (V) Figure 23. Harmonic Distortion vs. VOCM, f = 1 kHz, ±5 V Supplies –40 –40 HARMONIC DISTORTION (dBc) –20 –60 –80 –100 HD2 –140 –160 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 6 8 10 1.5 2.0 VOCM (V) Figure 24. Harmonic Distortion vs. VOCM, f = 1 kHz, ±2.5 V Supplies 12 14 16 18 20 VOUT, dm = 8V p-p –60 –80 –100 HD2, RF = RG = 499Ω HD3, RF = RG = 1kΩ –120 –140 HD3 VOUT, dm = 2V p-p 4 Figure 26. Harmonic Distortion vs. VOUT, dm for Various Supplies, f = 1 kHz –20 –120 2 0 VOUT, dm (V p-p) 2.5 –160 100 16932-104 HARMONIC DISTORTION (dBc) –160 HD3, RF = RG = 1kΩ HD3, RF = RG = 499Ω 1k 10k FREQUENCY (Hz) 100k 1M 16932-109 –5 16932-103 –160 16932-107 HD3 Figure 27. Harmonic Distortion vs. Frequency for Various RF and RG Values Rev. 0 | Page 20 of 44 Data Sheet ADA4945-1 OPEN-LOOP GAIN (dB) CMRR (dB) 90 80 70 60 40 0.1 1 10 100 FREQUENCY (MHz) 16932-025 50 30 15 0 –15 GAIN PHASE 1 10 100 1k 10k 100k 10M 100M 1G Figure 31. Open-Loop Gain and Phase vs. Frequency Figure 28. CMRR vs. Frequency –10 14 12 –20 10 G = +10 VOUT, dm 8 –30 OUTPUT VOLTAGE (V) OUTPUT BALANCE (dB) 1M –30 –45 –60 –75 –90 –105 –120 –135 –150 –165 –180 –195 –210 –225 –240 PHASE (Degrees) 100 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 –10 –20 –30 –40 16932-027 110 –40 –50 –60 6 4 10 × VIN 2 0 –2 –4 –6 –8 –10 –70 1 10 100 FREQUENCY (MHz) –14 16932-020 0.1 0 400 500 600 700 800 900 1000 Figure 32. Output Overdrive Recovery, G = 2 100 130 120 INPUT VOLTAGE NOISE (nV/√Hz) –PSRR 110 +PSRR 90 80 70 60 10 40 0.1 1 10 FREQUENCY (MHz) 100 Figure 30. PSRR vs. Frequency 1 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 33. Voltage Noise Spectral Density, Referred to Input Rev. 0 | Page 21 of 44 16932-099 50 16932-026 PSRR (dB) 300 TIME (ns) Figure 29. Output Balance vs. Frequency 100 200 100 16932-030 –12 –80 ADA4945-1 Data Sheet 100 CLOSED-LOOP OUTPUT IMPEDANCE MAGNITUDE (Ω) 1 100 10k 1k 100k 1M 10M FREQUENCY (Hz) 3.0 2 2.5 0 2.0 –2 –6 DISABLE 0.5 0 –4 0 0.2 0.4 0.6 0.8 1.0 1.2 TIME (µs) 1.4 OUTPUT VOLTAGE (V) 4 DISABLE PIN VOLTAGE (V) 3.5 –8 1.6 1.8 –10 2.0 8 7 1.0 6 0.9 5 0.8 4 0.7 3 0.6 2 0.5 0 –1 0.3 0.2 0.1 –3 0 –4 –0.1 –5 +OUT, VICM = 1V –0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 –6 1.6 –7 2.0 1.8 TIME (µs) Figure 38. DISABLE Pin Turn-On Time 100 6 0.3 80 %ERROR 0 0 –0.1 OUTPUT –4 –0.2 –6 –0.3 ERROR (%) 0.1 G G G G 60 0.2 OUTPUT VOLTAGE (mV) INPUT = 1, = 1, = 2, = 2, RL = RL = RL = RL = 1kΩ 100Ω 1kΩ 100Ω 40 20 0 –20 –40 –60 0 10 20 30 40 50 60 TIME (ns) Figure 36. 0.1% Settling Time 70 80 –0.4 90 –80 –100 VOUT, dm = 0.1V p-p 0 100 200 300 400 500 600 TIME (ns) 700 800 900 1000 16932-047 –8 –10 VOUT, dm = 8V p-p 16932-115 VOLTAGE (V) –2 –OUT, VICM = 1V 0.4 –2 1 DISABLE 0.4 8 2 100 1.2 Figure 35. DISABLE Pin Turn-Off Time 4 10 1.1 –0.3 16932-111 SUPPLY CURRENT (mA) 6 1.0 1 Figure 37. Closed-Loop Output Impedance Magnitude vs. Frequency, G = 1 4.0 SUPPLY CURRENT 0.1 FREQUENCY (MHz) 8 1.5 0.1 0.01 Figure 34. Input Current Noise Spectral Density 4.5 1 DISABLE PIN VOLTAGE (V) 10 1 16932-101 0.1 10 16932-029 10 16932-112 INPUT CURRENT NOISE (pA/√Hz) 100 Figure 39. Small Signal Transient Response for Various Gains and Loads Rev. 0 | Page 22 of 44 Data Sheet ADA4945-1 100 80 5 4 40 20 0 –20 –40 1 0 –1 –2 –3 200 300 VOUT, dm = 8V p-p 400 500 600 700 800 900 1000 200 300 400 500 600 7 5 4 20 0 –20 –40 800 900 1000 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 6 40 700 Figure 43. Large Signal Transient Response for Various Gains and Loads OUTPUT VOLTAGE (V) 60 100 TIME (ns) CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 80 0 16932-067 100 100 3 2 1 0 –1 –2 –3 –4 –5 CDIFF = 0pF VOUT, dm = 0.1V p-p 0 100 200 300 CDIFF = 0pF VOUT, dm = 8V p-p –6 400 500 600 700 800 900 1000 TIME (ns) Figure 41. Small Signal Transient Response for Various Capacitive Loads, VS = 5 V 100 –7 16932-070 –80 200 300 400 500 600 7 5 4 20 0 –20 –40 800 900 1000 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 6 40 700 Figure 44. Large Signal Transient Response for Various Capacitive Loads, VS = 10 V OUTPUT VOLTAGE (V) 60 100 TIME (ns) CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 80 0 16932-075 –60 3 2 1 0 –1 –2 –3 –4 –60 –5 CDIFF = 0pF VOUT, dm = 0.1V p-p 0 100 200 300 CDIFF = 0pF VOUT, dm = 8V p-p –6 400 500 600 TIME (ns) 700 800 900 1000 –7 16932-071 –80 Figure 42. Small Signal Transient Response for Various Capacitive Loads, VS = 3 V 0 100 200 300 400 500 600 TIME (ns) 700 800 900 1000 16932-076 OUTPUT VOLTAGE (mV) 2 –7 16932-069 0 Figure 40. Small Signal Transient Response for Various Capacitive Loads, VS = 10 V OUTPUT VOLTAGE (mV) 1kΩ 100Ω 1kΩ 100Ω 3 –6 TIME (ns) –100 RL = RL = RL = RL = –5 CDIFF = 0pF VOUT, dm = 0.1V p-p –80 –100 = 1, = 1, = 2, = 2, –4 –60 –100 G G G G 6 OUTPUT VOLTAGE (V) 60 OUTPUT VOLTAGE (mV) 7 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF Figure 45. Large Signal Transient Response for Various Capacitive Loads, VS = 5 V Rev. 0 | Page 23 of 44 ADA4945-1 Data Sheet 4 3 0.75 OUTPUT VOLTAGE (V) 2 1 0 –1 –2 0.50 VS = ±2.5V 0.25 0 –0.25 –0.50 –0.75 –1.00 CDIFF = 0pF VOUT, dm = 4V p-p –4 0 100 200 300 400 500 600 700 800 900 1000 TIME (ns) Figure 46. Large Signal Transient Response for Various Capacitive Loads, VS = 3 V 100 80 VS = ±2.5V VS = ±5V 60 40 20 0 –20 –40 –60 –80 VOUT, dm = 0.1V p-p 0 100 200 300 400 500 600 700 800 900 TIME (ns) 1000 16932-081 –100 Figure 47. VOCM Small Signal Transient Response Rev. 0 | Page 24 of 44 –1.25 VOUT, dm = 2V p-p 0 100 200 300 400 500 600 700 800 900 TIME (ns) Figure 48. VOCM Large Signal Transient Response 1000 16932-082 –3 OUTPUT VOLTAGE (mV) VS = ±5V 1.00 16932-077 OUTPUT VOLTAGE (V) 1.25 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF Data Sheet ADA4945-1 LOW POWER MODE 3 3 G = 1, RL = 100Ω 2 2 0 –1 –2 –3 G = 2, RL = 1kΩ –4 –5 G = 2, RL = 100Ω –6 –1 G = 2, RL = 1kΩ –2 –3 –4 G = 2, RL = 100Ω –5 –6 10 1000 100 FREQUENCY (MHz) 16932-032 1 Figure 49. Small Signal Frequency Response for Various Gains and Loads 3 –9 0.1 1 3 –2 –2 GAIN (dB) 0 –3 –4 –3 –4 –5 –5 –6 –6 –7 –7 –8 VOUT, dm = 0.1V p-p 10 100 1000 FREQUENCY (MHz) –9 0.1 16932-033 1 1 10 100 1000 Figure 53. Large Signal Frequency Response for Various Supplies 3 3 2 25°C 1 2 125°C –40°C +25°C 1 0 0 –40°C –1 GAIN (dB) –2 –3 –4 –3 –4 –5 –5 –6 –6 –7 –7 –8 VOUT, dm = 0.1V p-p 1 10 FREQUENCY (MHz) 100 1000 –9 16932-034 0.1 +125°C –2 Figure 51. Small Signal Frequency Response for Various Temperatures VOUT, dm = 2V p-p 0.1 1 10 FREQUENCY (MHz) 100 1000 16932-037 –1 –9 VOUT, dm = 2V p-p FREQUENCY (MHz) Figure 50. Small Signal Frequency Response for Various Supplies –8 1000 VS = ±5V VS = ±2.5V VS = ±1.5V 1 –1 0.1 100 2 –1 –9 10 Figure 52. Large Signal Frequency Response for Various Gains and Loads 0 –8 1 FREQUENCY (MHz) VS = ±5V VS = ±2.5V VS = ±1.5V 2 VOUT, dm = 2V p-p 16932-035 –8 VOUT, dm = 0.1V p-p –9 0.1 16932-036 –8 GAIN (dB) G = 1, RL = 100Ω 0 –7 –7 GAIN (dB) G = 1, RL = 1kΩ 1 G = 1, RL = 1kΩ NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 Figure 54. Large Signal Frequency Response for Various Temperatures Rev. 0 | Page 25 of 44 ADA4945-1 Data Sheet 3 0.25 2 0.20 VOCM = –1V NORMALIZED GAIN (dB) 0 VOCM = +1V –3 –4 VOCM = 0V –5 –6 0.05 0 –8 G = 2, RL = 100Ω –0.10 G = 2, RL = 1kΩ –0.20 VOUT, dm = 0.1V p-p 1 10 100 1000 –0.25 16932-038 0.1 FREQUENCY (MHz) 3 100 1000 1 –1 –2 –2 GAIN (dB) 0 –1 –3 –4 –3 –4 –5 –5 –6 –6 –7 –8 –8 VOUT, dm = 2V p-p 1 10 100 16932-039 0.1 1000 FREQUENCY (MHz) VOUT, dm = 0.1V p-p –9 0.1 1 10 Figure 56. Large Signal Frequency Response at Various VOCM Levels 4 2 2 1 1 0 –1 –1 GAIN (dB) 0 CCOM1 = CCOM2 = 0pF –3 CCOM1 = CCOM2 = 5pF –4 CCOM1 = CCOM2 = 10pF –5 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 3 CCOM1 = CCOM2 = 20pF –2 1000 Figure 59. VOCM Small Signal Frequency 4 3 100 FREQUENCY (MHz) 16932-042 –7 GAIN (dB) 10 2 0 –2 –3 –4 –5 –6 –6 –7 –7 CDIFF = 0pF VOUT = 0.1V p-p 1 CDIFF = 0pF VOUT = 2V p-p –8 10 100 FREQUENCY (MHz) 1000 –9 16932-040 –8 –9 1 3 1 –9 0.1 Figure 58. 0.1 dB Flatness Small Signal Frequency Response for Various Gains and Loads VOCM = 0V, ±1V 2 VOUT, dm = 0.1V p-p FREQUENCY (MHz) Figure 55. Small Signal Frequency Response at Various VOCM Levels GAIN (dB) G = 1, RL = 1kΩ –0.05 –0.15 –7 –9 0.10 Figure 57. Small Signal Frequency Response for Various Capacitive Loads 1 10 100 FREQUENCY (MHz) 1000 16932-043 GAIN (dB) –1 –2 G = 1, RL = 100Ω 0.15 16932-041 1 Figure 60. Large Signal Frequency Response for Various Capacitive Loads Rev. 0 | Page 26 of 44 Data Sheet ADA4945-1 0.25 0.20 G = 1, RL = 1kΩ G = 2, RL = 1kΩ 0.05 0 –0.05 G = 2, RL = 100Ω –0.10 –0.15 VOUT, dm = 2V p-p –0.25 0.1 NORMALIZED AT TA = 25°C 1 10 100 1000 FREQUENCY (MHz) 16932-044 –0.20 TEMPERATURE (°C) Figure 61. 0.1 dB Flatness Large Signal Frequency Response for Various Gains and Loads Figure 64. Input Offset Current vs. Temperature for 30 Devices 3 –20 VOUT, dm = 8V p-p 2 –40 HARMONIC DISTORTION (dBc) 1 0 GAIN (dB) –1 –2 –3 –4 –5 –6 –7 –60 –80 HD2, –100 HD3, HD2, –120 –140 –8 VOUT, dm = 2V p-p 0.1 HD3, 1 10 100 1000 FREQUENCY (MHz) –160 100 16932-045 –9 16932-085 0.10 1k 10k 100k 1M FREQUENCY (Hz) 16932-087 NORMALIZED GAIN (dB) INPUT OFFSET CURRENT (nA) G = 1, RL = 100Ω 0.15 Figure 65. Harmonic Distortion vs. Frequency for Various Loads Figure 62. VOCM Large Signal Frequency –20 VOUT, dm = 8V p-p –60 –80 –100 HD2, HD2, –120 –140 TEMPERATURE (°C) 16932-046 NORMALIZED AT TA = 25°C – 160 100 HD3, 1k 10k HD3, 100k 1M FREQUENCY (Hz) Figure 66. Harmonic Distortion vs. Frequency for Various Supplies Figure 63. Input Offset Voltage vs. Temperature for 50 Devices Rev. 0 | Page 27 of 44 16932-048 INPUT OFFSET VOLTAGE (µV) HARMONIC DISTORTION (dBc) –40 ADA4945-1 –20 VOUT, dm = 8V p-p –40 HARMONIC DISTORTION (dBc) –60 –80 HD2, –100 HD2, –120 –140 –160 100 1k 10k 100k 1M FREQUENCY (Hz) –120 1k 10k 100k 1M Figure 70. Harmonic Distortion vs. Frequency for Various VOUT, dm –20 VOUT, dm = 2V p-p f = 1kHz –40 HARMONIC DISTORTION (dBc) –60 –80 –100 HD2 –120 –140 VS = +3V, 0V HD3 –60 VS = ±2.5V HD3 –80 –100 VS = ±2.5V HD2 VS = ±5V HD3 VS = +3V, 0V HD2 VS = ±5V HD3 –120 –4 –3 –2 –1 0 1 2 3 4 5 VOCM (V) –160 16932-105 –5 Figure 68. Harmonic Distortion vs. VOCM, f = 1 kHz, ±5 V Supplies –40 HARMONIC DISTORTION (dBc) –40 –60 –80 –100 HD2 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 VOCM (V) Figure 69. Harmonic Distortion vs. VOCM, f = 1 kHz, ±2.5 V Supplies 2.5 8 10 12 14 16 18 20 VOUT, dm = 8V p-p –60 –80 –100 HD2, RF = RG = 499Ω HD3, RF = RG = 1kΩ –120 –160 100 16932-106 –160 –2.5 6 –140 HD3 VOUT, dm = 2V p-p 4 Figure 71. Harmonic Distortion vs. VOUT, dm for Various Supplies, f = 1 kHz –20 –140 2 VOUT, dm (V p-p) –20 –120 0 16932-108 –140 HD3 HD3, RF = RG = 1kΩ HD3, RF = RG = 499Ω 1k 10k FREQUENCY (Hz) 100k 1M 16932-110 HARMONIC DISTORTION (dBc) –100 FREQUENCY (Hz) –40 HARMONIC DISTORTION (dBc) –80 –160 100 Figure 67. Harmonic Distortion vs. Frequency for Various Gains –20 –60 VOUT, dm = 8V p-p VOUT, dm = 8V p-p VOUT, dm = 4V p-p VOUT, dm = 4V p-p VOUT, dm = 2V p-p VOUT, dm = 2V p-p –140 HD3, HD3, 16932-089 HARMONIC DISTORTION (dBc) –40 –160 HD2 AT HD3 AT HD2 AT HD3 AT HD2 AT HD3 AT 16932-091 –20 Data Sheet Figure 72. Harmonic Distortion vs. Frequency for Various RF and RG Values Rev. 0 | Page 28 of 44 110 100 OPEN-LOOP GAIN (dB) CMRR (dB) 90 80 70 60 40 0.1 1 10 100 FREQUENCY (MHz) 16932-049 50 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 –10 –20 –30 –40 GAIN PHASE 1 10 Figure 73. CMRR vs. Frequency 100 10k 100k 1M FREQUENCY (Hz) 10M 100M 1G Figure 76. Open-Loop Gain and Phase vs. Frequency –10 14 12 –20 10 OUTPUT VOLTAGE (V) –30 –40 –50 –60 10 × VIN G = +10 8 OUTPUT BALANCE (dB) 1k 30 15 0 –15 –30 –45 –60 –75 –90 –105 –120 –135 –150 –165 –180 –195 –210 –225 –240 PHASE (Degrees) ADA4945-1 16932-051 Data Sheet VOUT, dm 6 4 2 0 –2 –4 –6 –8 –70 –10 –80 –14 1 10 100 FREQUENCY (MHz) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TIME (µs) Figure 74. Output Balance vs. Frequency 16932-031 0.1 16932-028 –12 Figure 77. Output Overdrive Recovery, G = 2 130 100 110 90 +PSRR –PSRR 80 70 60 10 40 0.1 1 10 FREQUENCY (MHz) 100 Figure 75. PSRR vs. Frequency 1 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 78. Voltage Noise Spectral Density, Referred to Input Rev. 0 | Page 29 of 44 16932-100 50 16932-050 PSRR (dB) 100 INPUT VOLTAGE NOISE (nV/√Hz) 120 ADA4945-1 Data Sheet 100 CLOSED-LOOP OUTPUT IMPEDANCE MAGNITUDE (Ω) 1 100 1k 10k 100k 10M 1M FREQUENCY (Hz) 0.01 0.1 10 6 1.4 4 1.2 2 1.0 0 –2 SUPPLY CURRENT 0.6 –4 0.4 –6 DISABLE 0 0.2 0.4 0.6 0.8 1.0 1.2 0.9 1.6 1.8 2.0 0.8 3 0.6 2 1 0.5 0.4 0 –1 0.3 0.2 –0.1 TIME (µs) –0.3 0.4 6 0.3 INPUT 0.5 0 –4 –0.2 –6 –0.3 VOUT, dm = 8V p-p 40 60 80 100 120 140 TIME (ns) Figure 81. 0.1% Settling Time 2.5 3.0 160 180 –0.4 G G G G 60 OUTPUT VOLTAGE (mV) –0.1 OUTPUT 20 2.0 80 ERROR (%) 0 0 1.5 3.5 TIME (µs) = 1, = 1, = 2, = 2, RL = RL = RL = RL = 1kΩ 100Ω 1kΩ 100Ω 40 20 0 –20 –40 –60 –80 –100 16932-116 VOLTAGE (V) 0.1 0 –8 –20 1.0 100 0.2 %ERROR –2 –5 –6 –7 4.0 Figure 83. DISABLE Pin Turn-On Time 8 2 –3 –4 +OUT, VICM = 1V Figure 80. DISABLE Pin Turn-Off Time 4 –2 –OUT, VICM = 1V 0.1 –0.2 –10 4 DISABLE 0.7 0 –8 1.4 7 6 5 1.0 OUTPUT VOLTAGE (V) 1.6 8 1.1 DISABLE PIN VOLTAGE (V) 8 1.2 16932-113 SUPPLY CURRENT (mA) 1.8 0 100 10 Figure 82. Closed-Loop Output Impedance Magnitude vs. Frequency, G = 1 2.0 0.2 1 FREQUENCY (MHz) Figure 79. Current Noise Spectral Density 0.8 0.1 DISABLE PIN VOLTAGE (V) 10 1 16932-114 1 16932-102 0.1 10 16932-052 10 VOUT, dm = 0.1V p-p 0 100 200 300 400 500 600 TIME (ns) 700 800 900 1000 16932-066 INPUT CURRENT NOISE (pA/√Hz) 100 Figure 84. Small Signal Transient Response for Various Gains and Loads Rev. 0 | Page 30 of 44 Data Sheet ADA4945-1 100 80 5 4 40 20 0 –20 –40 CDIFF = 0pF VOUT, dm = 0.1V p-p 2 1 0 –1 –2 –3 100 200 300 400 500 600 700 800 900 1000 –7 16932-072 0 100 VOUT, dm = 8V p-p 60 0 0.2 0.4 0.6 0.8 1.0 1.2 7 4 OUTPUT VOLTAGE (V) 0 –20 –40 1.8 2.0 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 5 20 1.6 Figure 88. Large Signal Transient Response for Various Gains and Loads 6 40 1.4 TIME (µs) CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 80 3 2 1 0 –1 –2 –3 –4 –5 CDIFF = 0pF VOUT, dm = 0.1V p-p 0 100 200 300 CDIFF = 0pF VOUT, dm = 8V p-p –6 400 500 600 700 800 900 1000 TIME (ns) Figure 86. Small Signal Transient Response for Various Capacitive Loads, VS = 5 V 100 –7 16932-073 –80 60 0.2 0.4 0.6 0.8 1.0 1.2 7 4 OUTPUT VOLTAGE (V) 0 –20 –40 2.0 1.8 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 5 20 1.6 Figure 89. Large Signal Transient Response for Various Capacitive Loads, VS = 10 V 6 40 1.4 TIME (µs) CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF 80 0 16932-078 –60 3 2 1 0 –1 –2 –3 –4 –60 –80 –5 CDIFF = 0pF VOUT, dm = 0.1V p-p 100 200 300 400 500 600 TIME (ns) 700 800 900 1000 –7 16932-074 0 CDIFF = 0pF VOUT, dm = 8V p-p –6 Figure 87. Small Signal Transient Response for Various Capacitive Loads, VS = 3 V 0 0.2 0.4 0.6 0.8 1.0 1.2 TIME (µs) 1.4 1.6 1.8 2.0 16932-079 OUTPUT VOLTAGE (mV) 3 –6 Figure 85. Small Signal Transient Response for Various Capacitive Loads, VS = 10 V OUTPUT VOLTAGE (mV) 1kΩ 100Ω 1kΩ 100Ω –5 TIME (ns) –100 RL = RL = RL = RL = 16932-068 –80 –100 = 1, = 1, = 2, = 2, –4 –60 –100 G G G G 6 OUTPUT VOLTAGE (V) 60 OUTPUT VOLTAGE (mV) 7 CCOM1 = CCOM2 = 0pF CCOM1 = CCOM2 = 5pF CCOM1 = CCOM2 = 10pF CCOM1 = CCOM2 = 20pF Figure 90. Large Signal Transient Response for Various Capacitive Loads, VS = 5 V Rev. 0 | Page 31 of 44 ADA4945-1 Data Sheet 4 CCOM1 = CCOM2 = CCOM1 = CCOM2 = CCOM1 = CCOM2 = CCOM1 = CCOM2 = 0.75 OUTPUT VOLTAGE (V) 2 1 0 –1 –2 VS = ±2.5V 0.25 0 –0.25 –0.50 0 0.2 0.4 0.6 –1.00 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Figure 91. Large Signal Transient Response for Various Capacitive Loads, VS = 3 V 100 80 VS = ±2.5V VS = ±5V 60 40 20 0 –20 –40 –60 –80 VOUT, dm = 0.1V p-p 0 100 200 300 400 500 600 700 800 900 TIME (ns) 1000 16932-083 –100 Figure 92. VOCM Small Signal Transient Response Rev. 0 | Page 32 of 44 –1.25 VOUT, dm = 2V p-p 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 TIME (µs) Figure 93. VOCM Large Signal Transient Response 1.8 2.0 16932-084 CDIFF = 0pF VOUT, dm = 4V p-p TIME (µs) OUTPUT VOLTAGE (mV) 0.50 –0.75 –3 –4 VS = ±5V 1.00 16932-080 OUTPUT VOLTAGE (V) 3 1.25 0pF 5pF 10pF 20pF Data Sheet ADA4945-1 TEST CIRCUITS 499Ω NETWORK ANALYZER OUTPUT 50Ω 499Ω 53.6Ω VIN NETWORK ANALYZER INPUT +5V 50Ω 475Ω VOCM ADA4945-1 499Ω 54.9Ω 54.9Ω 50Ω 475Ω 16932-053 25.5Ω –5V 499Ω Figure 94. Equivalent Basic Test Circuit 499Ω DC-COUPLED GENERATOR 53.6Ω 100Ω 475Ω VOCM ADA4945-1 499Ω 54.9Ω 2:1 CT 50Ω DUAL FILTER HP LP 475Ω 54.9Ω 16932-054 25.5Ω -5V 499Ω Figure 95. Test Circuit for Distortion Measurements +5V IS R1 +5V R2 –FB DISABLE –OUT +IN VIN –5V VOCM 0.1µF +OUT –IN +FB R2 R1 16932-097 VIN 499Ω LOW-PASS FILTER –5V Figure 96. Test Circuit for DISABLE Pin Turn Off Time Measurement R1 +5V R2 –FB DISABLE –5V –OUT +IN VIN +5V VOCM 0.1µF +OUT –IN +FB R1 R2 –5V 16932-098 50Ω +5V Figure 97. Test Circuit for DISABLE Pin Turn On Time Measurement Rev. 0 | Page 33 of 44 ADA4945-1 Data Sheet TERMINOLOGY Differential Voltage Differential voltage is the difference between two node voltages. For example, the differential output voltage (or equivalently, output differential mode voltage) is defined as VOUT, dm = (V+OUT − V−OUT) where V+OUT and V−OUT refer to the voltages at the +OUT and −OUT terminals with respect to a common reference. Differential VOS, Differential CMRR, and VOCM CMRR The differential mode and common-mode voltages each have their own error sources. The differential offset (VOS, dm) is the voltage error between the +IN and −IN terminals of the amplifier. Differential CMRR reflects the change of VOS, dm in response to changes to the common-mode voltage at +DIN and −DIN (see Figure 98). CMRRDIFF = Similarly, the differential input voltage is defined as VIN, dm = (+DIN − (−DIN)) Common-Mode Voltage (CMV) CMV is the average of two node voltages. The output commonmode voltage is defined as VOCM CMRR reflects the change of VOS, dm in response to changes to the common-mode voltage at the output terminals. CMRRVOCM = VOUT, cm = (V+OUT + V−OUT)/2 Similarly, the input common-mode voltage is defined as VIN, cm = (+DIN + (−DIN))/2 Common-Mode Offset Voltage Common-mode offset voltage is the difference between the voltage applied to the VOCM terminal and the common mode of the output voltage. ΔVIN, cm ΔVOS, dm ΔVOCM ΔVOS, dm Balance Balance is a measure of how well the differential signals are matched in amplitude. The differential signals are exactly 180° apart in phase. By this definition, the output balance is the magnitude of the output common-mode voltage divided by the magnitude of the output differential mode voltage. VOS, cm = VOUT, cm − VOCM Output Balance Error = VOUT , cm VOUT , dm –FB RG RF +IN VOCM –DIN –OUT ADA4945-1 RG R F –IN RL, dm VOUT, dm +OUT +FB Figure 98. Circuit Definitions Rev. 0 | Page 34 of 44 16932-004 +DIN Data Sheet ADA4945-1 THEORY OF OPERATION +DIN RF RG –OUT CC GO +VCLAMP OUTPUT CLAMP +IN –V CLAMP GDIFF –IN GCM CC VOCM –DIN RG RF +OUT 16932-055 GO Figure 99. ADA4945-1 Architectural Block Diagram The ADA4945-1 is a high speed, low power differential amplifier fabricated on Analog Devices advanced dielectrically isolated SiGe bipolar process. The device provides two closely balanced differential outputs in response to either differential or single-ended input signals. An external feedback network that is similar to a voltage feedback operational amplifier sets the differential gain. The output common-mode voltage is independent of the input common-mode voltage and is set by an external voltage at the VOCM terminal. The PNP input stage allows input common-mode voltages between the negative supply and 1.3 V less than the positive supply. A rail-to-rail output stage supplies a wide output voltage range. The DISABLE pin can reduce the supply current (IS) of the amplifier to 50 µA. FULLY DIFFERENTIAL AND COMMON-MODE SIGNAL PATHS Figure 99 shows a simplified diagram of the ADA4945-1 architecture. The differential feedback loop consists of the differential transconductance (GDIFF) working through the GO output buffers and the RF/RG feedback networks. The commonmode feedback loop is set up with a voltage divider across the two differential outputs to create an output voltage midpoint (VOUT(CM)) and a common-mode transconductance (GCM). Subtracting the previous equations gives the relationship that shows RF and RG setting the differential gain. (V+OUT − V−OUT) = (+DIN – (−DIN)) × RF RG The common-mode feedback loop drives the output commonmode voltage that is sampled at the midpoint of the output voltage divider to equal the voltage at VOCM. This voltage equalization results in the following relationships: V+OUT = VOCM + VOUT, dm V−OUT = VOCM − VOUT, dm 2 2 Note that the summing junction input voltages of the differential amplifier (+IN and −IN in Figure 99) are set by both the output voltages and the input voltages. The differential feedback loop forces the voltages at +IN and −IN to equal each other. This voltage equalization sets the following relationships: V + DIN = − −OUT RG RF V −DIN = − +OUT RG RF Rev. 0 | Page 35 of 44  RF V+ IN = + DIN   RF + RG   RG  + V−OUT   R +R G   F      RF V− IN = − DIN   RF + RG   RG  + V+ OUT   R +R G   F     ADA4945-1 Data Sheet In addition to the differential and common-mode signal paths, the ADA4945-1 implements clamping circuits to protect the input devices of circuits being driven by the ADA4945-1, hereafter assumed to be an ADC, from being overdriven and potentially damaged. These clamping circuits use both differential and common-mode feedback to limit the output voltages to a range defined by the voltage applied to two reference pins, +VCLAMP and −VCLAMP. These high impedance pins are typically connected to potentials that define the allowable input range of the ADC, which are the ADC reference voltages (+VREF and −VREF) for most ADCs. As shown in Figure 100, the common-mode clamping circuit senses the output voltage midpoint and applies a commonmode feedback signal to prevent VOUT, cm from exceeding +VCLAMP or going below −VCLAMP. UPPER COMMON-MODE CLAMP +VCLAMP –OUT iCLAMP (CM) +OUT –VCLAMP 16932-056 LOWER COMMON-MODE CLAMP Figure 100. Common-Mode Clamp Block Diagram The differential clamping circuit, shown in Figure 101, senses each output (+OUT and −OUT) and applies a differential feedback signal to prevent either output from exceeding (+VCLAMP + 0.5 V) or going below (−VCLAMP − 0.5 V). The approximately 500 mV offset voltage is designed to allow the outputs to fully use the input range of the ADC without any clamp engagement, while providing input protection prior to the turn on of the ADC input protection diodes. This feature allows the ADA4945-1 to provide a full-scale signal to the ADC without incurring any clamp induced distortion, thus maximizing signal-to-noise ratio (SNR) and linearity while protecting the ADC inputs. 500 mV – + UPPER DIFFERENTIAL CLAMP iCLAMP (DIFF) LOWER DIFFERENTIAL CLAMP +VCLAMP –OUT +OUT 500 mV –VCLAMP 16932-057 iCLAMP (DIFF) OUTPUT VOLTAGE CLAMP Figure 101. Differential Clamp Block Diagram By applying a differential feedback signal in response to one or both outputs exceeding the clamp reference voltages, both outputs are limited equally, even if only one output exceeds one of the clamp reference voltages. This feature allows the ADA49451 to maintain a constant output common-mode voltage even while clamping the differential outputs, which enables a faster system recovery from a clamped condition. In systems where output clamping is not desired, the upper output clamp can be disabled by connecting +VCLAMP to +VS, and the lower output clamp can be disabled by connecting −VCLAMP to −VS. If one clamp is disabled (for example, −VS = −VCLAMP = 0 V), the other can be remain active, and the output is limited when either or both outputs reaches the active clamp reference. An additional feature of the ADA4945-1 is the use of a resistor divider between the +VCLAMP and −VCLAMP pins, as shown in Figure 99, to set the default potential on the VOCM pin when the pin is not externally driven. Because the +VCLAMP and −VCLAMP pins are typically set to the maximum and minimum desired input voltage of the ADC (for example, +VREF and −VREF), respectively, this resistor divider sets the output common-mode voltage of the ADA4945-1 at the midpoint of the ADC input range by default. By contrast, most fully-differential amplifiers use a resistor divider between the amplifier supply voltages to set the default output common-mode voltage, which may not be optimal for maximizing ADC input range usage. POWER MODES The ADA4945-1 implements two fully characterized active power modes (full power, low power) and a disable mode to optimize system power and performance trade-offs. The transition time from disable mode to either of the active power modes is fast (