ADCLK954/PCBZ

Evaluation Board User Guide UG-066 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Setting Up the Evaluation Board for the ADCLK954 The data sheet contains full technical details about the specifications and operation of this device. PACKAGE LIST Evaluation board with ADCLK954 component installed Applicable documents (schematic, layout) GENERAL DESCRIPTION This user guide describes how to set up and use the evaluation board for the ADCLK954. The ADCLK954 data sheet should be used in conjunction with this user guide. The ADCLK954 is a very high performance clock fanout buffer. The evaluation board is fabricated using a high quality Rogers dielectric material. Transmission line paths are kept as close to 50 Ω as possible. 08665-001 DIGITAL PICTURE OF EVALUATION BOARD Figure 1. ADCLK954 Evaluation Board Please see the last page for an important warning and disclaimers. Rev. 0 | Page 1 of 8 UG-066 Evaluation Board User Guide TABLE OF CONTENTS Package List ....................................................................................... 1  Recommended Board Setup ........................................................3  General Description ......................................................................... 1  Clock Outputs ................................................................................4  Digital Picture of Evaluation Board ............................................... 1  Evaluation Board Schematic and Artwork.....................................5  Revision History ............................................................................... 2  ESD Caution...................................................................................8  Evaluation Board Hardware ............................................................ 3  REVISION HISTORY 11/09—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Evaluation Board User Guide UG-066 EVALUATION BOARD HARDWARE VREF1 and VT1 together. This connection is made with R14 installed at the factory. RECOMMENDED BOARD SETUP The recommended setup for the ADCLK954 evaluation board is shown in Figure 2. VCC is set to 3.3 V and VEE is set to GND. The CLKSEL jumper (P2) is provided to select the desired input configuration. The range of the peak-to-peak input voltage swing at CLK1 is 0.2 V p-p to 1.7 V p-p. Note that output jitter performance is degraded by an input slew rate, as shown in the data sheet. On the evaluation board, Input CLK0 and Input CLK0 are set up for dc-coupled operation to the ADCLK954 via J2 and J4. This input configuration requires the user to provide the appropriate ac swing and common-mode voltage to both inputs. Refer to the ADCLK954 data sheet for input specifications. Table 1. Basic Equipment Required Quantity 1 1 1 1 4 CLK1 is set up to evaluate with a single-ended source via the balun on the evaluation board. In addition, series capacitors in the path provide ac-coupled inputs to the ADCLK954. The common-mode voltage for both inputs is provided by tying Description Single power supply Signal source High bandwidth oscilloscope High bandwidth differential probe (optional) Matched high speed cables POWER SUPPLY +3.3V GND VCC VEE CH 1 CLK1 CLK1 Qx ADCLK954 EVALUATION BOARD OSCILLOSCOPE CLK0 Qx CH 2 CLK0 VREF 1 VT1 VREF 0 V T0 Figure 2. Recommended Setup for Device Evaluation Rev. 0 | Page 3 of 8 08665-002 CLOCK SOURCE GND UG-066 Evaluation Board User Guide CLOCK OUTPUTS Table 2. Power Connections via P1 The ADCLK954 has 12 differential outputs. The six evenordered differential clock outputs on the evaluation board are biased to GND via 200 Ω and ac-coupled to the SMAs. From the SMAs, use matched 50 Ω coaxial cables into the oscilloscope for evaluation. The six odd-ordered differential outputs on the evaluation board are not launched. Use a high bandwidth differential probe and oscilloscope close to the ADCLK954 device for evaluation. See the evaluation board schematic in Figure 4 for more details. Label GND VCC VEE ADCLK954 Connect to GND Connect to 3.3 V Connect to GND LVPECL ADCLK954 Q0 Q0 Q1 Q1 Q2 Q2 Q3 VREF 0 REFERENCE Q3 Q4 V T0 Q4 CLK0 CLK0 Q5 V T1 Q5 CLK1 Q6 CLK1 Q6 IN_SEL Q7 Q7 VREF 1 REFERENCE Q8 Q8 Q9 Q9 Q10 Q10 Q11 Figure 3. ADCLK954 1:12 Clock/Data Buffer Block Diagram Rev. 0 | Page 4 of 8 08665-003 Q11 CLK0 GND GND GND J3 J2 CLK0B J1 GND CLK0 100 OHMS => DIFFERENTIAL 50 OHMS => SINGLE ENDED 142-0761-861 CLK1B 142-0761-861 CLK1 142-0761-861 CLK0B 142-0761-861 J4 R07 0 GND 1 R09 DNI 0 2 4 3 MABA-007159-000000 SEC T2 PRI 2 1 0 DNI R08 5 1 50 OHMS 50 OHMS GND 142-0761-861 49.9 R11 2 142-0761-861 142-0761-861 GND DNI R10 1 100 R12 1 2 .1UF C2 1 2 2 GND OUT10 GND OUT10B C04 J6 J5 .1UF 1 .1UF C03 2 C4 2 .1UF 1 .1UF 1 C3 CLK1B CLK1 LABEL "VEE (CLK0)" LABEL "VCC (CLK1)" GND J7 GND .1UF 1 2 3 50 OHMS 50 OHMS CLKSEL P2 50 OHMS 50 OHMS 50 OHMS R1 VEE VEE VCC VEE R9 100 1 2 VEE 1 VEE 1 1 1 1 200 VEE VEE 1 VEE R16 1 2 100 OUT3B VEE VCC 50 OHMS 50 OHMS OUT2B OUT2 OUT10 OUT10B GND_11 1 R8 100 VEE 2 GND OUT11 VEE VEE VEE VEE 1 2 OUT9B GND 100 R15 VEE GND_09 OUT9 VEE VEE OUT8B OUT8 50 OHMS 50 OHMS Q2 VCC Q0 Q1 Q3 VCC 1 CLK_SEL Q0B Q1B Q2B Q3B VCC30 VCC 2 CLK0 Q4 29 3 CLK0B Q4B 28 R39 200 VEE C27 .1UF VREF0 4 VREF0 Q5 27 5 VT0 VT0 Q5B 26 100 OHMS ADCLK954 6 CLK1 Q6 25 CP-40-8 R40 200 VEE C28 .1UF 7 CLK1B Q6B 24 8 VT1 R41 200 VEE C29 .1UF VT1 Q7 23 VREF1 9 VREF1 Q7B 22 100 OHMS VEE 10 VEE VCC 21 Q11B Q10B Q9B Q8B VCC Q11 Q10 Q9 Q8 VCC R42 200 VEE C30 .1UF VCC VCC VCC 200 R7 OUT11B VEE VCC 50 OHMS DNI OUT0 OUT0B 200 200 R5 OUT3 R2 R31 200 .1UF C19 C9 2 J9 GND .1UF C12 J12 1 2 .1UF GND OUT2B GND OUT2 VEE GND_05 VEE GND OUT8B GND OUT8 GND_07 C11 J11 1 2 OUT7B GND OUT7 OUT5B OUT5 .1UF C10 J10 1 2 .1UF 1 VEE 142-0761-861 142-0761-861 VEE 50 OHMS 50 OHMS 50 OHMS 50 OHMS 142-0761-861 142-0761-861 OUT6B OUT6 OUT4B OUT4 .1UF C18 J16 1 2 .1UF C17 J15 1 2 .1UF C16 J14 1 2 .1UF C15 J13 1 2 GND OUT6B GND OUT6 GND OUT4B GND OUT4 142-0761-861 142-0761-861 142-0761-861 142-0761-861 LABEL "VCC (3.3V)" LABEL "VEE (GND)" POWER P1 SAME AS ADCLK954 ENGR BRD Z5.531.3425.0 VT0 VEE VCC VREF0 VT1 GND BYPASS CAPACITORS (SUPPLY) VEE VCC BYPASS CAPACITORS (DUT) VEE VREF1 VEE VEE BYPASS CAPACITORS VT0 GND STITCHING RESISTORS (O OHM) GND ORDER WEILAND 25.600.5453.0 PLUG R44 C34 J8C1 1 2 100 OHMS R3 R4 49.9 OUT1 R32 200 R45 200 GND GND_01 GND .1UF C21 R34 200 C23 .1UF C20 .1UF 200 R21 R22 .1UF C26 R38 200 200 200 OUT1B 100 OHMS R23 VCC GND R43 C31 C32 0 .1UF C22 200 R36 200 .1UF C24 2 1 TP1 1 WHT VT0 VT1 TP2 1 WHT VT1 0 1 2 3 4 R14 0 .1UF VEE 0 .1UF 10UF 2 1 R48 VREF0 0 VREF1 .1UF R6 R20 200 0 .1UF 10UF GND_03 200 1 R17 2 100 1 R18 2 C36 C33 0 0 10UF C35 C5 R46 .1UF C37 .1UF C38 R47 C39 .1UF C41 .1UF C25 11 12 13 14 15 16 17 18 19 20 1 1 OUT0B .1UF .1UF C40 .1UF C42 08665-004 PAD 40 39 38 200 R33 37 36 100 OHMS 35 34 200 R35 33 200 R37 32 31 100 OHMS 1 1 Rev. 0 | Page 5 of 8 1 Figure 4. ADCLK954 Evaluation Board Schematic R19 1 200 1 R24 1 200 1 1 142-0761-861 Evaluation Board User Guide UG-066 EVALUATION BOARD SCHEMATIC AND ARTWORK 1 1 DNI R13 100 Evaluation Board User Guide 08665-005 UG-066 08665-006 Figure 5. Top Trace Layer Figure 6. Ground Plane Layer Rev. 0 | Page 6 of 8 UG-066 08665-007 Evaluation Board User Guide 08665-008 Figure 7. VCC and VEE Power Plane Layer Figure 8. Bottom Trace Layer Rev. 0 | Page 7 of 8 UG-066 Evaluation Board User Guide NOTES ESD CAUTION Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not authorized to be used in life support devices or systems. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG08665-0-11/09(0) Rev. 0 | Page 8 of 8