0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
ADE7757EB

ADE7757EB

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    ADE7757EB - Evaluation Board Documentation ADE7757 Energy Metering IC - Analog Devices

  • 数据手册
  • 价格&库存
ADE7757EB 数据手册
PRELIMINARY TECHNICAL DATA a Preliminary Technical Data FEATURES Single +5 V Power Supply Easy Connection of External Transducers via Screw Terminals Easy Modification of Signal Conditioning Components Using PCB Sockets Trim Pot for Analog Calibration of Meter Constant Optically Isolated Output for Calibration/Test Purposes External Reference Option Available for Reference Evaluation Evaluation Board Documentation ADE7757 Energy Metering IC EVAL-ADE7757EB GENERAL DESCRIPTION The ADE7757 is a high accuracy energy measurement IC with integrated oscillator. The part specifications surpass the accuracy requirements as quoted in the IEC1036 standard. The ADE7757 supplies average real power information on the low frequency outputs F1 and F2. These logic outputs may be used to directly drive an electromechanical counter or interface to an MCU. The evaluation board provides screw connectors for easy connection to an external counter. The CF logic output gives instantaneous real power information. This output is intended to be used for calibration purposes. The evaluation board allows this logic output to be connected to an LED or optoisolator. The ADE7757 evaluation board can easily be converted into an energy meter by the addition of a local power supply and the connection of the appropriate current sensor. A large amount of prototype area is made available on the evaluation board for this purpose. FUNCTIONAL BLOCK DIAGRAM AGND VCC VDD DGND V2P V2N 74HC08 CF F1 F2 ADE7757 V1N V1P VPLUS H11L1 CFOUT VMINUS PROTOTYPE AREA AD780 REV. PrF Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, USA Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., June 2002 PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB ANALOG INPUTS (SK1 AND SK2) Voltage and current signals are connected at the screw terminals SK1 and SK2 respectively. All analog input signals are filtered using the on-board antialias filters before being presented to the analog inputs of the ADE7757. Some analog inputs offer additional signal conditioning, e.g., attenuation on the voltage channel. The default component values included with the evaluation board are the recommended values to be used with ADE7757. The user can easily change these components, but this is not recommended unless the user is familiar with sigma-delta converters as well as the criteria used for selecting the analog input filters—see ADE7757 datasheet. Voltage Input If Channel 2 is being used in a single-ended mode of operation, the unused input of the pair should be connected to analog ground (AGND) via an antialias filter. This is shown in Figure 2 where V2N is connected to AGND using jumper JP8. JP7 R18 SK2B TP5 V2N JP8 C19 Figure 2. Unused Analog Inputs Connected to AGND SK2 is a two-way connection block that can be directly connected to a high voltage source, e.g., 220 V rms. The resistor network R15 (trim pot), R19, R20, R21, and R22 make up a very flexible attenuation and calibration network—see schematic. The attenuation network is designed such that the corner frequency (–3 dB frequency) of the network matches that of the RC (antialiasing) filters on the other analog inputs. This is important, because if they do not match there will be large errors at low power factors. Figure 1 shows how the attenuation network may be used with fixed resistors or the trim pot. The trim pot allows the voltage signal on V2P to be scaled to calibrate the frequency on CF to some given constant, e.g., 100 imp/kWhr. Some examples are given later. JP5 R19 All passive components (resistors and capacitors) which make up the attenuation network and antialias filters may be modified by the user. The components are mounted using PCB jack sockets for easy removal and replacement of components. Current Input SK1 is a two-way connection block, which allows the ADE7757 to be connected to a current sensor through one differential input channel. In this example, we chose a shunt as the current sensor. Figure 3 shows a typical connection diagram for shunt connection. B SK1A JP18 AGND ADE7757 JP1 R16 JP2 TP1 V1N SK2A R20 JP17 SK1B R21 R15 A V2P C16 TP2 SHUNT JP6 C18 SK1C JP3 R17 JP4 R22 V1P C17 a. Attenuation Using Trim Pot (R15) JP5 R19 B Figure 3. Typical Shunt Connection for Channel 1 EVALUATION BOARD SETUP (ANALOG INPUTS) V2P JP18 SK2A R20 JP17 A R21 R15 JP6 C18 R22 b. Attenuation Using Fixed Resistors Figure 1. Attenuation Network on Channel 2 Figure 4 shows how the ADE7757 evaluation board can be set up for a simple evaluation. Two signal generators are used to provide the sinusoidal (ac) signals for Channel 1 and Channel 2. The user must have some way of phase locking the generators. Also if the ADE7757 performance-over-power factor is being evaluated, two separate signal sources will be required. The generators are shown connected in a single-ended configuration. The grounded analog inputs of Channel 1 and Channel 2 (V1N and V2N) are connected to AGND via an antialias filter. In Figure 4, analog input V2N is grounded via R21 and R22. The capacitor C18 is connected in parallel. –2– REV. PrF PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB JP5 OUTPUT FREQUENCY SELECTION JP18 R21 R15 A JP17 B SK2A R19 R20 JP6 P N JP16 TP4 V2P V2N C18 50Hz 220V TP5 JP7 R22 P ADE7757 provides up to four different output frequencies on F1 and F2. The output frequency selection is made via the logic inputs S0 and S1—see ADE7757 datasheet. On the evaluation board these inputs are set by using jumpers JP12 and JP13. The logic input SCF is set via jumper 11 (JP11). For a full explanation of the ADE7757 output frequency selection see the datasheet. INTERNAL CLOCK SK2B R18 N C19 JP8 JP9 SK1A 50Hz 30mV SK1B AGND JP1 R16 JP2 C16 TP1 V1N The ADE7757’s integrated oscillator serves as the clock source to the chip. A precise 6.2 kΩ resistor with low tolerance and low drift is used to drive the internal oscillator. JP3 SK1C R17 JP4 C17 TP2 V1P 5.000V 5.000V SK3A SK3B Figure 4. Typical Connection for Analog Inputs LOGIC OUTPUTS NEUTRAL PHASE AGND VDD SK5A 220V SK1A SK1B ADE7757 provides the active power information in the form of an output frequency. The three frequency outputs are F1, F2 and CF. Consult the datasheet for more information on these outputs. The logic outputs F1 and F2 are intended to be used to drive an impulse counter or stepper motor. The outputs are buffered and available at the connector SK6. A stepper motor may be directly connected here. The power supply for the buffer is +5V (SK4A) and may be connected to the ADE7757 supply using jumper JP15, or to its own supply. The logic output CF can be directly connected to an LED using JP14 (Position B) or to an optically isolated output (Position A). By closing Positions A and B, both options are selected. The optically isolated output is available at connector SK5. This isolated output is useful when the evaluation board is connected directly to a high voltage (e.g., 220 V residential). A typical connection diagram for this isolated output is shown in Figure 5. JP14 A B R11 AGND SHUNT V1N SK5B 5A 2mV SK5C V1P SK1C JP5 SK2A B JP18 JP17 R21 R19 R20 SK2B A TP4 V2 54.5mV R15 LOAD JP6 C18 R22 JP1 = OPEN JP2 = OPEN JP3 = OPEN JP4 = OPEN JP5 = OPEN JP6 = OPEN JP7 = OPEN JP8 = CLOSED JP9 = N JP11 = 1 JP12 = 1 JP13 = 0 JP14 = A,B JP16 = P JP17 = A JP18 = CLOSED R21 = REMOVED 0.9776 Hz 100 imp/kWhr FREQUENCY DISPLAY VPLUS R12 SK5A + R4 5V to 12V SK5B COUNTER Figure 6. ADE7757 Evaluation Board as an Energy Meter U4 CFOUT H11L1 VMINUS SK5C R5 EVALUATION BOARD SET UP AS AN ENERGY METER Figure 5. Typical Connection for Opto Output All logic outputs can be monitored via test points 6 to 8 (TP6 to TP8). These test points provide easy access for scope probes and meter probes. Figure 6 shows a wiring diagram that allows a simple energy meter to be implemented using the ADE7757 evaluation board. The current transducer used in this example is a 400 µΩ shunt. The meter is intended to be used with a line voltage of 220 V and a maximum current of 25 A. The frequency outputs F1 and F2 can be used to drive a mechanical counter. These outputs will be calibrated to provide 100 imp/kWhr. The logic output CF has an output frequency that can be up to 2048 times higher REV. PrF – 3– PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB than the frequency on F1 and F2. This output can be used for calibration purposes and is shown connected to a frequency counter via the optoisolator in Figure 6. At maximum current (25 A), the power seen by the meter will be 5.5 kW. This will produce a frequency of 0.153 Hz on F1 and F2 when these outputs are calibrated to 100imp/kWhr (100imp/hr = 0.02777 Hz, 0.02777 x 5.5 = 0.153 Hz). From Table V in the ADE7757 datasheet, the closest frequency to 0.153 Hz in the half-scale ac inputs column is for F3, i.e., 0.18 Hz for a nominal internal oscillator frequency of 466k Hz. Therefore F3 is selected by setting S1 = 1 and S0 = 0. The choice of CF frequencies in this mode (see Table III in the ADE7757 datasheet) are 32 times F1 and 16 times F1. For this example 32 times F1 is selected by setting SCF = 1. Since the voltage on Channel 1 is fixed, the only possible way of calibrating (adjusting) the output frequency in F1 and F2 is by varying the voltage on Channel 2. This is carried out by varying the attenuation of the line voltage using the trim pot. First we can calculate the voltage required in Channel 2 in order to calibrate the frequency on the logic outputs F1 and F2 to 100imp/kWhr. The ADE7757 datasheet gives the equation which relates the voltage on Channel 1 and Channel 2 to the output frequency on F1 and F2. Table I. Jumper Option JP1 Closed Description Closing this jumper will short resistor R16 and connect analog input V1N directly to SK1B. This has the effect of removing the antialias filter from this input. Antialias filter in input V1N is enabled. Analog input V1N is connected to analog ground (AGND) via the antialias filter. This jumper should be closed if the Channel 1 is used in a single-ended mode. When evaluating the ADE7757, Channel 1 is best used in a differential mode and this jumper should be left open. An example is shown in Figure 3. In this example a shunt is used to sense the current. The shunt can be referenced to the AGND of the board by using TP9 as shown. Closing this jumper will short resistor R17 and connect analog input V1P directly to SK1C. This has the effect of removing the antialias filter from this input. Antialias filter in input V1P is enabled. Analog input V1P is connected to analog ground (AGND) via the antialias filter. Normal operation. Closing this jumper will short resistors R19 and R20. The analog input V2P is connected directly to SK2A. This has the effect of removing the antialias filter/attenuation network from this input. Note: if the board is being connected to a high voltage, this jumper must be left open. Antialias filter/attenuation network on the input V2P is enabled. Analog input V2P is connected to analog ground (AGND) via the antialias filter/attenuation network. Note: SK2A is also connected to AGND. Be careful when connecting this input a high voltage source. Normal operation. Closing this jumper will short resistor R18 and connect analog input V2N directly to SK2B. This has the effect of removing the antialias filter/attenuation network from this input. Antialias filter/attenuation network in input V2N is enabled. REV. PrF Open JP2 Closed Open JP3 Closed Freq = 515.84 × V1 × V2 × F1− 4 V 2 ref (1) Open JP4 Closed First a current is selected for calibration, 5 A for example. This gives a Channel 1 voltage of 400 µΩ x 5 A = 2 mV rms. The on-chip or external reference of 2.5 V is selected using JP10. The output frequency at 5 A on F1 and F2 should be (100imp/kWhr) x 1.1 kW = 0.03055 Hz, where (220 V x 5 A = 1.1 kW). From Equation 1 the voltage on Channel 2 should be set to 54.4 mV. The attenuation network as shown in Figure 1 is used to attenuate 220 V to 54.4 mV. R19 = 590 kΩ, R20 = 200 kΩ, R22 = 100Ω and the trim pot R15 =100Ω. However, since the meter is being calibrated at CF and CF is set to 32 times F1, the voltage on Channel 2 should be adjusted until CF = 32 x 0.03055 Hz = 0.9776 Hz is registered on the frequency counter. The counter should be set up to display the average of ten frequency measurements on CF. This will remove any ripple due to the instantaneous power signal. See the ADE7757 datasheet for more details. Open JP5 Closed Open JP6 Closed JUMPER SELECTION Open JP7 Closed The ADE7757 evaluation board comes with several jumper selections that allow the user to exercise all of the ADE7757 functionality. There are also some options such as attenuation networks and optically isolated outputs that allow the ADE7757 to be evaluated under the same conditions as the end application. Table I outlines all the jumper options and explains how they are used. Table I should be used in conjugation with Figure 7, which will make it easier to locate the jumper in question. –4– Open PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB JP8 Closed Analog input V2N is connected to analog ground (AGND) via the antialias filter/attenuation network. This option should be selected if Channel 2 is used in a single-ended mode. V2N connected to SK2B for differential operation. SK2B connected to V2N. SK2B connected to V2P. ADE7757 internal (on-chip) reference selected. External (AD780) reference selected. SCF connected to VDD. SCF connected to DGND. S1 connected to VDD. S1 connected to DGND. S0 connected to VDD. S0 connected to DGND. CF logic output connected to optically isolated output at SK5. CF logic output connected to LED. VDD and +5V connected together. Note: VDD is power supply for ADE7757 IC (U1) and +5V is power supply for buffer (U2) SK2A connected to V2N. SK2A connected to V2P. Trim pot R15 is connected to V2P or V2N (depending on the position of JP16)—see Figure 8. This allows the output frequency to be scaled using the voltage on V2P. When option B is selected, the jumper JP18 should be left open. In this configuration the attenuation for V2P is provided via the fixed resistors R19, R20, R21 and R22. When open, the attenuation on V2P is provided by fixed resistor as explained above. Also see Figure 10. When closed, the trim pot becomes part of the attenuation network. In this mode of operation, the resistor R21 should be removed from its PCB jack sockets and JP17B must be opened Open JP9 JP10 N P Open Closed JP11 JP12 JP13 JP14 1 0 1 0 1 0 A B JP15 Closed JP16 JP17 N P A B JP18 Open Closed REV. PrF – 5– PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB Figure 7. ADE7757 Evaluation Board Jumper Positions JUMPER CLOSED JUMPER OPEN –6– REV. PrF PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB Evaluation Board Bill of Material Designator R1, R2, R3, R4 R5 R7, R8, R9 R11, R12 R13, R14 R15 R16, R17, R18 Value 1 kΩ, 5%, 1/4 W 100 Ω, 5%, 1/4 W 10 kΩ, 5%, 1/4 W 820 Ω, 1%, 1/4 W 20 Ω, 5%, 1/4 W 100 Ω, 10%, 1/2 W Description Resistor, No Special Requirements. Resistor, No Special Requirements. Resistor, No Special Requirements. Resistor, No Special Requirements. Resistor, No Special Requirements. Trim Pot Resistor, 25 Turn. BOURNS. 200 Ω, 0.05%, 1/8 W ±15 ppm/°C Resistor, good tolerance, used as part of the analog filter network. These resistors are not soldered, but are plugged into PCB mount sockets for easy modification by the customer. Low drift WELWYN RC6 Series, FARNELL Part No. 339-179. 402 kΩ, 1%,1/4 W 200 kΩ, 1%, 1/4 W ±50 ppm/°C, FARNELL Part No. 336-660. ±15 ppm/°C, FARNELL Part No. 341-094. R19 R20 R21, R22 C1 C2, C3, C4 C5 C7, C8, C9, C10, C11, C12, C20 C13, C14, C15 C16, C17, C18, C19 100 Ω, 0.1%, 1/4 W ±15 ppm/°C Resistor, Good Tolerance. Low Drift. FARNELL Part No. 338-886. 1 µF, 10% 16V 10 µF, 10% 16V Voltage reference decoupling capacitor. Power supply decoupling capacitors, 20%, Philips CW20C 104, FARNELL Part No. 643-579. 6.2 kΩ, 0.1%, 1/4 W ±15 ppm/°C Resistor, Good Tolerance. Used to drive internal oscillator. 100 nF, 10% 100 V Power Supply Decoupling Capacitors, 10%, X7R type, AVXKYOCERNA, FARNELL Part No. 146-227. Philips CW15C 103 M, FARNELL Part No. 146-224. X7R Capacitor, Part of the Filter Network. These resistors are not soldered, but are plugged into PCB mount sockets for easy modification by the customer. SR15 series AVX-KYOCERNA, FARNELL Part No. 108-948. Capacitor placeholder for external reference compensation Socket to hold ADE7757 chip. Loranger International Corp., 16 Gull Wing Leaded, SOT-109A (so16), File NO. 3337161S Energy measurement IC by Analog Devices Inc. (see ADE7757 datasheet) Quad CMOS AND gates. 2.5 V Reference, Supplied by Analog Devices Inc. Optical Isolator, by QT, FARNELL Part No. 326-896. Low Current, Red, FARNELL Part No. 637-087. 15 A, 2.5 mm Cable Screw Terminal Sockets. FARNELL Part No. 151-785. Length 10 mm, Pitch 5 mm, Pin diameter 1 mm. 10 nF 10% 100V 0.15 µF, 10%, 50 V C21 SKT1 U1 U2 U3 U4 D1 SK2, SK3, SK4, SK6 SK1, SK5 N/A SOIC-nb socket ADE7757 74HC08 AD780 H11L1 LED 2-pin Screw Terminal 3-pin Screw Terminal 15 A, 2.5 mm Cable Screw Terminal Sockets. FARNELL Part No. 151-786. Length 15 mm, Pitch 5 mm, Pin diameter 1 mm. REV. PrF – 7– PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB SK3A SK3B VDD SK4A SK4B C9 AGND C4 +5V VDD 1 VDD C3 C10 DGND U2 JP5 14 JP18 R19 U1 B JP17 ADE7757 P N JP16 TP5 74HC08 F1 TP8 R9 16 1 2 3 R13 SK6A C11 C12 B SK2A R20 JP6 R21 R15 TP4 2 V2P V2P V2N V2N 3 A F2 TP7 R8 15 TP6 R7 4 5 6 R14 SK6B R11 TO IMPULSE COUNTER / STEPPER MOTOR V2 C18 12 13 JP7 R18 R22 CF 11 14 A 9 P 10 8 D1 JP14 R12 SK2B JP8 C19 N 7 VPLUS SK5A 6 JP9 1 U4 4 R4 R5 SK5B CFOUT C20 SK1A JP1 R16 TP1 REVP 12 4 V1N SK1B C5 RCLKIN 2 5 H11L1 VMINUS SK5C JP2 V1 JP3 C16 11 SK1C R17 JP4 TP2 5 V1P C17 S0 10 9 8 C13 TP3 VDD C1 2 S1 C15 7 REFIN/OUT C7 SCF C14 C2 C8 3 U3 AD780 4 JP10 6 C21 AGND DGND 13 6 R1 R2 R3 VDD 1 0 JP11 PCB MOUNT SOCKETS 1 0 JP12 1 0 JP13 TEST POINT AGND TP9 DGND TP10 VDD +5V JP15 Figure 8. Evaluation Board Schematic –8– REV. PrF PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB Figure 9. PCB Layout–Component Side REV. PrF – 9– PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB Figure 10. PCB Layout–Solder Side –10– REV. PrF PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB Figure 11. PCB Layout–Component Placement REV. PrF – 11–
ADE7757EB 价格&库存

很抱歉,暂时无法提供与“ADE7757EB”相匹配的价格&库存,您可以联系我们找货

免费人工找货