ADG3242BCZ-SF3

ADG3242BCZ-SF3

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    AD(亚德诺)

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  • 描述:

    ADG3242BCZ-SF3 - 2.5 V/3.3 V, 2-Bit Common Control Level Translator Bus Switch - Analog Devices

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ADG3242BCZ-SF3 数据手册
2.5 V/3.3 V, 2-Bit Common Control Level Translator Bus Switch ADG3242 FEATURES 225 ps propagation delay through the switch 4.5 Ω switch connection between ports Data rate 1.5 Gbps 2.5 V/3.3 V supply operation Selectable level shifting/translation Level translation 3.3 V to 2.5 V 3.3 V to 1.8 V 2.5 V to 1.8 V Small signal bandwidth 710 MHz 8-lead SOT-23 package FUNCTIONAL BLOCK DIAGRAM A0 B0 A1 B1 04309-001 BE Figure 1. APPLICATIONS 3.3 V to 2.5 V voltage translation 3.3 V to 1.8 V voltage translation 2.5 V to 1.8 V voltage translation Bus switching Bus isolation Hot swap Hot plug Analog switch applications GENERAL DESCRIPTION The ADG3242 is a 2.5 V or 3.3 V, 2-bit, 2-port, common control digital switch. It is designed on a low voltage CMOS process, and provides low power dissipation, yet gives high switching speed and very low on resistance. This allows the inputs to be connected to the outputs without additional propagation delay or generating additional ground bounce noise. These switches are enabled by means of a common bus enable (BE) input signal. This digital switch allows a bidirectional signal to be switched when on. In the off condition, signal levels up to the supplies are blocked. This device is ideal for applications requiring level translation. When operated from a 3.3 V supply, level translation from 3.3 V inputs to 2.5 V outputs is allowed. Similarly, if the device is operated from a 2.5 V supply and 2.5 V inputs are applied, the device translates the outputs to 1.8 V. In addition, a level translating select pin (SEL) is included. When SEL is low, VCC is reduced internally, allowing for level translation between 3.3 V inputs and 1.8 V outputs. This makes the device suitable for applications requiring level translation between different supplies, such as converter to DSP/microcontroller interfacing. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 3.3 V or 2.5 V supply operation. Extremely low propagation delay through switch. 4.5 Ω switches connect inputs to outputs. Level/voltage translation. Tiny SOT-23 package. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. ADG3242 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ............................................. 6 Terminology .................................................................................... 10 Timing Measurement Information .............................................. 11 Bus Switch Applications ................................................................ 12 Mixed Voltage Operation, Level Translation.......................... 12 3.3 V to 2.5 V Translation ......................................................... 12 2.5 V to 1.8 V Translation ......................................................... 12 3.3 V to 1.8 V Translation ......................................................... 12 Bus Isolation................................................................................ 13 Hot Plug and Hot Swap Isolation............................................. 13 Analog Switching ....................................................................... 13 High Impedance during Power-Up/Power-Down................. 13 Outline Dimensions ....................................................................... 14 Ordering Guide............................................................................... 14 REVISION HISTORY 9/06—Rev. 0 to Rev. A Updated Format..................................................................Universal Added Table 4.................................................................................... 5 Changes to the Ordering Guide.................................................... 14 8/03—Revision 0: Initial Version Rev. A | Page 2 of 16 ADG3242 SPECIFICATIONS VCC = 2.3 V to 3.6 V, GND = 0 V; all specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter DC ELECTRICAL CHARACTERISTICS Input High Voltage Input Low Voltage Input Leakage Current Off State Leakage Current On State Leakage Current Maximum Pass Voltage Symbol VINH VINL II IOZ VP Conditions VCC = 2.7 V to 3.6 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 2.3 V to 2.7 V 0 ≤ A, B ≤ VCC 0 ≤ A, B ≤ VCC VA/VB = VCC = SEL = 3.3 V, IO = −5 μA VA/VB = VCC = SEL = 2.5 V, IO = −5 μA VA/VB = VCC = 3.3 V, SEL = 0 V, IO = −5 μA f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz CL = 50 pF, VCC = SEL = 3 V VCC = 3.0 V to 3.6 V; SEL = VCC VCC = 3.0 V to 3.6 V; SEL = 0 V VCC = 2.3 V to 2.7 V; SEL = VCC VCC = 3.0 V to 3.6 V; SEL = VCC VCC = 3.0 V to 3.6 V; SEL = 0 V VCC = 2.3 V to 2.7 V; SEL = VCC VCC = SEL = 3.3 V; VA/VB = 2 V VCC = SEL = 3.3 V; VA/VB = 2 V VCC = 3 V, SEL = VCC, VA = 0 V, IBA = 8 mA VCC = 3 V, SEL = VCC, VA = 1.7 V, IBA = 8 mA VCC = 2.3 V, SEL = VCC, VA = 0 V, IBA = 8 mA VCC = 2.3 V, SEL = VCC, VA = 1 V, IBA = 8 mA VCC = 3 V, SEL = 0 V, VA = 0 V, IBA = 8 mA VCC = 3 V, SEL = 0 V, VA = 1 V, IBA = 8 mA VCC = 3 V, SEL = VCC, VA = 0 V, IA = 8 mA VCC = 3 V, SEL = 0 V, VA = 0 V, IA = 8 mA 2.3 ICC ∆ICC Digital inputs = 0 V or VCC; SEL = VCC Digital inputs = 0 V or VCC ; SEL = 0 V VCC = 3.6 V, BE = 3.0 V; SEL = VCC 0.01 0.1 0.15 1 1 1 1 1 1 3.2 3 3 3 2.5 2.5 1.5 45 4.5 12 5 9 5 12 0.1 0.1 Min 2.0 1.7 0.8 0.7 ±1 ±1 ±1 2.9 2.1 2.1 B Version 1 Typ 2 Max Unit V V V V μA μA μA V V V pF pF pF pF 0.225 5 4.6 4 4 4 3.8 3.4 ns ps ns ns ns ns ns ns Gbps ps p-p Ω Ω Ω Ω Ω Ω Ω Ω V μA mA μA 2.0 1.5 1.5 ±0.01 ±0.01 ±0.01 2.5 1.8 1.8 3.5 3.5 7 4 CAPACITANCE 3 A Port Off Capacitance B Port Off Capacitance A, B Port On Capacitance Control Input Capacitance SWITCHING CHARACTERISTICS3 Propagation Delay A to B or B to A, tPD 4 Propagation Delay Matching 5 Bus Enable Time BE to A or B 6 CA OFF CB OFF CA, CB ON CIN tPHL, tPLH tPZH, tPZL Bus Disable Time BE to A or B6 tPHZ, tPLZ Maximum Data Rate Channel Jitter DIGITAL SWITCH On Resistance RON 8 28 9 18 8 0.5 0.5 3.6 1 0.2 8 On Resistance Matching POWER REQUIREMENTS VCC Quiescent Power Supply Current Increase in ICC per Input 7 1 2 ∆RON Temperature range is as follows: B version: −40°C to +85°C. Typical values are at 25°C, unless otherwise stated. 3 Guaranteed by design, not subject to production test. 4 The digital switch contributes no propagation delay other than the RC delay of the typical RON of the switch and the load capacitance when driven by an ideal voltage source. Because the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 5 Propagation delay matching between channels is calculated from the on resistance matching and load capacitance of 50 pF. 6 See Timing Measurement Information section. 7 This current applies to the Control Pin BE only. The A and B ports contribute no significant ac or dc currents as they transition. Rev. A | Page 3 of 16 ADG3242 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2. Parameter VCC to GND Digital Inputs to GND DC Input Voltage DC Output Current Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature θJA Thermal Impedance Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature (
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